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Date: Wed, 3 Dec 2014 01:53:39 -0600
From: Emil Medve <Emilian.Medve@Freescale.com>
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To: Scott Wood <scottwood@Freescale.com>
Subject: Re: [PATCH v3 3/4] powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support
 to device tree(s)
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Cc: devicetree@vger.kernel.org, Poonam Aggrwal <poonam.aggrwal@Freescale.com>,
 Geoff Thorpe <Geoff.Thorpe@Freescale.com>, linuxppc-dev@ozlabs.org,
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Hello Scott,


On 12/02/2014 06:32 PM, Scott Wood wrote:
> On Mon, 2014-12-01 at 04:02 -0600, Emil Medve wrote:
>> diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
>> index 53761d4..431bf4e 100644
>> --- a/arch/powerpc/boot/dts/t4240rdb.dts
>> +++ b/arch/powerpc/boot/dts/t4240rdb.dts
>> @@ -69,10 +69,27 @@
>>  		device_type = "memory";
>>  	};
>>  
>> +	reserved-memory {
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges;
>> +
>> +		bman_fbpr: bman-fbpr {
>> +			compatible = "fsl,bman-fbpr";
>> +			alloc-ranges = <0 0 0xffff 0xffffffff>;
>> +			size = <0 0x1000000>;
>> +			alignment = <0 0x1000000>;
>> +		};
>> +	};
> 
> Can't this be done at the SoC level rather than board level?

The size of the memory is not SoC specific. Among other things is
determined by the number of MACs that are pinned-out on the board


Cheers,