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Date: Thu, 22 Jan 2009 18:47:01 +1100
Message-ID: <547eba1b0901212347v47c9ee4at40e2188c50351952@mail.gmail.com>
Subject: Re: Device Tree setup for 8272-based board
From: Daniel Ng <daniel.ng1234@gmail.com>
To: Scott Wood <scottwood@freescale.com>
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On Thu, Jan 22, 2009 at 4:52 AM, Scott Wood <scottwood@freescale.com> wrote:
>> 3) In the PIC: interrupt-controller@10c00 node-
>> reg = <0x10c00 0x80>;
>
> Offset and length of PIC registers.

Thanks Scott. What is the meaning of the Ethernet reg field?:

reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;

Is it-

0x11300-> GFMR1 ie. the GFMR for FCC1?
0x20-> GFMR1 Fields are a total of 32 bits?
0x8400-> initial value of bits 0-15 of GFMR1?
0x100-> initial value of bits 16-31 of GFMR1?
0x11390-> GFEMR1?
0x1-> length of GFEMR1 is 1 bit in size?? (this doesn't make sense
because it's a 3-bit field)
Where would we specify the initial value of GFEMR1?

Cheers,
Daniel