Re: [PATCH 1/4] CXL: Use image state defaults for reloading FPGA

[Ryan Grimm <grimm@linux.vnet.ibm.com>]

On 01/19/2015 12:03 AM, Ian Munsie wrote:
> Acked-by: Ian Munsie <imunsie@au1.ibm.com>
>
> Looks like you forgot your Signed-off-by line - mpe, do you want Ryan to
> resend the whole patch (maybe with the below explanation included), or
> just reply with a Signed-off-by?

OK resending.

-Ryan

>
> This would also be good to CC: Stable, as these new defaults mean that
> the card will be fully reset when sapphire PERSTs them on reboot,
> whereas before it was left up to the default value of this register in
> each card, and could lead to a card getting into a bad state requiring a
> full power cycle to recover. The symptoms we saw was the tlbia / slbia
> we do on boot timing out and the driver init aborting.
>
> Cheers,
> -Ian
>