From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e23smtp09.au.ibm.com (e23smtp09.au.ibm.com [202.81.31.142]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 9A0D41A08ED for ; Fri, 13 Mar 2015 19:53:33 +1100 (AEDT) Received: from /spool/local by e23smtp09.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 13 Mar 2015 18:53:33 +1000 Received: from d23relay07.au.ibm.com (d23relay07.au.ibm.com [9.190.26.37]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 827E82CE8050 for ; Fri, 13 Mar 2015 19:53:27 +1100 (EST) Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay07.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t2D8rJQ746268516 for ; Fri, 13 Mar 2015 19:53:27 +1100 Received: from d23av04.au.ibm.com (localhost [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t2D8qrkj010109 for ; Fri, 13 Mar 2015 19:52:54 +1100 Message-ID: <5502A4C3.2040004@linux.vnet.ibm.com> Date: Fri, 13 Mar 2015 14:20:11 +0530 From: Neelesh Gupta MIME-Version: 1.0 To: Wolfram Sang , linux-i2c@vger.kernel.org Subject: Re: [RFC V2 04/12] i2c: opal: make use of the new infrastructure for quirks References: <1424880126-15047-1-git-send-email-wsa@the-dreams.de> <1424880126-15047-5-git-send-email-wsa@the-dreams.de> In-Reply-To: <1424880126-15047-5-git-send-email-wsa@the-dreams.de> Content-Type: multipart/alternative; boundary="------------040804020904050902000109" Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Ludovic Desroches , Yingjoe Chen , Eddie Huang , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is a multi-part message in MIME format. --------------040804020904050902000109 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Wolfram, Based on your patch: "[RFC V2 04/12] i2c: opal: make use of the new infrastructure for quirks" From: Neelesh Gupta Subject: [PATCH] i2c: opal: Update quirk flags to do write-then-anything Support write-then-anything in the case of 2 i2c messages for i2c transfer. Signed-off-by: Neelesh Gupta --- drivers/i2c/busses/i2c-opal.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c index b2788ec..1ec7fc9 100644 --- a/drivers/i2c/busses/i2c-opal.c +++ b/drivers/i2c/busses/i2c-opal.c @@ -104,7 +104,8 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf)); break; case 2: - req.type = OPAL_I2C_SM_READ; + req.type = (msgs[1].flags & I2C_M_RD) ? + OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE; req.addr = cpu_to_be16(msgs[0].addr); req.subaddr_sz = msgs[0].len; for (i = 0; i < msgs[0].len; i++) @@ -199,13 +200,11 @@ static const struct i2c_algorithm i2c_opal_algo = { .functionality = i2c_opal_func, }; -/* For two messages, we basically support only simple - * smbus transactions of a write plus a read. We might - * want to allow also two writes but we'd have to bounce - * the data into a single buffer. +/* For two messages, we basically support simple smbus transactions of a + * write-then-anything. */ static struct i2c_adapter_quirks i2c_opal_quirks = { - .flags = I2C_AQ_COMB_WRITE_THEN_READ, + .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR, .max_comb_1st_msg_len = 4, }; On 02/25/2015 09:31 PM, Wolfram Sang wrote: > From: Wolfram Sang > > Signed-off-by: Wolfram Sang > --- > drivers/i2c/busses/i2c-opal.c | 22 +++++++++++----------- > 1 file changed, 11 insertions(+), 11 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c > index 16f90b1a750894..b2788ecad5b3cb 100644 > --- a/drivers/i2c/busses/i2c-opal.c > +++ b/drivers/i2c/busses/i2c-opal.c > @@ -104,17 +104,6 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, > req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf)); > break; > case 2: > - /* For two messages, we basically support only simple > - * smbus transactions of a write plus a read. We might > - * want to allow also two writes but we'd have to bounce > - * the data into a single buffer. > - */ > - if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD)) > - return -EOPNOTSUPP; > - if (msgs[0].len > 4) > - return -EOPNOTSUPP; > - if (msgs[0].addr != msgs[1].addr) > - return -EOPNOTSUPP; > req.type = OPAL_I2C_SM_READ; > req.addr = cpu_to_be16(msgs[0].addr); > req.subaddr_sz = msgs[0].len; > @@ -210,6 +199,16 @@ static const struct i2c_algorithm i2c_opal_algo = { > .functionality = i2c_opal_func, > }; > > +/* For two messages, we basically support only simple > + * smbus transactions of a write plus a read. We might > + * want to allow also two writes but we'd have to bounce > + * the data into a single buffer. > + */ > +static struct i2c_adapter_quirks i2c_opal_quirks = { > + .flags = I2C_AQ_COMB_WRITE_THEN_READ, > + .max_comb_1st_msg_len = 4, > +}; > + > static int i2c_opal_probe(struct platform_device *pdev) > { > struct i2c_adapter *adapter; > @@ -232,6 +231,7 @@ static int i2c_opal_probe(struct platform_device *pdev) > > adapter->algo = &i2c_opal_algo; > adapter->algo_data = (void *)(unsigned long)opal_id; > + adapter->quirks = &i2c_opal_quirks; > adapter->dev.parent = &pdev->dev; > adapter->dev.of_node = of_node_get(pdev->dev.of_node); > pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL); --------------040804020904050902000109 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Wolfram,

Based on your patch:
"[RFC V2 04/12] i2c: opal: make use of the new infrastructure for quirks"


From: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Subject: [PATCH] i2c: opal: Update quirk flags to do write-then-anything
Support write-then-anything in the case of 2 i2c messages
for i2c transfer.

Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
---
 drivers/i2c/busses/i2c-opal.c |   11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
index b2788ec..1ec7fc9 100644
--- a/drivers/i2c/busses/i2c-opal.c
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -104,7 +104,8 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 		req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
 		break;
 	case 2:
-		req.type = OPAL_I2C_SM_READ;
+		req.type = (msgs[1].flags & I2C_M_RD) ?
+			OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
 		req.addr = cpu_to_be16(msgs[0].addr);
 		req.subaddr_sz = msgs[0].len;
 		for (i = 0; i < msgs[0].len; i++)
@@ -199,13 +200,11 @@ static const struct i2c_algorithm i2c_opal_algo = {
 	.functionality	= i2c_opal_func,
 };

-/* For two messages, we basically support only simple
- * smbus transactions of a write plus a read. We might
- * want to allow also two writes but we'd have to bounce
- * the data into a single buffer.
+/* For two messages, we basically support simple smbus transactions of a
+ * write-then-anything.
  */
 static struct i2c_adapter_quirks i2c_opal_quirks = {
-	.flags = I2C_AQ_COMB_WRITE_THEN_READ,
+	.flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR,
 	.max_comb_1st_msg_len = 4,
 };



On 02/25/2015 09:31 PM, Wolfram Sang wrote:
From: Wolfram Sang <wsa+renesas@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/i2c/busses/i2c-opal.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
index 16f90b1a750894..b2788ecad5b3cb 100644
--- a/drivers/i2c/busses/i2c-opal.c
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -104,17 +104,6 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 		req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
 		break;
 	case 2:
-		/* For two messages, we basically support only simple
-		 * smbus transactions of a write plus a read. We might
-		 * want to allow also two writes but we'd have to bounce
-		 * the data into a single buffer.
-		 */
-		if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD))
-			return -EOPNOTSUPP;
-		if (msgs[0].len > 4)
-			return -EOPNOTSUPP;
-		if (msgs[0].addr != msgs[1].addr)
-			return -EOPNOTSUPP;
 		req.type = OPAL_I2C_SM_READ;
 		req.addr = cpu_to_be16(msgs[0].addr);
 		req.subaddr_sz = msgs[0].len;
@@ -210,6 +199,16 @@ static const struct i2c_algorithm i2c_opal_algo = {
 	.functionality	= i2c_opal_func,
 };
 
+/* For two messages, we basically support only simple
+ * smbus transactions of a write plus a read. We might
+ * want to allow also two writes but we'd have to bounce
+ * the data into a single buffer.
+ */
+static struct i2c_adapter_quirks i2c_opal_quirks = {
+	.flags = I2C_AQ_COMB_WRITE_THEN_READ,
+	.max_comb_1st_msg_len = 4,
+};
+
 static int i2c_opal_probe(struct platform_device *pdev)
 {
 	struct i2c_adapter	*adapter;
@@ -232,6 +231,7 @@ static int i2c_opal_probe(struct platform_device *pdev)
 
 	adapter->algo = &i2c_opal_algo;
 	adapter->algo_data = (void *)(unsigned long)opal_id;
+	adapter->quirks = &i2c_opal_quirks;
 	adapter->dev.parent = &pdev->dev;
 	adapter->dev.of_node = of_node_get(pdev->dev.of_node);
 	pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL);

--------------040804020904050902000109--