From: Balbir Singh <bsingharora@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org, Michael Neuling <mikey@neuling.org>
Subject: Re: [PATCH][V2] Add support for power9 in ibm_architecture_vec
Date: Thu, 16 Jun 2016 15:47:57 +1000 [thread overview]
Message-ID: <55151eb1-e2a0-f542-da12-be5dd01a5f88@gmail.com> (raw)
In-Reply-To: <1466055106.5400.7.camel@ellerman.id.au>
On 16/06/16 15:31, Michael Ellerman wrote:
>> Subject: [PATCH][V2] Add support for power9 in ibm_architecture_vec
>
> Can you use "[PATCH v2]", my scripts don't grok your format.
>
> On Thu, 2016-06-16 at 14:54 +1000, Balbir Singh wrote:
>>
>> On 16/06/16 10:09, Balbir Singh wrote:
>
>>> Yes, my bad.. I'll respin. I thought I had it, but I clearly did not
>>>
>
> Please don't send patches in replies like this, I have to manually clean the
> above up before committing.
Yep.. I started this recently just to keep the thread rolling, but point
noted. Thanks!
>
>> V2: Update the vector length for OV1 after adding 3.0 support
>
> This should go below the "---" line so that it's stripped from the history.
>
Done!
>> The PVR list has been updated and IBM_ARCH_VEC_NRCORES_OFFSET.
>> This provides the cpu version supported to the hypervisor
>
> Can you give me more explanation of the practical effects of the patch. eg. This
> allows guests kernels to signal to the hypervisor that they support ISA 3.0
> features.
>
Will do
prev parent reply other threads:[~2016-06-16 5:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-15 8:17 [PATCH] Add support for power9 in ibm_architecture_vec Balbir Singh
2016-06-15 11:17 ` Aneesh Kumar K.V
2016-06-15 12:08 ` Balbir Singh
2016-06-15 15:58 ` Aneesh Kumar K.V
2016-06-16 0:09 ` Balbir Singh
2016-06-16 4:54 ` [PATCH][V2] " Balbir Singh
2016-06-16 5:31 ` Michael Ellerman
2016-06-16 5:47 ` Balbir Singh [this message]
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