* Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power [not found] ` <1445257133-27646-2-git-send-email-anju@linux.vnet.ibm.com> @ 2015-10-20 4:16 ` Madhavan Srinivasan 2015-10-20 6:43 ` AnjuTSudhakar 0 siblings, 1 reply; 4+ messages in thread From: Madhavan Srinivasan @ 2015-10-20 4:16 UTC (permalink / raw) To: linux-kernel, Anju Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual, hemant On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju <anju@linux.vnet.ibm.com> > > The enum definition assigns an 'id' to each register in power. I guess it should be "each register in "struct pt_regs" of arch/powerpc > The order of these values in the enum definition are based on > the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h . > > Signed-off-by: Anju T <anju@linux.vnet.ibm.com> > --- > arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h > > diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h > new file mode 100644 > index 0000000..b97727c > --- /dev/null > +++ b/arch/powerpc/include/uapi/asm/perf_regs.h > @@ -0,0 +1,55 @@ > +#ifndef _ASM_POWERPC_PERF_REGS_H > +#define _ASM_POWERPC_PERF_REGS_H > + > +enum perf_event_powerpc_regs { > + PERF_REG_POWERPC_GPR0, > + PERF_REG_POWERPC_GPR1, > + PERF_REG_POWERPC_GPR2, > + PERF_REG_POWERPC_GPR3, > + PERF_REG_POWERPC_GPR4, > + PERF_REG_POWERPC_GPR5, > + PERF_REG_POWERPC_GPR6, > + PERF_REG_POWERPC_GPR7, > + PERF_REG_POWERPC_GPR8, > + PERF_REG_POWERPC_GPR9, > + PERF_REG_POWERPC_GPR10, > + PERF_REG_POWERPC_GPR11, > + PERF_REG_POWERPC_GPR12, > + PERF_REG_POWERPC_GPR13, > + PERF_REG_POWERPC_GPR14, > + PERF_REG_POWERPC_GPR15, > + PERF_REG_POWERPC_GPR16, > + PERF_REG_POWERPC_GPR17, > + PERF_REG_POWERPC_GPR18, > + PERF_REG_POWERPC_GPR19, > + PERF_REG_POWERPC_GPR20, > + PERF_REG_POWERPC_GPR21, > + PERF_REG_POWERPC_GPR22, > + PERF_REG_POWERPC_GPR23, > + PERF_REG_POWERPC_GPR24, > + PERF_REG_POWERPC_GPR25, > + PERF_REG_POWERPC_GPR26, > + PERF_REG_POWERPC_GPR27, > + PERF_REG_POWERPC_GPR28, > + PERF_REG_POWERPC_GPR29, > + PERF_REG_POWERPC_GPR30, > + PERF_REG_POWERPC_GPR31, > + PERF_REG_POWERPC_NIP, > + PERF_REG_POWERPC_MSR, > + PERF_REG_POWERPC_ORIG_R3, > + PERF_REG_POWERPC_CTR, > + PERF_REG_POWERPC_LNK, > + PERF_REG_POWERPC_XER, > + PERF_REG_POWERPC_CCR, > +#ifdef __powerpc64__ > + PERF_REG_POWERPC_SOFTE, > +#else > + PERF_REG_POWERPC_MQ, > +#endif > + PERF_REG_POWERPC_TRAP, > + PERF_REG_POWERPC_DAR, > + PERF_REG_POWERPC_DSISR, > + PERF_REG_POWERPC_RESULT, > + PERF_REG_POWERPC_MAX, > +}; > +#endif /* _ASM_POWERPC_PERF_REGS_H */ ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power 2015-10-20 4:16 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Madhavan Srinivasan @ 2015-10-20 6:43 ` AnjuTSudhakar 0 siblings, 0 replies; 4+ messages in thread From: AnjuTSudhakar @ 2015-10-20 6:43 UTC (permalink / raw) To: Madhavan Srinivasan, linux-kernel Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual, hemant Hi maddy, On Tuesday 20 October 2015 09:46 AM, Madhavan Srinivasan wrote: > > On Monday 19 October 2015 05:48 PM, Anju T wrote: >> From: Anju <anju@linux.vnet.ibm.com> >> >> The enum definition assigns an 'id' to each register in power. > I guess it should be "each register in "struct pt_regs" of arch/powerpc Right, that seems better.Will change the description like that. Thanks a lot for reviewing the patch . >> The order of these values in the enum definition are based on >> the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h . >> >> Signed-off-by: Anju T <anju@linux.vnet.ibm.com> >> --- >> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++ >> 1 file changed, 55 insertions(+) >> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h >> >> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h >> new file mode 100644 >> index 0000000..b97727c >> --- /dev/null >> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h >> @@ -0,0 +1,55 @@ >> +#ifndef _ASM_POWERPC_PERF_REGS_H >> +#define _ASM_POWERPC_PERF_REGS_H >> + >> +enum perf_event_powerpc_regs { >> + PERF_REG_POWERPC_GPR0, >> + PERF_REG_POWERPC_GPR1, >> + PERF_REG_POWERPC_GPR2, >> + PERF_REG_POWERPC_GPR3, >> + PERF_REG_POWERPC_GPR4, >> + PERF_REG_POWERPC_GPR5, >> + PERF_REG_POWERPC_GPR6, >> + PERF_REG_POWERPC_GPR7, >> + PERF_REG_POWERPC_GPR8, >> + PERF_REG_POWERPC_GPR9, >> + PERF_REG_POWERPC_GPR10, >> + PERF_REG_POWERPC_GPR11, >> + PERF_REG_POWERPC_GPR12, >> + PERF_REG_POWERPC_GPR13, >> + PERF_REG_POWERPC_GPR14, >> + PERF_REG_POWERPC_GPR15, >> + PERF_REG_POWERPC_GPR16, >> + PERF_REG_POWERPC_GPR17, >> + PERF_REG_POWERPC_GPR18, >> + PERF_REG_POWERPC_GPR19, >> + PERF_REG_POWERPC_GPR20, >> + PERF_REG_POWERPC_GPR21, >> + PERF_REG_POWERPC_GPR22, >> + PERF_REG_POWERPC_GPR23, >> + PERF_REG_POWERPC_GPR24, >> + PERF_REG_POWERPC_GPR25, >> + PERF_REG_POWERPC_GPR26, >> + PERF_REG_POWERPC_GPR27, >> + PERF_REG_POWERPC_GPR28, >> + PERF_REG_POWERPC_GPR29, >> + PERF_REG_POWERPC_GPR30, >> + PERF_REG_POWERPC_GPR31, >> + PERF_REG_POWERPC_NIP, >> + PERF_REG_POWERPC_MSR, >> + PERF_REG_POWERPC_ORIG_R3, >> + PERF_REG_POWERPC_CTR, >> + PERF_REG_POWERPC_LNK, >> + PERF_REG_POWERPC_XER, >> + PERF_REG_POWERPC_CCR, >> +#ifdef __powerpc64__ >> + PERF_REG_POWERPC_SOFTE, >> +#else >> + PERF_REG_POWERPC_MQ, >> +#endif >> + PERF_REG_POWERPC_TRAP, >> + PERF_REG_POWERPC_DAR, >> + PERF_REG_POWERPC_DSISR, >> + PERF_REG_POWERPC_RESULT, >> + PERF_REG_POWERPC_MAX, >> +}; >> +#endif /* _ASM_POWERPC_PERF_REGS_H */ Thanks Anju ^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <1445257133-27646-4-git-send-email-anju@linux.vnet.ibm.com>]
* Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state [not found] ` <1445257133-27646-4-git-send-email-anju@linux.vnet.ibm.com> @ 2015-10-20 4:20 ` Madhavan Srinivasan 2015-10-20 6:45 ` AnjuTSudhakar 0 siblings, 1 reply; 4+ messages in thread From: Madhavan Srinivasan @ 2015-10-20 4:20 UTC (permalink / raw) To: linux-kernel, Anju Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual, hemant On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju <anju@linux.vnet.ibm.com> > > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with perf record command. > To display the sampled register values use perf script -D. > The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'. > CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state. > > Signed-off-by: Anju T <anju@linux.vnet.ibm.com> > --- > arch/powerpc/Kconfig | 1 + > arch/powerpc/perf/Makefile | 2 +- > arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++ > tools/perf/config/Makefile | 4 ++ > 4 files changed, 91 insertions(+), 1 deletion(-) > create mode 100644 arch/powerpc/perf/perf_regs.c > > diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig > index 9a7057e..c4ce60d 100644 > --- a/arch/powerpc/Kconfig > +++ b/arch/powerpc/Kconfig > @@ -119,6 +119,7 @@ config PPC > select GENERIC_ATOMIC64 if PPC32 > select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE > select HAVE_PERF_EVENTS > + select HAVE_PERF_REGS > select HAVE_REGS_AND_STACK_ACCESS_API > select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64 > select ARCH_WANT_IPC_PARSE_VERSION > diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile > index f9c083a..8e7f545 100644 > --- a/arch/powerpc/perf/Makefile > +++ b/arch/powerpc/perf/Makefile > @@ -7,7 +7,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \ > power5+-pmu.o power6-pmu.o power7-pmu.o \ > power8-pmu.o > obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o > - > +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o > obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o > obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o > > diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c > new file mode 100644 > index 0000000..7a71de2 > --- /dev/null > +++ b/arch/powerpc/perf/perf_regs.c > @@ -0,0 +1,85 @@ > +#include <linux/errno.h> > +#include <linux/kernel.h> > +#include <linux/sched.h> > +#include <linux/perf_event.h> > +#include <linux/bug.h> > +#include <linux/stddef.h> > +#include <asm/ptrace.h> > +#include <asm/perf_regs.h> > + > +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r) > + > +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1)) > + > +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = { > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]), > + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip), > + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr), > + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3), > + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr), > + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link), > + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer), > + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr), > +#ifdef __powerpc64__ > + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe), > +#else > + PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq), > +#endif > + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap), > + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar), > + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr), > + PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result), > +}; > +u64 perf_reg_value(struct pt_regs *regs, int idx) > +{ > + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX)) > + return 0; > + return regs_get_register(regs, pt_regs_offset[idx]); > +} > +int perf_reg_validate(u64 mask) > +{ > + if (!mask || mask & REG_RESERVED) > + return -EINVAL; > + return 0; > +} > +u64 perf_reg_abi(struct task_struct *task) > +{ > + return PERF_SAMPLE_REGS_ABI_64; > +} > +void perf_get_regs_user(struct perf_regs *regs_user, > + struct pt_regs *regs, > + struct pt_regs *regs_user_copy) > +{ Kindly add comment to update the function when enabling perf_sample_reg_user. Maddy > + return; > +} > diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile > index 827557f..4da9190 100644 > --- a/tools/perf/config/Makefile > +++ b/tools/perf/config/Makefile > @@ -22,6 +22,10 @@ include $(src-perf)/config/Makefile.arch > $(call detected_var,ARCH) > > NO_PERF_REGS := 1 > +#Additional ARCH settings for ppc64 > +ifeq ($(ARCH),powerpc) > + NO_PERF_REGS :=0 > +endif > > # Additional ARCH settings for x86 > ifeq ($(ARCH),x86) ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state 2015-10-20 4:20 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Madhavan Srinivasan @ 2015-10-20 6:45 ` AnjuTSudhakar 0 siblings, 0 replies; 4+ messages in thread From: AnjuTSudhakar @ 2015-10-20 6:45 UTC (permalink / raw) To: Madhavan Srinivasan, linux-kernel Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual, hemant On Tuesday 20 October 2015 09:50 AM, Madhavan Srinivasan wrote: > > On Monday 19 October 2015 05:48 PM, Anju T wrote: >> From: Anju <anju@linux.vnet.ibm.com> >> >> The registers to sample are passed through the sample_regs_intr bitmask. >> The name and bit position for each register is defined in asm/perf_regs.h. >> This feature can be enabled by using -I option with perf record command. >> To display the sampled register values use perf script -D. >> The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'. >> CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state. >> >> Signed-off-by: Anju T <anju@linux.vnet.ibm.com> >> --- >> arch/powerpc/Kconfig | 1 + >> arch/powerpc/perf/Makefile | 2 +- >> arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++ >> tools/perf/config/Makefile | 4 ++ >> 4 files changed, 91 insertions(+), 1 deletion(-) >> create mode 100644 arch/powerpc/perf/perf_regs.c >> >> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig >> index 9a7057e..c4ce60d 100644 >> --- a/arch/powerpc/Kconfig >> +++ b/arch/powerpc/Kconfig >> @@ -119,6 +119,7 @@ config PPC >> select GENERIC_ATOMIC64 if PPC32 >> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE >> select HAVE_PERF_EVENTS >> + select HAVE_PERF_REGS >> select HAVE_REGS_AND_STACK_ACCESS_API >> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64 >> select ARCH_WANT_IPC_PARSE_VERSION >> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile >> index f9c083a..8e7f545 100644 >> --- a/arch/powerpc/perf/Makefile >> +++ b/arch/powerpc/perf/Makefile >> @@ -7,7 +7,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \ >> power5+-pmu.o power6-pmu.o power7-pmu.o \ >> power8-pmu.o >> obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o >> - >> +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o >> obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o >> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o >> >> diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c >> new file mode 100644 >> index 0000000..7a71de2 >> --- /dev/null >> +++ b/arch/powerpc/perf/perf_regs.c >> @@ -0,0 +1,85 @@ >> +#include <linux/errno.h> >> +#include <linux/kernel.h> >> +#include <linux/sched.h> >> +#include <linux/perf_event.h> >> +#include <linux/bug.h> >> +#include <linux/stddef.h> >> +#include <asm/ptrace.h> >> +#include <asm/perf_regs.h> >> + >> +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r) >> + >> +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1)) >> + >> +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = { >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr), >> +#ifdef __powerpc64__ >> + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe), >> +#else >> + PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq), >> +#endif >> + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr), >> + PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result), >> +}; >> +u64 perf_reg_value(struct pt_regs *regs, int idx) >> +{ >> + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX)) >> + return 0; >> + return regs_get_register(regs, pt_regs_offset[idx]); >> +} >> +int perf_reg_validate(u64 mask) >> +{ >> + if (!mask || mask & REG_RESERVED) >> + return -EINVAL; >> + return 0; >> +} >> +u64 perf_reg_abi(struct task_struct *task) >> +{ >> + return PERF_SAMPLE_REGS_ABI_64; >> +} >> +void perf_get_regs_user(struct perf_regs *regs_user, >> + struct pt_regs *regs, >> + struct pt_regs *regs_user_copy) >> +{ > Kindly add comment to update the function when > enabling perf_sample_reg_user. > > Maddy Ok . will add that. >> + return; >> +} >> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile >> index 827557f..4da9190 100644 >> --- a/tools/perf/config/Makefile >> +++ b/tools/perf/config/Makefile >> @@ -22,6 +22,10 @@ include $(src-perf)/config/Makefile.arch >> $(call detected_var,ARCH) >> >> NO_PERF_REGS := 1 >> +#Additional ARCH settings for ppc64 >> +ifeq ($(ARCH),powerpc) >> + NO_PERF_REGS :=0 >> +endif >> >> # Additional ARCH settings for x86 >> ifeq ($(ARCH),x86) Thanks Anju ^ permalink raw reply [flat|nested] 4+ messages in thread
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2015-10-20 4:16 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Madhavan Srinivasan
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