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From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
To: Anju T <anju@linux.vnet.ibm.com>,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Cc: acme@redhat.com, hemant@linux.vnet.ibm.com, dsahern@gmail.com,
	naveen.n.rao@linux.vnet.ibm.com, sukadev@linux.vnet.ibm.com,
	jolsa@redhat.com, khandual@linux.vnet.ibm.com
Subject: Re: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power
Date: Wed, 28 Oct 2015 15:50:34 +0530	[thread overview]
Message-ID: <5630A172.6000208@linux.vnet.ibm.com> (raw)
In-Reply-To: <1445863448-5746-2-git-send-email-anju@linux.vnet.ibm.com>



On Monday 26 October 2015 06:14 PM, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs" 
> of arch/powerpc.The order of these values in the enum definition are 
> based on the corresponding macros in 
> arch/powerpc/include/uapi/asm/ptrace.h .
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
>  create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>
> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
> new file mode 100644
> index 0000000..b97727c
> --- /dev/null
> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -0,0 +1,55 @@
> +#ifndef _ASM_POWERPC_PERF_REGS_H
> +#define _ASM_POWERPC_PERF_REGS_H
> +
> +enum perf_event_powerpc_regs {
> +	PERF_REG_POWERPC_GPR0,
> +	PERF_REG_POWERPC_GPR1,
> +	PERF_REG_POWERPC_GPR2,
> +	PERF_REG_POWERPC_GPR3,
> +	PERF_REG_POWERPC_GPR4,
> +	PERF_REG_POWERPC_GPR5,
> +	PERF_REG_POWERPC_GPR6,
> +	PERF_REG_POWERPC_GPR7,
> +	PERF_REG_POWERPC_GPR8,
> +	PERF_REG_POWERPC_GPR9,
> +	PERF_REG_POWERPC_GPR10,
> +	PERF_REG_POWERPC_GPR11,
> +	PERF_REG_POWERPC_GPR12,
> +	PERF_REG_POWERPC_GPR13,
> +	PERF_REG_POWERPC_GPR14,
> +	PERF_REG_POWERPC_GPR15,
> +	PERF_REG_POWERPC_GPR16,
> +	PERF_REG_POWERPC_GPR17,
> +	PERF_REG_POWERPC_GPR18,
> +	PERF_REG_POWERPC_GPR19,
> +	PERF_REG_POWERPC_GPR20,
> +	PERF_REG_POWERPC_GPR21,
> +	PERF_REG_POWERPC_GPR22,
> +	PERF_REG_POWERPC_GPR23,
> +	PERF_REG_POWERPC_GPR24,
> +	PERF_REG_POWERPC_GPR25,
> +	PERF_REG_POWERPC_GPR26,
> +	PERF_REG_POWERPC_GPR27,
> +	PERF_REG_POWERPC_GPR28,
> +	PERF_REG_POWERPC_GPR29,
> +	PERF_REG_POWERPC_GPR30,
> +	PERF_REG_POWERPC_GPR31,
> +	PERF_REG_POWERPC_NIP,
> +	PERF_REG_POWERPC_MSR,
> +	PERF_REG_POWERPC_ORIG_R3,
> +	PERF_REG_POWERPC_CTR,
> +	PERF_REG_POWERPC_LNK,
> +	PERF_REG_POWERPC_XER,
> +	PERF_REG_POWERPC_CCR,
> +#ifdef __powerpc64__
> +	PERF_REG_POWERPC_SOFTE,
> +#else
> +	PERF_REG_POWERPC_MQ,
> +#endif
> +	PERF_REG_POWERPC_TRAP,
> +	PERF_REG_POWERPC_DAR,
> +	PERF_REG_POWERPC_DSISR,
> +	PERF_REG_POWERPC_RESULT,

IIUC, We dont need "result". "PERF_REG_POWERPC_RESULT" will
always be zero, because of regs_get_register (asm/ptrace.h),
that you call in patch 3 of this patchset, will check for MAX_REG_OFFSET
and return 0 for "result".

Maddy

> +	PERF_REG_POWERPC_MAX,
> +};
> +#endif /* _ASM_POWERPC_PERF_REGS_H */

  reply	other threads:[~2015-10-28 10:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
2015-10-28 10:20   ` Madhavan Srinivasan [this message]
2015-10-26 12:44 ` [PATCH V2 2/3] tools/perf:Map the ID values with register names Anju T
2015-10-26 12:44 ` [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state Anju T
2015-10-30  7:34   ` Madhavan Srinivasan
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
2015-10-27 18:52   ` Anju T

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