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Subject: Re: [PATCH] cxl: Abstract the differences between the PSL and XSL
To: Ian Munsie <imunsie@au1.ibm.com>, Michael Ellerman <mpe@ellerman.id.au>,
 mikey <mikey@neuling.org>, linuxppc-dev@lists.ozlabs.org,
 Frederic Barrat <frederic.barrat@fr.ibm.com>,
 Huy Nguyen <huyn@mellanox.com>
References: <1464025158-23849-1-git-send-email-imunsie@au.ibm.com>
From: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
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Date: Fri, 27 May 2016 14:48:02 +0200
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Hi Ian,

It looks good, just one question:

> +/* XSL registers (Mellanox CX4) */
> +static const cxl_p1_reg_t CXL_XSL_Timebase  = {0x0100};
> +static const cxl_p1_reg_t CXL_XSL_TB_CTLSTAT = {0x0108};
> +static const cxl_p1_reg_t CXL_XSL_FEC       = {0x0158};
> +static const cxl_p1_reg_t CXL_XSL_DSNCTL    = {0x0168};

Out of curiosity, in which document did you get those offsets from? I 
remember there used to be some confusion about it. All I could find was 
the internal offsets the firmware remaps those to (in xsl databook).

Feel free to grab the "From:", since the patch has evolved since I 
worked on it. I don't care.

   Fred