From: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
To: Ian Munsie <imunsie@au1.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Michael Neuling <mikey@neuling.org>,
Andrew Donnellan <andrew.donnellan@au1.ibm.com>,
linuxppc-dev@lists.ozlabs.org, Huy Nguyen <huyn@mellanox.com>
Subject: Re: [PATCH 07/14] cxl: Add support for using the kernel API with a real PHB
Date: Wed, 6 Jul 2016 20:30:41 +0200 [thread overview]
Message-ID: <577D4E51.4040108@linux.vnet.ibm.com> (raw)
In-Reply-To: <1467638532-9250-8-git-send-email-imunsie@au.ibm.com>
> @@ -1572,6 +1575,9 @@ static pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev,
> */
> for (i = 0; i < adapter->slices; i++) {
> afu = adapter->afu[i];
> + /* Only participate in EEH if we are on a virtual PHB */
> + if (afu->phb == NULL)
> + return PCI_ERS_RESULT_NONE;
> cxl_vphb_error_detected(afu, state);
> }
Sorry, I had my notes out of order, something is bugging me here. Don't
we always define afu->phb, though for Mellanox (or if there's no config
record in the general case), we don't have any devices attached to it?
Which raises the question of the handling of slot_reset and resume
callbacks...
Fred
next prev parent reply other threads:[~2016-07-06 18:30 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-04 13:21 powerpc / cxl: Add support for the Mellanox CX4 in cxl mode Ian Munsie
2016-07-04 13:21 ` [PATCH 01/14] powerpc/powernv: Split cxl code out into a separate file Ian Munsie
2016-07-06 3:44 ` Andrew Donnellan
2016-07-06 16:27 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 02/14] cxl: Add cxl_slot_is_supported API Ian Munsie
2016-07-06 2:02 ` Andrew Donnellan
2016-07-06 16:36 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 03/14] cxl: Enable bus mastering for devices using CAPP DMA mode Ian Munsie
2016-07-06 4:04 ` Andrew Donnellan
2016-07-06 16:37 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 04/14] cxl: Move cxl_afu_get / cxl_afu_put to base Ian Munsie
2016-07-05 2:10 ` Andrew Donnellan
2016-07-06 16:45 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 05/14] cxl: Allow a default context to be associated with an external pci_dev Ian Munsie
2016-07-06 16:51 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 06/14] powerpc/powernv: Add support for the cxl kernel api on the real phb Ian Munsie
2016-07-06 17:38 ` Frederic Barrat
2016-07-07 6:28 ` Ian Munsie
2016-07-04 13:22 ` [PATCH 07/14] cxl: Add support for using the kernel API with a real PHB Ian Munsie
2016-07-06 17:39 ` Frederic Barrat
2016-07-06 18:30 ` Frederic Barrat [this message]
2016-07-07 6:32 ` Ian Munsie
2016-07-04 13:22 ` [PATCH 08/14] cxl: Add kernel APIs to get & set the max irqs per context Ian Munsie
2016-07-06 18:11 ` Frederic Barrat
2016-07-07 6:00 ` Ian Munsie
2016-07-04 13:22 ` [PATCH 09/14] cxl: Add preliminary workaround for CX4 interrupt limitation Ian Munsie
2016-07-06 18:34 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 10/14] cxl: Add support for interrupts on the Mellanox CX4 Ian Munsie
2016-07-06 18:41 ` Frederic Barrat
2016-07-07 6:03 ` Ian Munsie
2016-07-04 13:22 ` [PATCH 11/14] cxl: Workaround PE=0 hardware limitation in " Ian Munsie
2016-07-06 4:42 ` Andrew Donnellan
2016-07-06 18:42 ` Frederic Barrat
2016-07-04 13:22 ` [PATCH 12/14] PCI/hotplug: pnv_php: export symbols and move struct types needed by cxl Ian Munsie
2016-07-05 0:03 ` Gavin Shan
2016-07-05 1:08 ` Andrew Donnellan
2016-07-04 13:22 ` [PATCH 13/14] PCI/hotplug: pnv_php: handle OPAL_PCI_SLOT_OFFLINE power state Ian Munsie
2016-07-04 13:22 ` [PATCH 14/14] cxl: Add cxl_check_and_switch_mode() API to switch bi-modal cards Ian Munsie
2016-07-06 3:55 ` Andrew Donnellan
2016-07-06 18:51 ` Frederic Barrat
2016-07-07 1:18 ` Andrew Donnellan
2016-07-07 6:26 ` Ian Munsie
2016-07-07 6:44 ` Andrew Donnellan
2016-07-07 8:15 ` Andrew Donnellan
2016-07-11 9:19 ` Ian Munsie
2016-07-12 1:20 ` Andrew Donnellan
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