* [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-21 16:49 ` Christophe Leroy
2022-09-19 14:01 ` [RFC PATCH 2/7] powerpc/64: abstract asm global variable declaration and access Nicholas Piggin
` (5 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
Using a 16-bit constant for this marker allows it to be loaded with
a single 'li' instruction. On 64-bit this avoids a TOC entry and a
TOC load that depends on the r2 value that has just been loaded from
the PACA.
XXX: this probably should be 64-bit change and use 2 instruction
sequence that 32-bit uses, to avoid false positives.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/ptrace.h | 6 +++---
arch/powerpc/kernel/entry_32.S | 9 ++++-----
arch/powerpc/kernel/exceptions-64e.S | 8 +-------
arch/powerpc/kernel/exceptions-64s.S | 2 +-
arch/powerpc/kernel/head_32.h | 3 +--
arch/powerpc/kernel/head_64.S | 7 -------
arch/powerpc/kernel/head_booke.h | 3 +--
arch/powerpc/kernel/interrupt_64.S | 6 +++---
8 files changed, 14 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index a03403695cd4..f47066f7878e 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -115,10 +115,10 @@ struct pt_regs
#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
-#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
+#define STACK_FRAME_REGS_MARKER ASM_CONST(0xffffffffffffdead)
#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
-#define STACK_FRAME_MARKER 12
+#define STACK_FRAME_MARKER 1 /* Reuse CR+reserved word */
#ifdef CONFIG_PPC64_ELF_ABI_V2
#define STACK_FRAME_MIN_SIZE 32
@@ -136,7 +136,7 @@ struct pt_regs
#define KERNEL_REDZONE_SIZE 0
#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
-#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
+#define STACK_FRAME_REGS_MARKER ASM_CONST(0xffffba51)
#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
#define STACK_FRAME_MARKER 2
#define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 1d599df6f169..c221e764cefd 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -108,9 +108,8 @@ transfer_to_syscall:
#ifdef CONFIG_BOOKE_OR_40x
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
#endif
- lis r12,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
+ li r12,STACK_FRAME_REGS_MARKER /* exception frame marker */
SAVE_GPR(2, r1)
- addi r12,r12,STACK_FRAME_REGS_MARKER@l
stw r9,_MSR(r1)
li r2, INTERRUPT_SYSCALL
stw r12,8(r1)
@@ -265,7 +264,7 @@ fast_exception_return:
mtcr r10
lwz r10,_LINK(r11)
mtlr r10
- /* Clear the exception_marker on the stack to avoid confusing stacktrace */
+ /* Clear the STACK_FRAME_REGS_MARKER on the stack to avoid confusing stacktrace */
li r10, 0
stw r10, 8(r11)
REST_GPR(10, r11)
@@ -322,7 +321,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
li r0,0
/*
- * Leaving a stale exception_marker on the stack can confuse
+ * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
* the reliable stack unwinder later on. Clear it.
*/
stw r0,8(r1)
@@ -374,7 +373,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
mtspr SPRN_XER,r5
/*
- * Leaving a stale exception_marker on the stack can confuse
+ * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
* the reliable stack unwinder later on. Clear it.
*/
stw r0,8(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 67dc4e3179a0..08b7d6bd4da6 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -389,7 +389,7 @@ exc_##n##_common: \
ld r9,excf+EX_R1(r13); /* load orig r1 back from PACA */ \
lwz r10,excf+EX_CR(r13); /* load orig CR back from PACA */ \
lbz r11,PACAIRQSOFTMASK(r13); /* get current IRQ softe */ \
- ld r12,exception_marker@toc(r2); \
+ li r12,STACK_FRAME_REGS_MARKER; \
li r0,0; \
std r3,GPR10(r1); /* save r10 to stackframe */ \
std r4,GPR11(r1); /* save r11 to stackframe */ \
@@ -470,12 +470,6 @@ exc_##n##_bad_stack: \
bl hdlr; \
b interrupt_return
-/* This value is used to mark exception frames on the stack. */
- .section ".toc","aw"
-exception_marker:
- .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
-
-
/*
* And here we have the exception vectors !
*/
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 3d0dc133a9ae..5c110e5e5819 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -589,7 +589,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
li r9,IVEC
std r9,_TRAP(r1) /* set trap number */
li r10,0
- ld r11,exception_marker@toc(r2)
+ li r11,STACK_FRAME_REGS_MARKER
std r10,RESULT(r1) /* clear regs->result */
std r11,STACK_FRAME_OVERHEAD-16(r1) /* mark the frame */
.endm
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index c3286260a7d1..5cf80f29d839 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h
@@ -110,8 +110,7 @@ _ASM_NOKPROBE_SYMBOL(\name\()_virt)
.macro COMMON_EXCEPTION_PROLOG_END trapno
stw r0,GPR0(r1)
- lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
- addi r10,r10,STACK_FRAME_REGS_MARKER@l
+ li r10,STACK_FRAME_REGS_MARKER /* exception frame marker */
stw r10,8(r1)
li r10, \trapno
stw r10,_TRAP(r1)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index cf2c08902c05..cac3e1b58360 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -192,13 +192,6 @@ __secondary_hold:
#endif
CLOSE_FIXED_SECTION(first_256B)
-/* This value is used to mark exception frames on the stack. */
- .section ".toc","aw"
-/* This value is used to mark exception frames on the stack. */
-exception_marker:
- .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
- .previous
-
/*
* On server, we include the exception vectors code here as it
* relies on absolute addressing which is only possible within
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index bb6d5d0fc4ac..fe36237197c2 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -82,8 +82,7 @@ END_BTB_FLUSH_SECTION
.macro COMMON_EXCEPTION_PROLOG_END trapno
stw r0,GPR0(r1)
- lis r10, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
- addi r10, r10, STACK_FRAME_REGS_MARKER@l
+ li r10, STACK_FRAME_REGS_MARKER /* exception frame marker */
stw r10, 8(r1)
li r10, \trapno
stw r10,_TRAP(r1)
diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index ce25b28cf418..14c409fd4c38 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -92,7 +92,7 @@ _ASM_NOKPROBE_SYMBOL(system_call_vectored_\name)
std r11,_TRAP(r1)
std r12,_CCR(r1)
addi r10,r1,STACK_FRAME_OVERHEAD
- ld r11,exception_marker@toc(r2)
+ li r11,STACK_FRAME_REGS_MARKER
std r11,-16(r10) /* "regshere" marker */
BEGIN_FTR_SECTION
@@ -276,7 +276,7 @@ END_BTB_FLUSH_SECTION
std r11,_TRAP(r1)
std r12,_CCR(r1)
addi r10,r1,STACK_FRAME_OVERHEAD
- ld r11,exception_marker@toc(r2)
+ li r11,STACK_FRAME_REGS_MARKER
std r11,-16(r10) /* "regshere" marker */
#ifdef CONFIG_PPC_BOOK3S
@@ -619,7 +619,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
mtspr SPRN_XER,r5
/*
- * Leaving a stale exception_marker on the stack can confuse
+ * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
* the reliable stack unwinder later on. Clear it.
*/
std r0,STACK_FRAME_OVERHEAD-16(r1)
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER
2022-09-19 14:01 ` [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER Nicholas Piggin
@ 2022-09-21 16:49 ` Christophe Leroy
2022-09-23 7:32 ` Michael Ellerman
0 siblings, 1 reply; 17+ messages in thread
From: Christophe Leroy @ 2022-09-21 16:49 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev@lists.ozlabs.org; +Cc: Alan Modra
Le 19/09/2022 à 16:01, Nicholas Piggin a écrit :
> Using a 16-bit constant for this marker allows it to be loaded with
> a single 'li' instruction. On 64-bit this avoids a TOC entry and a
> TOC load that depends on the r2 value that has just been loaded from
> the PACA.
>
> XXX: this probably should be 64-bit change and use 2 instruction
> sequence that 32-bit uses, to avoid false positives.
Yes would probably be safer ? It is only one instruction more, would
likely be unnoticeable.
Why value 0xffffba51 ?
Why not 0xffffdead like PPC64 ?
Christophe
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/include/asm/ptrace.h | 6 +++---
> arch/powerpc/kernel/entry_32.S | 9 ++++-----
> arch/powerpc/kernel/exceptions-64e.S | 8 +-------
> arch/powerpc/kernel/exceptions-64s.S | 2 +-
> arch/powerpc/kernel/head_32.h | 3 +--
> arch/powerpc/kernel/head_64.S | 7 -------
> arch/powerpc/kernel/head_booke.h | 3 +--
> arch/powerpc/kernel/interrupt_64.S | 6 +++---
> 8 files changed, 14 insertions(+), 30 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
> index a03403695cd4..f47066f7878e 100644
> --- a/arch/powerpc/include/asm/ptrace.h
> +++ b/arch/powerpc/include/asm/ptrace.h
> @@ -115,10 +115,10 @@ struct pt_regs
>
> #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
> #define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
> -#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
> +#define STACK_FRAME_REGS_MARKER ASM_CONST(0xffffffffffffdead)
> #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
> STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
> -#define STACK_FRAME_MARKER 12
> +#define STACK_FRAME_MARKER 1 /* Reuse CR+reserved word */
>
> #ifdef CONFIG_PPC64_ELF_ABI_V2
> #define STACK_FRAME_MIN_SIZE 32
> @@ -136,7 +136,7 @@ struct pt_regs
> #define KERNEL_REDZONE_SIZE 0
> #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
> #define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
> -#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
> +#define STACK_FRAME_REGS_MARKER ASM_CONST(0xffffba51)
> #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
> #define STACK_FRAME_MARKER 2
> #define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD
> diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
> index 1d599df6f169..c221e764cefd 100644
> --- a/arch/powerpc/kernel/entry_32.S
> +++ b/arch/powerpc/kernel/entry_32.S
> @@ -108,9 +108,8 @@ transfer_to_syscall:
> #ifdef CONFIG_BOOKE_OR_40x
> rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
> #endif
> - lis r12,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
> + li r12,STACK_FRAME_REGS_MARKER /* exception frame marker */
> SAVE_GPR(2, r1)
> - addi r12,r12,STACK_FRAME_REGS_MARKER@l
> stw r9,_MSR(r1)
> li r2, INTERRUPT_SYSCALL
> stw r12,8(r1)
> @@ -265,7 +264,7 @@ fast_exception_return:
> mtcr r10
> lwz r10,_LINK(r11)
> mtlr r10
> - /* Clear the exception_marker on the stack to avoid confusing stacktrace */
> + /* Clear the STACK_FRAME_REGS_MARKER on the stack to avoid confusing stacktrace */
> li r10, 0
> stw r10, 8(r11)
> REST_GPR(10, r11)
> @@ -322,7 +321,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
> li r0,0
>
> /*
> - * Leaving a stale exception_marker on the stack can confuse
> + * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
> * the reliable stack unwinder later on. Clear it.
> */
> stw r0,8(r1)
> @@ -374,7 +373,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
> mtspr SPRN_XER,r5
>
> /*
> - * Leaving a stale exception_marker on the stack can confuse
> + * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
> * the reliable stack unwinder later on. Clear it.
> */
> stw r0,8(r1)
> diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
> index 67dc4e3179a0..08b7d6bd4da6 100644
> --- a/arch/powerpc/kernel/exceptions-64e.S
> +++ b/arch/powerpc/kernel/exceptions-64e.S
> @@ -389,7 +389,7 @@ exc_##n##_common: \
> ld r9,excf+EX_R1(r13); /* load orig r1 back from PACA */ \
> lwz r10,excf+EX_CR(r13); /* load orig CR back from PACA */ \
> lbz r11,PACAIRQSOFTMASK(r13); /* get current IRQ softe */ \
> - ld r12,exception_marker@toc(r2); \
> + li r12,STACK_FRAME_REGS_MARKER; \
> li r0,0; \
> std r3,GPR10(r1); /* save r10 to stackframe */ \
> std r4,GPR11(r1); /* save r11 to stackframe */ \
> @@ -470,12 +470,6 @@ exc_##n##_bad_stack: \
> bl hdlr; \
> b interrupt_return
>
> -/* This value is used to mark exception frames on the stack. */
> - .section ".toc","aw"
> -exception_marker:
> - .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
> -
> -
> /*
> * And here we have the exception vectors !
> */
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index 3d0dc133a9ae..5c110e5e5819 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -589,7 +589,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
> li r9,IVEC
> std r9,_TRAP(r1) /* set trap number */
> li r10,0
> - ld r11,exception_marker@toc(r2)
> + li r11,STACK_FRAME_REGS_MARKER
> std r10,RESULT(r1) /* clear regs->result */
> std r11,STACK_FRAME_OVERHEAD-16(r1) /* mark the frame */
> .endm
> diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
> index c3286260a7d1..5cf80f29d839 100644
> --- a/arch/powerpc/kernel/head_32.h
> +++ b/arch/powerpc/kernel/head_32.h
> @@ -110,8 +110,7 @@ _ASM_NOKPROBE_SYMBOL(\name\()_virt)
>
> .macro COMMON_EXCEPTION_PROLOG_END trapno
> stw r0,GPR0(r1)
> - lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
> - addi r10,r10,STACK_FRAME_REGS_MARKER@l
> + li r10,STACK_FRAME_REGS_MARKER /* exception frame marker */
> stw r10,8(r1)
> li r10, \trapno
> stw r10,_TRAP(r1)
> diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
> index cf2c08902c05..cac3e1b58360 100644
> --- a/arch/powerpc/kernel/head_64.S
> +++ b/arch/powerpc/kernel/head_64.S
> @@ -192,13 +192,6 @@ __secondary_hold:
> #endif
> CLOSE_FIXED_SECTION(first_256B)
>
> -/* This value is used to mark exception frames on the stack. */
> - .section ".toc","aw"
> -/* This value is used to mark exception frames on the stack. */
> -exception_marker:
> - .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
> - .previous
> -
> /*
> * On server, we include the exception vectors code here as it
> * relies on absolute addressing which is only possible within
> diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
> index bb6d5d0fc4ac..fe36237197c2 100644
> --- a/arch/powerpc/kernel/head_booke.h
> +++ b/arch/powerpc/kernel/head_booke.h
> @@ -82,8 +82,7 @@ END_BTB_FLUSH_SECTION
>
> .macro COMMON_EXCEPTION_PROLOG_END trapno
> stw r0,GPR0(r1)
> - lis r10, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
> - addi r10, r10, STACK_FRAME_REGS_MARKER@l
> + li r10, STACK_FRAME_REGS_MARKER /* exception frame marker */
> stw r10, 8(r1)
> li r10, \trapno
> stw r10,_TRAP(r1)
> diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
> index ce25b28cf418..14c409fd4c38 100644
> --- a/arch/powerpc/kernel/interrupt_64.S
> +++ b/arch/powerpc/kernel/interrupt_64.S
> @@ -92,7 +92,7 @@ _ASM_NOKPROBE_SYMBOL(system_call_vectored_\name)
> std r11,_TRAP(r1)
> std r12,_CCR(r1)
> addi r10,r1,STACK_FRAME_OVERHEAD
> - ld r11,exception_marker@toc(r2)
> + li r11,STACK_FRAME_REGS_MARKER
> std r11,-16(r10) /* "regshere" marker */
>
> BEGIN_FTR_SECTION
> @@ -276,7 +276,7 @@ END_BTB_FLUSH_SECTION
> std r11,_TRAP(r1)
> std r12,_CCR(r1)
> addi r10,r1,STACK_FRAME_OVERHEAD
> - ld r11,exception_marker@toc(r2)
> + li r11,STACK_FRAME_REGS_MARKER
> std r11,-16(r10) /* "regshere" marker */
>
> #ifdef CONFIG_PPC_BOOK3S
> @@ -619,7 +619,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
> mtspr SPRN_XER,r5
>
> /*
> - * Leaving a stale exception_marker on the stack can confuse
> + * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
> * the reliable stack unwinder later on. Clear it.
> */
> std r0,STACK_FRAME_OVERHEAD-16(r1)
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER
2022-09-21 16:49 ` Christophe Leroy
@ 2022-09-23 7:32 ` Michael Ellerman
2022-09-23 7:35 ` Christophe Leroy
0 siblings, 1 reply; 17+ messages in thread
From: Michael Ellerman @ 2022-09-23 7:32 UTC (permalink / raw)
To: Christophe Leroy, Nicholas Piggin, linuxppc-dev@lists.ozlabs.org
Cc: Alan Modra
Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> Le 19/09/2022 à 16:01, Nicholas Piggin a écrit :
>> Using a 16-bit constant for this marker allows it to be loaded with
>> a single 'li' instruction. On 64-bit this avoids a TOC entry and a
>> TOC load that depends on the r2 value that has just been loaded from
>> the PACA.
>>
>> XXX: this probably should be 64-bit change and use 2 instruction
>> sequence that 32-bit uses, to avoid false positives.
>
> Yes would probably be safer ? It is only one instruction more, would
> likely be unnoticeable.
Yeah "regshere" has definitely saved me some time over the years
starting at memory dumps.
I'd settle for 0xffffffff + "regs".
cheers
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER
2022-09-23 7:32 ` Michael Ellerman
@ 2022-09-23 7:35 ` Christophe Leroy
0 siblings, 0 replies; 17+ messages in thread
From: Christophe Leroy @ 2022-09-23 7:35 UTC (permalink / raw)
To: Michael Ellerman, Nicholas Piggin, linuxppc-dev@lists.ozlabs.org
Cc: Alan Modra
Le 23/09/2022 à 09:32, Michael Ellerman a écrit :
> Christophe Leroy <christophe.leroy@csgroup.eu> writes:
>> Le 19/09/2022 à 16:01, Nicholas Piggin a écrit :
>>> Using a 16-bit constant for this marker allows it to be loaded with
>>> a single 'li' instruction. On 64-bit this avoids a TOC entry and a
>>> TOC load that depends on the r2 value that has just been loaded from
>>> the PACA.
>>>
>>> XXX: this probably should be 64-bit change and use 2 instruction
>>> sequence that 32-bit uses, to avoid false positives.
>>
>> Yes would probably be safer ? It is only one instruction more, would
>> likely be unnoticeable.
>
> Yeah "regshere" has definitely saved me some time over the years
> starting at memory dumps.
>
> I'd settle for 0xffffffff + "regs".
That's not a sign-extended 32 bits value ....
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC PATCH 2/7] powerpc/64: abstract asm global variable declaration and access
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-21 16:51 ` Christophe Leroy
2022-09-19 14:01 ` [RFC PATCH 3/7] powerpc/64: provide a helper macro to load r2 with the kernel TOC Nicholas Piggin
` (4 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
Use asm helpers to access global variables and to define them in asm.
Stop using got addressing and use the more common @toc offsets. 32-bit
already does this so that should be unchanged.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/boot/opal-calls.S | 6 +-
arch/powerpc/boot/ppc_asm.h | 4 ++
arch/powerpc/include/asm/ppc_asm.h | 72 ++++++++++++++++++++-
arch/powerpc/kernel/interrupt_64.S | 10 ---
arch/powerpc/kernel/swsusp_asm64.S | 22 ++++---
arch/powerpc/kernel/trace/ftrace_mprofile.S | 3 +-
arch/powerpc/kernel/vector.S | 41 ++++--------
arch/powerpc/lib/copypage_64.S | 9 ++-
arch/powerpc/lib/string_64.S | 9 ++-
arch/powerpc/perf/bhrb.S | 2 +-
arch/powerpc/platforms/pseries/hvCall.S | 10 +--
arch/powerpc/xmon/spr_access.S | 4 +-
12 files changed, 118 insertions(+), 74 deletions(-)
diff --git a/arch/powerpc/boot/opal-calls.S b/arch/powerpc/boot/opal-calls.S
index ad0e15d930c4..1f2f330a459e 100644
--- a/arch/powerpc/boot/opal-calls.S
+++ b/arch/powerpc/boot/opal-calls.S
@@ -16,7 +16,7 @@ opal_kentry:
li r5, 0
li r6, 0
li r7, 0
- ld r11,opal@got(r2)
+ LOAD_REG_ADDR(r11, opal)
ld r8,0(r11)
ld r9,8(r11)
bctr
@@ -35,7 +35,7 @@ opal_call:
mr r13,r2
/* Set opal return address */
- ld r11,opal_return@got(r2)
+ LOAD_REG_ADDR(r11, opal_return)
mtlr r11
mfmsr r12
@@ -45,7 +45,7 @@ opal_call:
mtspr SPRN_HSRR1,r12
/* load the opal call entry point and base */
- ld r11,opal@got(r2)
+ LOAD_REG_ADDR(r11, opal)
ld r12,8(r11)
ld r2,0(r11)
mtspr SPRN_HSRR0,r12
diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_asm.h
index 192b97523b05..ea290bf78fb2 100644
--- a/arch/powerpc/boot/ppc_asm.h
+++ b/arch/powerpc/boot/ppc_asm.h
@@ -84,4 +84,8 @@
#define MFTBU(dest) mfspr dest, SPRN_TBRU
#endif
+#define LOAD_REG_ADDR(reg,name) \
+ addis reg,r2,name@toc@ha; \
+ addi reg,reg,name@toc@l
+
#endif /* _PPC64_PPC_ASM_H */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 83c02f5a7f2a..520c4c9caf7f 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -303,6 +303,75 @@ GLUE(.,name):
.endif
.endm
+.macro declare_var name, align
+ .type \name,@object
+# .section ".toc","aw"
+ .data
+ .balign \align
+\name\():
+.endm
+
+.macro declare_var_end
+ .previous
+.endm
+
+.macro load_var_addr reg, name
+ addis \reg,%r2,\name\()@toc@ha
+ addi \reg,\reg,\name\()@toc@l
+.endm
+
+.macro load_var reg, name, size
+ addis \reg,%r2,\name\()@toc@ha
+ .if \size == 1
+ lbz \reg,\name\()@toc@l(\reg)
+ .elseif \size == 2
+ lhz \reg,\name\()@toc@l(\reg)
+ .elseif \size == 4
+ lwz \reg,\name\()@toc@l(\reg)
+ .elseif \size == 8
+ ld \reg,\name\()@toc@l(\reg)
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro store_var reg, name, size
+ addis \reg,%r2,\name\()@toc@ha
+ .if \size == 1
+ pstb \reg,\name\()@toc@l(\reg)
+ .elseif \size == 2
+ psth \reg,\name\()@toc@l(\reg)
+ .elseif \size == 4
+ pstw \reg,\name\()@toc@l(\reg)
+ .elseif \size == 8
+ pstd \reg,\name\()@toc@l(\reg)
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro fload_var reg, tmpreg, name, size
+ addis \tmpreg,%r2,\name\()@toc@ha
+ .if \size == 4
+ lfs \reg,\name\()@toc@l(\tmpreg)
+ .elseif \size == 8
+ lfd \reg,\name\()@toc@l(\tmpreg)
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro fstore_var reg, tmpreg, name, size
+ addis \tmpreg,%r2,\name\()@toc@ha
+ .if \size == 4
+ stfs \reg,\name\()@toc@l(\tmpreg)
+ .elseif \size == 8
+ stfd \reg,\name\()@toc@l(\tmpreg)
+ .else
+ .error "bad size"
+ .endif
+.endm
+
#ifdef __powerpc64__
#define LOAD_REG_IMMEDIATE(reg, expr) __LOAD_REG_IMMEDIATE reg, expr
@@ -315,7 +384,8 @@ GLUE(.,name):
rldimi reg, tmp, 32, 0
#define LOAD_REG_ADDR(reg,name) \
- ld reg,name@got(r2)
+ addis reg,r2,name@toc@ha; \
+ addi reg,reg,name@toc@l
#define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name)
#define ADDROFF(name) 0
diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index 14c409fd4c38..e95911f49eb8 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -13,16 +13,6 @@
#include <asm/ppc_asm.h>
#include <asm/ptrace.h>
- .section ".toc","aw"
-SYS_CALL_TABLE:
- .tc sys_call_table[TC],sys_call_table
-
-#ifdef CONFIG_COMPAT
-COMPAT_SYS_CALL_TABLE:
- .tc compat_sys_call_table[TC],compat_sys_call_table
-#endif
- .previous
-
.align 7
.macro DEBUG_SRR_VALID srr
diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S
index 9f1903c7f540..bc1f8335219b 100644
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -76,16 +76,18 @@
swsusp_save_area:
.space SL_SIZE
- .section ".toc","aw"
-swsusp_save_area_ptr:
- .tc swsusp_save_area[TC],swsusp_save_area
-restore_pblist_ptr:
- .tc restore_pblist[TC],restore_pblist
+declare_var swsusp_save_area_ptr, 8
+ .quad swsusp_save_area
+declare_var_end
+
+declare_var restore_pblist_ptr, 8
+ .quad restore_pblist
+declare_var_end
.section .text
.align 5
_GLOBAL(swsusp_arch_suspend)
- ld r11,swsusp_save_area_ptr@toc(r2)
+ load_var r11, swsusp_save_area_ptr, 8
SAVE_SPECIAL(LR)
SAVE_REGISTER(r1)
SAVE_SPECIAL(CR)
@@ -131,7 +133,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
bl swsusp_save
/* restore LR */
- ld r11,swsusp_save_area_ptr@toc(r2)
+ load_var r11, swsusp_save_area_ptr, 8
RESTORE_SPECIAL(LR)
addi r1,r1,128
@@ -145,7 +147,7 @@ BEGIN_FTR_SECTION
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
sync
- ld r12,restore_pblist_ptr@toc(r2)
+ load_var r12, restore_pblist_ptr, 8
ld r12,0(r12)
cmpdi r12,0
@@ -187,7 +189,7 @@ nothing_to_copy:
tlbia
#endif
- ld r11,swsusp_save_area_ptr@toc(r2)
+ load_var r11, swsusp_save_area_ptr, 8
RESTORE_SPECIAL(CR)
@@ -265,7 +267,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
bl do_after_copyback
addi r1,r1,128
- ld r11,swsusp_save_area_ptr@toc(r2)
+ load_var r11, swsusp_save_area_ptr, 8
RESTORE_SPECIAL(LR)
li r3, 0
diff --git a/arch/powerpc/kernel/trace/ftrace_mprofile.S b/arch/powerpc/kernel/trace/ftrace_mprofile.S
index 4fa23e260cab..33fcfb2eaded 100644
--- a/arch/powerpc/kernel/trace/ftrace_mprofile.S
+++ b/arch/powerpc/kernel/trace/ftrace_mprofile.S
@@ -85,8 +85,7 @@
std r2, STK_GOT(r1)
ld r2,PACATOC(r13) /* get kernel TOC in r2 */
- addis r3,r2,function_trace_op@toc@ha
- addi r3,r3,function_trace_op@toc@l
+ LOAD_REG_ADDR(r3, function_trace_op)
ld r5,0(r3)
#else
lis r3,function_trace_op@ha
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 5cc24d8cce94..1ccc8aeb29fb 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -155,33 +155,18 @@ _GLOBAL(load_up_vsx)
* usage of floating-point registers. These routines must be called
* with preempt disabled.
*/
-#ifdef CONFIG_PPC32
- .data
-fpzero:
- .long 0
-fpone:
- .long 0x3f800000 /* 1.0 in single-precision FP */
-fphalf:
- .long 0x3f000000 /* 0.5 in single-precision FP */
-
-#define LDCONST(fr, name) \
- lis r11,name@ha; \
- lfs fr,name@l(r11)
-#else
+declare_var fpzero, 8
+ .quad 0
+declare_var_end
- .section ".toc","aw"
-fpzero:
- .tc FD_0_0[TC],0
-fpone:
- .tc FD_3ff00000_0[TC],0x3ff0000000000000 /* 1.0 */
-fphalf:
- .tc FD_3fe00000_0[TC],0x3fe0000000000000 /* 0.5 */
+declare_var fpone, 8
+ .quad 0x3ff0000000000000
+declare_var_end
-#define LDCONST(fr, name) \
- lfd fr,name@toc(r2)
-#endif
+declare_var fphalf, 8
+ .quad 0x3fe0000000000000
+declare_var_end
- .text
/*
* Internal routine to enable floating point and set FPSCR to 0.
* Don't call it from C; it doesn't use the normal calling convention.
@@ -199,7 +184,7 @@ fpenable:
stfd fr0,24(r1)
stfd fr1,16(r1)
stfd fr31,8(r1)
- LDCONST(fr1, fpzero)
+ fload_var fr1, r11, fpzero, 4
mffs fr31
MTFSF_L(fr1)
blr
@@ -297,7 +282,7 @@ _GLOBAL(vrefp)
mflr r12
bl fpenable
li r0,4
- LDCONST(fr1, fpone)
+ fload_var fr1, r11, fpone, 4
mtctr r0
li r6,0
1: lfsx fr0,r4,r6
@@ -321,8 +306,8 @@ _GLOBAL(vrsqrtefp)
stfd fr4,48(r1)
stfd fr5,56(r1)
li r0,4
- LDCONST(fr4, fpone)
- LDCONST(fr5, fphalf)
+ fload_var fr4, r11, fpone, 4
+ fload_var fr5, r11, fphalf, 4
mtctr r0
li r6,0
1: lfsx fr0,r4,r6
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index d1091b5ee5da..cfff67161011 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -9,10 +9,9 @@
#include <asm/export.h>
#include <asm/feature-fixups.h>
- .section ".toc","aw"
-PPC64_CACHES:
- .tc ppc64_caches[TC],ppc64_caches
- .section ".text"
+declare_var caches, 8
+ .quad ppc64_caches
+declare_var_end
_GLOBAL_TOC(copy_page)
BEGIN_FTR_SECTION
@@ -24,7 +23,7 @@ FTR_SECTION_ELSE
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
ori r5,r5,PAGE_SIZE@l
BEGIN_FTR_SECTION
- ld r10,PPC64_CACHES@toc(r2)
+ load_var r10, caches, 8
lwz r11,DCACHEL1LOGBLOCKSIZE(r10) /* log2 of cache block size */
lwz r12,DCACHEL1BLOCKSIZE(r10) /* get cache block size */
li r9,0
diff --git a/arch/powerpc/lib/string_64.S b/arch/powerpc/lib/string_64.S
index 169872bc0892..157b2e73285c 100644
--- a/arch/powerpc/lib/string_64.S
+++ b/arch/powerpc/lib/string_64.S
@@ -11,10 +11,9 @@
#include <asm/asm-offsets.h>
#include <asm/export.h>
- .section ".toc","aw"
-PPC64_CACHES:
- .tc ppc64_caches[TC],ppc64_caches
- .section ".text"
+declare_var caches, 8
+ .quad ppc64_caches
+declare_var_end
/**
* __arch_clear_user: - Zero a block of memory in user space, with less checking.
@@ -133,7 +132,7 @@ err1; stb r0,0(r3)
blr
.Llong_clear:
- ld r5,PPC64_CACHES@toc(r2)
+ load_var r5, caches, 8
bf cr7*4+0,11f
err2; std r0,0(r3)
diff --git a/arch/powerpc/perf/bhrb.S b/arch/powerpc/perf/bhrb.S
index 1aa3259716b8..47ba05d5ae76 100644
--- a/arch/powerpc/perf/bhrb.S
+++ b/arch/powerpc/perf/bhrb.S
@@ -21,7 +21,7 @@
_GLOBAL(read_bhrb)
cmpldi r3,31
bgt 1f
- ld r4,bhrb_table@got(r2)
+ LOAD_REG_ADDR(r4, bhrb_table)
sldi r3,r3,3
add r3,r4,r3
mtctr r3
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index ab9fc6506861..0a42e1e7a577 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -16,13 +16,9 @@
#ifdef CONFIG_TRACEPOINTS
#ifndef CONFIG_JUMP_LABEL
- .section ".toc","aw"
-
- .globl hcall_tracepoint_refcount
-hcall_tracepoint_refcount:
+declare_var hcall_tracepoint_refcount, 8
.8byte 0
-
- .section ".text"
+declare_var_end
#endif
/*
@@ -88,7 +84,7 @@ hcall_tracepoint_refcount:
BEGIN_FTR_SECTION; \
b 1f; \
END_FTR_SECTION(0, 1); \
- ld r12,hcall_tracepoint_refcount@toc(r2); \
+ load_var r12, hcall_tracepoint_refcount, 8 ; \
std r12,32(r1); \
cmpdi r12,0; \
bne- LABEL; \
diff --git a/arch/powerpc/xmon/spr_access.S b/arch/powerpc/xmon/spr_access.S
index 720a52afdd58..c308ddf268fb 100644
--- a/arch/powerpc/xmon/spr_access.S
+++ b/arch/powerpc/xmon/spr_access.S
@@ -4,12 +4,12 @@
/* unsigned long xmon_mfspr(sprn, default_value) */
_GLOBAL(xmon_mfspr)
- PPC_LL r5, .Lmfspr_table@got(r2)
+ LOAD_REG_ADDR(r5, .Lmfspr_table)
b xmon_mxspr
/* void xmon_mtspr(sprn, new_value) */
_GLOBAL(xmon_mtspr)
- PPC_LL r5, .Lmtspr_table@got(r2)
+ LOAD_REG_ADDR(r5, .Lmtspr_table)
b xmon_mxspr
/*
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC PATCH 2/7] powerpc/64: abstract asm global variable declaration and access
2022-09-19 14:01 ` [RFC PATCH 2/7] powerpc/64: abstract asm global variable declaration and access Nicholas Piggin
@ 2022-09-21 16:51 ` Christophe Leroy
0 siblings, 0 replies; 17+ messages in thread
From: Christophe Leroy @ 2022-09-21 16:51 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev@lists.ozlabs.org; +Cc: Alan Modra
Le 19/09/2022 à 16:01, Nicholas Piggin a écrit :
> Use asm helpers to access global variables and to define them in asm.
> Stop using got addressing and use the more common @toc offsets. 32-bit
> already does this so that should be unchanged.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_asm.h
> index 192b97523b05..ea290bf78fb2 100644
> --- a/arch/powerpc/boot/ppc_asm.h
> +++ b/arch/powerpc/boot/ppc_asm.h
> @@ -84,4 +84,8 @@
> #define MFTBU(dest) mfspr dest, SPRN_TBRU
> #endif
>
> +#define LOAD_REG_ADDR(reg,name) \
> + addis reg,r2,name@toc@ha; \
> + addi reg,reg,name@toc@l
> +
> #endif /* _PPC64_PPC_ASM_H */
Wouldn't it be better as a GAS macro ?
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC PATCH 3/7] powerpc/64: provide a helper macro to load r2 with the kernel TOC
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 1/7] powerpc: use 16-bit immediate for STACK_FRAME_REGS_MARKER Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 2/7] powerpc/64: abstract asm global variable declaration and access Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-21 16:52 ` Christophe Leroy
2022-09-19 14:01 ` [RFC PATCH 4/7] powerpc: add CFUNC assembly label annotation Nicholas Piggin
` (3 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
A later change stops the kernel using r2 and loads it with a poison
value. Provide a PACATOC loading abstraction which can hide this
detail.
XXX: 64e, KVM, ftrace not entirely done
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/ppc_asm.h | 3 +++
arch/powerpc/kernel/exceptions-64e.S | 4 ++--
arch/powerpc/kernel/exceptions-64s.S | 6 +++---
arch/powerpc/kernel/head_64.S | 4 ++--
arch/powerpc/kernel/interrupt_64.S | 12 ++++++------
arch/powerpc/kernel/optprobes_head.S | 2 +-
arch/powerpc/kernel/trace/ftrace_mprofile.S | 4 ++--
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +-
8 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 520c4c9caf7f..c0848303151c 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -374,6 +374,9 @@ GLUE(.,name):
#ifdef __powerpc64__
+#define LOAD_PACA_TOC() \
+ ld r2,PACATOC(r13)
+
#define LOAD_REG_IMMEDIATE(reg, expr) __LOAD_REG_IMMEDIATE reg, expr
#define LOAD_REG_IMMEDIATE_SYM(reg, tmp, expr) \
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 08b7d6bd4da6..bc76950201b6 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -382,7 +382,7 @@ exc_##n##_common: \
ld r4,excf+EX_R11(r13); /* get back r11 */ \
mfspr r5,scratch; /* get back r13 */ \
std r12,GPR12(r1); /* save r12 in stackframe */ \
- ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
+ LOAD_PACA_TOC(); /* get kernel TOC into r2 */ \
mflr r6; /* save LR in stackframe */ \
mfctr r7; /* save CTR in stackframe */ \
mfspr r8,SPRN_XER; /* save XER in stackframe */ \
@@ -1073,7 +1073,7 @@ bad_stack_book3e:
std r11,0(r1)
li r12,0
std r12,0(r11)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
1: addi r3,r1,STACK_FRAME_OVERHEAD
bl kernel_bad_stack
b 1b
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 5c110e5e5819..9a06f2c8e326 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -580,7 +580,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
std r2,GPR2(r1) /* save r2 in stackframe */
SAVE_GPRS(3, 8, r1) /* save r3 - r8 in stackframe */
mflr r9 /* Get LR, later save to stack */
- ld r2,PACATOC(r13) /* get kernel TOC into r2 */
+ LOAD_PACA_TOC() /* get kernel TOC into r2 */
std r9,_LINK(r1)
lbz r10,PACAIRQSOFTMASK(r13)
mfspr r11,SPRN_XER /* save XER in stackframe */
@@ -610,7 +610,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
.macro SEARCH_RESTART_TABLE
#ifdef CONFIG_RELOCATABLE
mr r12,r2
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
LOAD_REG_ADDR(r9, __start___restart_table)
LOAD_REG_ADDR(r10, __stop___restart_table)
mr r2,r12
@@ -640,7 +640,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
.macro SEARCH_SOFT_MASK_TABLE
#ifdef CONFIG_RELOCATABLE
mr r12,r2
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
LOAD_REG_ADDR(r9, __start___soft_mask_table)
LOAD_REG_ADDR(r10, __stop___soft_mask_table)
mr r2,r12
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index cac3e1b58360..80106aaf0b7a 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -841,7 +841,7 @@ __secondary_start:
* before going into C code.
*/
start_secondary_prolog:
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
li r3,0
std r3,0(r1) /* Zero the stack frame pointer */
bl start_secondary
@@ -981,7 +981,7 @@ start_here_common:
std r1,PACAKSAVE(r13)
/* Load the TOC (virtual address) */
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
/* Mark interrupts soft and hard disabled (they might be enabled
* in the PACA when doing hotplug)
diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index e95911f49eb8..6d5c105457dd 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -57,7 +57,7 @@ _ASM_NOKPROBE_SYMBOL(system_call_vectored_\name)
std r0,GPR0(r1)
std r10,GPR1(r1)
std r2,GPR2(r1)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
mfcr r12
li r11,0
/* Can we avoid saving r3-r8 in common case? */
@@ -185,7 +185,7 @@ syscall_vectored_\name\()_restart:
_ASM_NOKPROBE_SYMBOL(syscall_vectored_\name\()_restart)
GET_PACA(r13)
ld r1,PACA_EXIT_SAVE_R1(r13)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
ld r3,RESULT(r1)
addi r4,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
@@ -235,7 +235,7 @@ START_BTB_FLUSH_SECTION
BTB_FLUSH(r10)
END_BTB_FLUSH_SECTION
#endif
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
mfcr r12
li r11,0
/* Can we avoid saving r3-r8 in common case? */
@@ -378,7 +378,7 @@ syscall_restart:
_ASM_NOKPROBE_SYMBOL(syscall_restart)
GET_PACA(r13)
ld r1,PACA_EXIT_SAVE_R1(r13)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
ld r3,RESULT(r1)
addi r4,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
@@ -525,7 +525,7 @@ interrupt_return_\srr\()_user_restart:
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user_restart)
GET_PACA(r13)
ld r1,PACA_EXIT_SAVE_R1(r13)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
addi r3,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
@@ -658,7 +658,7 @@ interrupt_return_\srr\()_kernel_restart:
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel_restart)
GET_PACA(r13)
ld r1,PACA_EXIT_SAVE_R1(r13)
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
addi r3,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
diff --git a/arch/powerpc/kernel/optprobes_head.S b/arch/powerpc/kernel/optprobes_head.S
index 5c7f0b4b784b..cd4e7bc32609 100644
--- a/arch/powerpc/kernel/optprobes_head.S
+++ b/arch/powerpc/kernel/optprobes_head.S
@@ -73,7 +73,7 @@ optprobe_template_entry:
* further below.
*/
#ifdef CONFIG_PPC64
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
#endif
.global optprobe_template_op_address
diff --git a/arch/powerpc/kernel/trace/ftrace_mprofile.S b/arch/powerpc/kernel/trace/ftrace_mprofile.S
index 33fcfb2eaded..38c132ffc4b8 100644
--- a/arch/powerpc/kernel/trace/ftrace_mprofile.S
+++ b/arch/powerpc/kernel/trace/ftrace_mprofile.S
@@ -83,8 +83,8 @@
#ifdef CONFIG_PPC64
/* Save callee's TOC in the ABI compliant location */
std r2, STK_GOT(r1)
- ld r2,PACATOC(r13) /* get kernel TOC in r2 */
-
+ LOAD_PACA_TOC() /* get kernel TOC in r2 */
+ /* XXX: could be load_var */
LOAD_REG_ADDR(r3, function_trace_op)
ld r5,0(r3)
#else
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index e5acc33b3b20..0ed95f753416 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -57,7 +57,7 @@ opal_return:
.long 0xa64b7b7d /* mthsrr1 r11 */
.long 0x2402004c /* hrfid */
#endif
- ld r2,PACATOC(r13)
+ LOAD_PACA_TOC()
ld r0,PPC_LR_STKOFF(r1)
mtlr r0
blr
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC PATCH 3/7] powerpc/64: provide a helper macro to load r2 with the kernel TOC
2022-09-19 14:01 ` [RFC PATCH 3/7] powerpc/64: provide a helper macro to load r2 with the kernel TOC Nicholas Piggin
@ 2022-09-21 16:52 ` Christophe Leroy
0 siblings, 0 replies; 17+ messages in thread
From: Christophe Leroy @ 2022-09-21 16:52 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev@lists.ozlabs.org; +Cc: Alan Modra
Le 19/09/2022 à 16:01, Nicholas Piggin a écrit :
> A later change stops the kernel using r2 and loads it with a poison
> value. Provide a PACATOC loading abstraction which can hide this
> detail.
>
> XXX: 64e, KVM, ftrace not entirely done
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/include/asm/ppc_asm.h | 3 +++
> arch/powerpc/kernel/exceptions-64e.S | 4 ++--
> arch/powerpc/kernel/exceptions-64s.S | 6 +++---
> arch/powerpc/kernel/head_64.S | 4 ++--
> arch/powerpc/kernel/interrupt_64.S | 12 ++++++------
> arch/powerpc/kernel/optprobes_head.S | 2 +-
> arch/powerpc/kernel/trace/ftrace_mprofile.S | 4 ++--
> arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +-
> 8 files changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
> index 520c4c9caf7f..c0848303151c 100644
> --- a/arch/powerpc/include/asm/ppc_asm.h
> +++ b/arch/powerpc/include/asm/ppc_asm.h
> @@ -374,6 +374,9 @@ GLUE(.,name):
>
> #ifdef __powerpc64__
>
> +#define LOAD_PACA_TOC() \
> + ld r2,PACATOC(r13)
> +
Wouldn't it be better as a GAS macro ?
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC PATCH 4/7] powerpc: add CFUNC assembly label annotation
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
` (2 preceding siblings ...)
2022-09-19 14:01 ` [RFC PATCH 3/7] powerpc/64: provide a helper macro to load r2 with the kernel TOC Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags Nicholas Piggin
` (2 subsequent siblings)
6 siblings, 0 replies; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
This macro is to be used in assembly where C functions are called.
pcrel addressing mode requires branches to functions with a
localentry value of 1 to have either a trailing nop or @notoc.
This macro permits the latter without changing callers.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/include/asm/ppc_asm.h | 5 ++
arch/powerpc/kernel/exceptions-64s.S | 108 ++++++++++++------------
arch/powerpc/kernel/head_64.S | 12 +--
arch/powerpc/kernel/interrupt_64.S | 28 +++---
arch/powerpc/kernel/misc_64.S | 2 +-
arch/powerpc/kernel/vdso/gettimeofday.S | 2 +-
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 16 ++--
arch/powerpc/lib/copypage_power7.S | 4 +-
arch/powerpc/lib/copyuser_power7.S | 8 +-
arch/powerpc/lib/hweight_64.S | 8 +-
arch/powerpc/lib/memcmp_64.S | 4 +-
arch/powerpc/lib/memcpy_power7.S | 6 +-
arch/powerpc/platforms/pseries/hvCall.S | 4 +-
13 files changed, 106 insertions(+), 101 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index c0848303151c..ab8adf2b833f 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -139,6 +139,11 @@
#ifdef __KERNEL__
+/*
+ * Used to name C functions called from asm
+ */
+#define CFUNC(name) name
+
/*
* We use __powerpc64__ here because we want the compat VDSO to use the 32-bit
* version below in the else case of the ifdef.
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 9a06f2c8e326..08d322ab5980 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -997,7 +997,7 @@ EXC_COMMON_BEGIN(system_reset_common)
__GEN_COMMON_BODY system_reset
addi r3,r1,STACK_FRAME_OVERHEAD
- bl system_reset_exception
+ bl CFUNC(system_reset_exception)
/* Clear MSR_RI before setting SRR0 and SRR1. */
li r9,0
@@ -1143,7 +1143,7 @@ BEGIN_FTR_SECTION
bl enable_machine_check
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
addi r3,r1,STACK_FRAME_OVERHEAD
- bl machine_check_early
+ bl CFUNC(machine_check_early)
std r3,RESULT(r1) /* Save result */
ld r12,_MSR(r1)
@@ -1204,7 +1204,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
* Queue up the MCE event so that we can log it later, while
* returning from kernel or opal call.
*/
- bl machine_check_queue_event
+ bl CFUNC(machine_check_queue_event)
MACHINE_CHECK_HANDLER_WINDUP
RFI_TO_KERNEL
@@ -1230,7 +1230,7 @@ EXC_COMMON_BEGIN(machine_check_common)
*/
GEN_COMMON machine_check
addi r3,r1,STACK_FRAME_OVERHEAD
- bl machine_check_exception_async
+ bl CFUNC(machine_check_exception_async)
b interrupt_return_srr
@@ -1240,7 +1240,7 @@ EXC_COMMON_BEGIN(machine_check_common)
* done. Queue the event then call the idle code to do the wake up.
*/
EXC_COMMON_BEGIN(machine_check_idle_common)
- bl machine_check_queue_event
+ bl CFUNC(machine_check_queue_event)
/*
* GPR-loss wakeups are relatively straightforward, because the
@@ -1279,7 +1279,7 @@ EXC_COMMON_BEGIN(unrecoverable_mce)
BEGIN_FTR_SECTION
li r10,0 /* clear MSR_RI */
mtmsrd r10,1
- bl disable_machine_check
+ bl CFUNC(disable_machine_check)
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
ld r10,PACAKMSR(r13)
li r3,MSR_ME
@@ -1296,14 +1296,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
* the early handler which is a true NMI.
*/
addi r3,r1,STACK_FRAME_OVERHEAD
- bl machine_check_exception
+ bl CFUNC(machine_check_exception)
/*
* We will not reach here. Even if we did, there is no way out.
* Call unrecoverable_exception and die.
*/
addi r3,r1,STACK_FRAME_OVERHEAD
- bl unrecoverable_exception
+ bl CFUNC(unrecoverable_exception)
b .
@@ -1358,16 +1358,16 @@ EXC_COMMON_BEGIN(data_access_common)
bne- 1f
#ifdef CONFIG_PPC_64S_HASH_MMU
BEGIN_MMU_FTR_SECTION
- bl do_hash_fault
+ bl CFUNC(do_hash_fault)
MMU_FTR_SECTION_ELSE
- bl do_page_fault
+ bl CFUNC(do_page_fault)
ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
#else
- bl do_page_fault
+ bl CFUNC(do_page_fault)
#endif
b interrupt_return_srr
-1: bl do_break
+1: bl CFUNC(do_break)
/*
* do_break() may have changed the NV GPRS while handling a breakpoint.
* If so, we need to restore them with their updated values.
@@ -1411,7 +1411,7 @@ EXC_COMMON_BEGIN(data_access_slb_common)
BEGIN_MMU_FTR_SECTION
/* HPT case, do SLB fault */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_slb_fault
+ bl CFUNC(do_slb_fault)
cmpdi r3,0
bne- 1f
b fast_interrupt_return_srr
@@ -1425,7 +1425,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
#endif
std r3,RESULT(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_bad_segment_interrupt
+ bl CFUNC(do_bad_segment_interrupt)
b interrupt_return_srr
@@ -1459,12 +1459,12 @@ EXC_COMMON_BEGIN(instruction_access_common)
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_64S_HASH_MMU
BEGIN_MMU_FTR_SECTION
- bl do_hash_fault
+ bl CFUNC(do_hash_fault)
MMU_FTR_SECTION_ELSE
- bl do_page_fault
+ bl CFUNC(do_page_fault)
ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
#else
- bl do_page_fault
+ bl CFUNC(do_page_fault)
#endif
b interrupt_return_srr
@@ -1499,7 +1499,7 @@ EXC_COMMON_BEGIN(instruction_access_slb_common)
BEGIN_MMU_FTR_SECTION
/* HPT case, do SLB fault */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_slb_fault
+ bl CFUNC(do_slb_fault)
cmpdi r3,0
bne- 1f
b fast_interrupt_return_srr
@@ -1513,7 +1513,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
#endif
std r3,RESULT(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_bad_segment_interrupt
+ bl CFUNC(do_bad_segment_interrupt)
b interrupt_return_srr
@@ -1567,7 +1567,7 @@ EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100)
EXC_COMMON_BEGIN(hardware_interrupt_common)
GEN_COMMON hardware_interrupt
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_IRQ
+ bl CFUNC(do_IRQ)
BEGIN_FTR_SECTION
b interrupt_return_hsrr
FTR_SECTION_ELSE
@@ -1597,7 +1597,7 @@ EXC_VIRT_END(alignment, 0x4600, 0x100)
EXC_COMMON_BEGIN(alignment_common)
GEN_COMMON alignment
addi r3,r1,STACK_FRAME_OVERHEAD
- bl alignment_exception
+ bl CFUNC(alignment_exception)
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
b interrupt_return_srr
@@ -1707,7 +1707,7 @@ EXC_COMMON_BEGIN(program_check_common)
.Ldo_program_check:
addi r3,r1,STACK_FRAME_OVERHEAD
- bl program_check_exception
+ bl CFUNC(program_check_exception)
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
b interrupt_return_srr
@@ -1738,7 +1738,7 @@ EXC_COMMON_BEGIN(fp_unavailable_common)
GEN_COMMON fp_unavailable
bne 1f /* if from user, just load it up */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl kernel_fp_unavailable_exception
+ bl CFUNC(kernel_fp_unavailable_exception)
0: trap
EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0
1:
@@ -1751,12 +1751,12 @@ BEGIN_FTR_SECTION
bne- 2f
END_FTR_SECTION_IFSET(CPU_FTR_TM)
#endif
- bl load_up_fpu
+ bl CFUNC(load_up_fpu)
b fast_interrupt_return_srr
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2: /* User process was in a transaction */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl fp_unavailable_tm
+ bl CFUNC(fp_unavailable_tm)
b interrupt_return_srr
#endif
@@ -1800,7 +1800,7 @@ EXC_VIRT_END(decrementer, 0x4900, 0x80)
EXC_COMMON_BEGIN(decrementer_common)
GEN_COMMON decrementer
addi r3,r1,STACK_FRAME_OVERHEAD
- bl timer_interrupt
+ bl CFUNC(timer_interrupt)
b interrupt_return_srr
@@ -1886,9 +1886,9 @@ EXC_COMMON_BEGIN(doorbell_super_common)
GEN_COMMON doorbell_super
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_DOORBELL
- bl doorbell_exception
+ bl CFUNC(doorbell_exception)
#else
- bl unknown_async_exception
+ bl CFUNC(unknown_async_exception)
#endif
b interrupt_return_srr
@@ -2052,7 +2052,7 @@ EXC_VIRT_END(single_step, 0x4d00, 0x100)
EXC_COMMON_BEGIN(single_step_common)
GEN_COMMON single_step
addi r3,r1,STACK_FRAME_OVERHEAD
- bl single_step_exception
+ bl CFUNC(single_step_exception)
b interrupt_return_srr
@@ -2087,9 +2087,9 @@ EXC_COMMON_BEGIN(h_data_storage_common)
GEN_COMMON h_data_storage
addi r3,r1,STACK_FRAME_OVERHEAD
BEGIN_MMU_FTR_SECTION
- bl do_bad_page_fault_segv
+ bl CFUNC(do_bad_page_fault_segv)
MMU_FTR_SECTION_ELSE
- bl unknown_exception
+ bl CFUNC(unknown_exception)
ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_TYPE_RADIX)
b interrupt_return_hsrr
@@ -2115,7 +2115,7 @@ EXC_VIRT_END(h_instr_storage, 0x4e20, 0x20)
EXC_COMMON_BEGIN(h_instr_storage_common)
GEN_COMMON h_instr_storage
addi r3,r1,STACK_FRAME_OVERHEAD
- bl unknown_exception
+ bl CFUNC(unknown_exception)
b interrupt_return_hsrr
@@ -2138,7 +2138,7 @@ EXC_VIRT_END(emulation_assist, 0x4e40, 0x20)
EXC_COMMON_BEGIN(emulation_assist_common)
GEN_COMMON emulation_assist
addi r3,r1,STACK_FRAME_OVERHEAD
- bl emulation_assist_interrupt
+ bl CFUNC(emulation_assist_interrupt)
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
b interrupt_return_hsrr
@@ -2198,7 +2198,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
__GEN_COMMON_BODY hmi_exception_early
addi r3,r1,STACK_FRAME_OVERHEAD
- bl hmi_exception_realmode
+ bl CFUNC(hmi_exception_realmode)
cmpdi cr0,r3,0
bne 1f
@@ -2216,7 +2216,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
EXC_COMMON_BEGIN(hmi_exception_common)
GEN_COMMON hmi_exception
addi r3,r1,STACK_FRAME_OVERHEAD
- bl handle_hmi_exception
+ bl CFUNC(handle_hmi_exception)
b interrupt_return_hsrr
@@ -2251,9 +2251,9 @@ EXC_COMMON_BEGIN(h_doorbell_common)
GEN_COMMON h_doorbell
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_PPC_DOORBELL
- bl doorbell_exception
+ bl CFUNC(doorbell_exception)
#else
- bl unknown_async_exception
+ bl CFUNC(unknown_async_exception)
#endif
b interrupt_return_hsrr
@@ -2286,7 +2286,7 @@ EXC_VIRT_END(h_virt_irq, 0x4ea0, 0x20)
EXC_COMMON_BEGIN(h_virt_irq_common)
GEN_COMMON h_virt_irq
addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_IRQ
+ bl CFUNC(do_IRQ)
b interrupt_return_hsrr
@@ -2332,7 +2332,7 @@ EXC_VIRT_END(performance_monitor, 0x4f00, 0x20)
EXC_COMMON_BEGIN(performance_monitor_common)
GEN_COMMON performance_monitor
addi r3,r1,STACK_FRAME_OVERHEAD
- bl performance_monitor_exception
+ bl CFUNC(performance_monitor_exception)
b interrupt_return_srr
@@ -2369,19 +2369,19 @@ BEGIN_FTR_SECTION
bne- 2f
END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
#endif
- bl load_up_altivec
+ bl CFUNC(load_up_altivec)
b fast_interrupt_return_srr
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2: /* User process was in a transaction */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl altivec_unavailable_tm
+ bl CFUNC(altivec_unavailable_tm)
b interrupt_return_srr
#endif
1:
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
#endif
addi r3,r1,STACK_FRAME_OVERHEAD
- bl altivec_unavailable_exception
+ bl CFUNC(altivec_unavailable_exception)
b interrupt_return_srr
@@ -2422,14 +2422,14 @@ BEGIN_FTR_SECTION
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2: /* User process was in a transaction */
addi r3,r1,STACK_FRAME_OVERHEAD
- bl vsx_unavailable_tm
+ bl CFUNC(vsx_unavailable_tm)
b interrupt_return_srr
#endif
1:
END_FTR_SECTION_IFSET(CPU_FTR_VSX)
#endif
addi r3,r1,STACK_FRAME_OVERHEAD
- bl vsx_unavailable_exception
+ bl CFUNC(vsx_unavailable_exception)
b interrupt_return_srr
@@ -2456,7 +2456,7 @@ EXC_VIRT_END(facility_unavailable, 0x4f60, 0x20)
EXC_COMMON_BEGIN(facility_unavailable_common)
GEN_COMMON facility_unavailable
addi r3,r1,STACK_FRAME_OVERHEAD
- bl facility_unavailable_exception
+ bl CFUNC(facility_unavailable_exception)
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
b interrupt_return_srr
@@ -2484,7 +2484,7 @@ EXC_VIRT_END(h_facility_unavailable, 0x4f80, 0x20)
EXC_COMMON_BEGIN(h_facility_unavailable_common)
GEN_COMMON h_facility_unavailable
addi r3,r1,STACK_FRAME_OVERHEAD
- bl facility_unavailable_exception
+ bl CFUNC(facility_unavailable_exception)
REST_NVGPRS(r1) /* XXX Shouldn't be necessary in practice */
b interrupt_return_hsrr
@@ -2514,7 +2514,7 @@ EXC_VIRT_NONE(0x5200, 0x100)
EXC_COMMON_BEGIN(cbe_system_error_common)
GEN_COMMON cbe_system_error
addi r3,r1,STACK_FRAME_OVERHEAD
- bl cbe_system_error_exception
+ bl CFUNC(cbe_system_error_exception)
b interrupt_return_hsrr
#else /* CONFIG_CBE_RAS */
@@ -2545,7 +2545,7 @@ EXC_VIRT_END(instruction_breakpoint, 0x5300, 0x100)
EXC_COMMON_BEGIN(instruction_breakpoint_common)
GEN_COMMON instruction_breakpoint
addi r3,r1,STACK_FRAME_OVERHEAD
- bl instruction_breakpoint_exception
+ bl CFUNC(instruction_breakpoint_exception)
b interrupt_return_srr
@@ -2667,7 +2667,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
EXC_COMMON_BEGIN(denorm_exception_common)
GEN_COMMON denorm_exception
addi r3,r1,STACK_FRAME_OVERHEAD
- bl unknown_exception
+ bl CFUNC(unknown_exception)
b interrupt_return_hsrr
@@ -2684,7 +2684,7 @@ EXC_VIRT_NONE(0x5600, 0x100)
EXC_COMMON_BEGIN(cbe_maintenance_common)
GEN_COMMON cbe_maintenance
addi r3,r1,STACK_FRAME_OVERHEAD
- bl cbe_maintenance_exception
+ bl CFUNC(cbe_maintenance_exception)
b interrupt_return_hsrr
#else /* CONFIG_CBE_RAS */
@@ -2710,10 +2710,10 @@ EXC_COMMON_BEGIN(altivec_assist_common)
GEN_COMMON altivec_assist
addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_ALTIVEC
- bl altivec_assist_exception
+ bl CFUNC(altivec_assist_exception)
REST_NVGPRS(r1) /* instruction emulation may change GPRs */
#else
- bl unknown_exception
+ bl CFUNC(unknown_exception)
#endif
b interrupt_return_srr
@@ -2731,7 +2731,7 @@ EXC_VIRT_NONE(0x5800, 0x100)
EXC_COMMON_BEGIN(cbe_thermal_common)
GEN_COMMON cbe_thermal
addi r3,r1,STACK_FRAME_OVERHEAD
- bl cbe_thermal_exception
+ bl CFUNC(cbe_thermal_exception)
b interrupt_return_hsrr
#else /* CONFIG_CBE_RAS */
@@ -2764,7 +2764,7 @@ EXC_COMMON_BEGIN(soft_nmi_common)
__GEN_COMMON_BODY soft_nmi
addi r3,r1,STACK_FRAME_OVERHEAD
- bl soft_nmi_interrupt
+ bl CFUNC(soft_nmi_interrupt)
/* Clear MSR_RI before setting SRR0 and SRR1. */
li r9,0
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 80106aaf0b7a..6b04f327263e 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -567,7 +567,7 @@ __boot_from_prom:
/* Do all of the interaction with OF client interface */
mr r8,r26
- bl prom_init
+ bl CFUNC(prom_init)
#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
/* We never return. We also hit that trap if trying to boot
@@ -805,7 +805,7 @@ __secondary_start:
* can turn it on below. This is a call to C, which is OK, we're still
* running on the emergency stack.
*/
- bl early_setup_secondary
+ bl CFUNC(early_setup_secondary)
/*
* The primary has initialized our kernel stack for us in the paca, grab
@@ -844,7 +844,7 @@ start_secondary_prolog:
LOAD_PACA_TOC()
li r3,0
std r3,0(r1) /* Zero the stack frame pointer */
- bl start_secondary
+ bl CFUNC(start_secondary)
b .
/*
* Reset stack pointer and call start_secondary
@@ -855,7 +855,7 @@ _GLOBAL(start_secondary_resume)
ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
li r3,0
std r3,0(r1) /* Zero the stack frame pointer */
- bl start_secondary
+ bl CFUNC(start_secondary)
b .
#endif
@@ -959,7 +959,7 @@ start_here_multiplatform:
*/
#ifdef CONFIG_KASAN
- bl kasan_early_init
+ bl CFUNC(kasan_early_init)
#endif
/* Restore parameters passed from prom_init/kexec */
mr r3,r31
@@ -992,7 +992,7 @@ start_here_common:
stb r0,PACAIRQHAPPENED(r13)
/* Generic kernel entry */
- bl start_kernel
+ bl CFUNC(start_kernel)
/* Not reached */
0: trap
diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
index 6d5c105457dd..202fce2a9271 100644
--- a/arch/powerpc/kernel/interrupt_64.S
+++ b/arch/powerpc/kernel/interrupt_64.S
@@ -100,12 +100,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
/* Calling convention has r9 = orig r0, r10 = regs */
mr r9,r0
- bl system_call_exception
+ bl CFUNC(system_call_exception)
.Lsyscall_vectored_\name\()_exit:
addi r4,r1,STACK_FRAME_OVERHEAD
li r5,1 /* scv */
- bl syscall_exit_prepare
+ bl CFUNC(syscall_exit_prepare)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
.Lsyscall_vectored_\name\()_rst_start:
lbz r11,PACAIRQHAPPENED(r13)
@@ -190,7 +190,7 @@ _ASM_NOKPROBE_SYMBOL(syscall_vectored_\name\()_restart)
addi r4,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
- bl syscall_exit_restart
+ bl CFUNC(syscall_exit_restart)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
b .Lsyscall_vectored_\name\()_rst_start
1:
@@ -290,12 +290,12 @@ END_BTB_FLUSH_SECTION
/* Calling convention has r9 = orig r0, r10 = regs */
mr r9,r0
- bl system_call_exception
+ bl CFUNC(system_call_exception)
.Lsyscall_exit:
addi r4,r1,STACK_FRAME_OVERHEAD
li r5,0 /* !scv */
- bl syscall_exit_prepare
+ bl CFUNC(syscall_exit_prepare)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
#ifdef CONFIG_PPC_BOOK3S
.Lsyscall_rst_start:
@@ -383,7 +383,7 @@ _ASM_NOKPROBE_SYMBOL(syscall_restart)
addi r4,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
- bl syscall_exit_restart
+ bl CFUNC(syscall_exit_restart)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
b .Lsyscall_rst_start
1:
@@ -412,7 +412,7 @@ _ASM_NOKPROBE_SYMBOL(fast_interrupt_return_srr)
li r3,0 /* 0 return value, no EMULATE_STACK_STORE */
bne+ .Lfast_kernel_interrupt_return_srr
addi r3,r1,STACK_FRAME_OVERHEAD
- bl unrecoverable_exception
+ bl CFUNC(unrecoverable_exception)
b . /* should not get here */
#else
bne .Lfast_user_interrupt_return_srr
@@ -430,7 +430,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\())
interrupt_return_\srr\()_user: /* make backtraces match the _kernel variant */
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user)
addi r3,r1,STACK_FRAME_OVERHEAD
- bl interrupt_exit_user_prepare
+ bl CFUNC(interrupt_exit_user_prepare)
cmpdi r3,0
bne- .Lrestore_nvgprs_\srr
.Lrestore_nvgprs_\srr\()_cont:
@@ -529,7 +529,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user_restart)
addi r3,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
- bl interrupt_exit_user_restart
+ bl CFUNC(interrupt_exit_user_restart)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
b .Linterrupt_return_\srr\()_user_rst_start
1:
@@ -542,7 +542,7 @@ RESTART_TABLE(.Linterrupt_return_\srr\()_user_rst_start, .Linterrupt_return_\srr
interrupt_return_\srr\()_kernel:
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel)
addi r3,r1,STACK_FRAME_OVERHEAD
- bl interrupt_exit_kernel_prepare
+ bl CFUNC(interrupt_exit_kernel_prepare)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
.Linterrupt_return_\srr\()_kernel_rst_start:
@@ -662,7 +662,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel_restart)
addi r3,r1,STACK_FRAME_OVERHEAD
li r11,IRQS_ALL_DISABLED
stb r11,PACAIRQSOFTMASK(r13)
- bl interrupt_exit_kernel_restart
+ bl CFUNC(interrupt_exit_kernel_restart)
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
b .Linterrupt_return_\srr\()_kernel_rst_start
1:
@@ -684,20 +684,20 @@ DEFINE_FIXED_SYMBOL(__end_soft_masked, text)
#ifdef CONFIG_PPC_BOOK3S
_GLOBAL(ret_from_fork_scv)
- bl schedule_tail
+ bl CFUNC(schedule_tail)
REST_NVGPRS(r1)
li r3,0 /* fork() return value */
b .Lsyscall_vectored_common_exit
#endif
_GLOBAL(ret_from_fork)
- bl schedule_tail
+ bl CFUNC(schedule_tail)
REST_NVGPRS(r1)
li r3,0 /* fork() return value */
b .Lsyscall_exit
_GLOBAL(ret_from_kernel_thread)
- bl schedule_tail
+ bl CFUNC(schedule_tail)
REST_NVGPRS(r1)
mtctr r14
mr r3,r15
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index fd6d8d3a548e..677464d387d9 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -430,7 +430,7 @@ _GLOBAL(kexec_sequence)
1:
/* copy dest pages, flush whole dest image */
mr r3,r29
- bl kexec_copy_flush /* (image) */
+ bl CFUNC(kexec_copy_flush) /* (image) */
/* turn off mmu now if not done earlier */
cmpdi r26,0
diff --git a/arch/powerpc/kernel/vdso/gettimeofday.S b/arch/powerpc/kernel/vdso/gettimeofday.S
index 0c4ecc8fec5a..fd2ee40ce438 100644
--- a/arch/powerpc/kernel/vdso/gettimeofday.S
+++ b/arch/powerpc/kernel/vdso/gettimeofday.S
@@ -38,7 +38,7 @@
.else
addi r4, r5, VDSO_DATA_OFFSET
.endif
- bl DOTSYM(\funct)
+ bl DOTSYM(\funct)CFUNC()
PPC_LL r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1)
#ifdef __powerpc64__
PPC_LL r2, PPC_MIN_STKFRM + STK_GOT(r1)
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 7ded202bf995..6663540e53d0 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -379,7 +379,7 @@ kvm_secondary_got_guest:
bne kvm_no_guest
li r3,0 /* NULL argument */
- bl hmi_exception_realmode
+ bl CFUNC(hmi_exception_realmode)
/*
* At this point we have finished executing in the guest.
* We need to wait for hwthread_req to become zero, since
@@ -456,7 +456,7 @@ kvm_unsplit_nap:
cmpwi r12, BOOK3S_INTERRUPT_HMI
bne 55f
li r3, 0 /* NULL argument */
- bl hmi_exception_realmode
+ bl CFUNC(hmi_exception_realmode)
55:
/*
* Ensure that secondary doesn't nap when it has
@@ -857,7 +857,7 @@ deliver_guest_interrupt: /* r4 = vcpu, r13 = paca */
cmpdi r0, 0
beq 71f
mr r3, r4
- bl kvmppc_guest_entry_inject_int
+ bl CFUNC(kvmppc_guest_entry_inject_int)
ld r4, HSTATE_KVM_VCPU(r13)
71:
ld r6, VCPU_SRR0(r4)
@@ -1540,7 +1540,7 @@ kvmppc_guest_external:
/* External interrupt, first check for host_ipi. If this is
* set, we know the host wants us out so let's do it now
*/
- bl kvmppc_read_intr
+ bl CFUNC(kvmppc_read_intr)
/*
* Restore the active volatile registers after returning from
@@ -1622,7 +1622,7 @@ kvmppc_hdsi:
/* Search the hash table. */
mr r3, r9 /* vcpu pointer */
li r7, 1 /* data fault */
- bl kvmppc_hpte_hv_fault
+ bl CFUNC(kvmppc_hpte_hv_fault)
ld r9, HSTATE_KVM_VCPU(r13)
ld r10, VCPU_PC(r9)
ld r11, VCPU_MSR(r9)
@@ -1698,7 +1698,7 @@ kvmppc_hisi:
mr r4, r10
mr r6, r11
li r7, 0 /* instruction fault */
- bl kvmppc_hpte_hv_fault
+ bl CFUNC(kvmppc_hpte_hv_fault)
ld r9, HSTATE_KVM_VCPU(r13)
ld r10, VCPU_PC(r9)
ld r11, VCPU_MSR(r9)
@@ -2338,7 +2338,7 @@ hmi_realmode:
lbz r0, HSTATE_PTID(r13)
cmpwi r0, 0
bne guest_exit_cont
- bl kvmppc_realmode_hmi_handler
+ bl CFUNC(kvmppc_realmode_hmi_handler)
ld r9, HSTATE_KVM_VCPU(r13)
li r12, BOOK3S_INTERRUPT_HMI
b guest_exit_cont
@@ -2409,7 +2409,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
7: mflr r0
std r0, PPC_LR_STKOFF(r1)
stdu r1, -PPC_MIN_STKFRM(r1)
- bl kvmppc_read_intr
+ bl CFUNC(kvmppc_read_intr)
nop
li r12, BOOK3S_INTERRUPT_EXTERNAL
cmpdi r3, 1
diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S
index a9844c6353cf..a783973f1215 100644
--- a/arch/powerpc/lib/copypage_power7.S
+++ b/arch/powerpc/lib/copypage_power7.S
@@ -45,7 +45,7 @@ _GLOBAL(copypage_power7)
std r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
std r0,16(r1)
stdu r1,-STACKFRAMESIZE(r1)
- bl enter_vmx_ops
+ bl CFUNC(enter_vmx_ops)
cmpwi r3,0
ld r0,STACKFRAMESIZE+16(r1)
ld r3,STK_REG(R31)(r1)
@@ -88,7 +88,7 @@ _GLOBAL(copypage_power7)
addi r3,r3,128
bdnz 1b
- b exit_vmx_ops /* tail call optimise */
+ b CFUNC(exit_vmx_ops) /* tail call optimise */
#else
li r0,(PAGE_SIZE/128)
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index 28f0be523c06..ac41053c3a5a 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -47,7 +47,7 @@
ld r15,STK_REG(R15)(r1)
ld r14,STK_REG(R14)(r1)
.Ldo_err3:
- bl exit_vmx_usercopy
+ bl CFUNC(exit_vmx_usercopy)
ld r0,STACKFRAMESIZE+16(r1)
mtlr r0
b .Lexit
@@ -272,7 +272,7 @@ err1; stb r0,0(r3)
mflr r0
std r0,16(r1)
stdu r1,-STACKFRAMESIZE(r1)
- bl enter_vmx_usercopy
+ bl CFUNC(enter_vmx_usercopy)
cmpwi cr1,r3,0
ld r0,STACKFRAMESIZE+16(r1)
ld r3,STK_REG(R31)(r1)
@@ -488,7 +488,7 @@ err3; lbz r0,0(r4)
err3; stb r0,0(r3)
15: addi r1,r1,STACKFRAMESIZE
- b exit_vmx_usercopy /* tail call optimise */
+ b CFUNC(exit_vmx_usercopy) /* tail call optimise */
.Lvmx_unaligned_copy:
/* Get the destination 16B aligned */
@@ -691,5 +691,5 @@ err3; lbz r0,0(r4)
err3; stb r0,0(r3)
15: addi r1,r1,STACKFRAMESIZE
- b exit_vmx_usercopy /* tail call optimise */
+ b CFUNC(exit_vmx_usercopy) /* tail call optimise */
#endif /* CONFIG_ALTIVEC */
diff --git a/arch/powerpc/lib/hweight_64.S b/arch/powerpc/lib/hweight_64.S
index 6effad901ef7..09af29561314 100644
--- a/arch/powerpc/lib/hweight_64.S
+++ b/arch/powerpc/lib/hweight_64.S
@@ -14,7 +14,7 @@
_GLOBAL(__arch_hweight8)
BEGIN_FTR_SECTION
- b __sw_hweight8
+ b CFUNC(__sw_hweight8)
nop
nop
FTR_SECTION_ELSE
@@ -26,7 +26,7 @@ EXPORT_SYMBOL(__arch_hweight8)
_GLOBAL(__arch_hweight16)
BEGIN_FTR_SECTION
- b __sw_hweight16
+ b CFUNC(__sw_hweight16)
nop
nop
nop
@@ -49,7 +49,7 @@ EXPORT_SYMBOL(__arch_hweight16)
_GLOBAL(__arch_hweight32)
BEGIN_FTR_SECTION
- b __sw_hweight32
+ b CFUNC(__sw_hweight32)
nop
nop
nop
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(__arch_hweight32)
_GLOBAL(__arch_hweight64)
BEGIN_FTR_SECTION
- b __sw_hweight64
+ b CFUNC(__sw_hweight64)
nop
nop
nop
diff --git a/arch/powerpc/lib/memcmp_64.S b/arch/powerpc/lib/memcmp_64.S
index 384218df71ba..0b9b1685a33d 100644
--- a/arch/powerpc/lib/memcmp_64.S
+++ b/arch/powerpc/lib/memcmp_64.S
@@ -44,7 +44,7 @@
std r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
std r0,16(r1); \
stdu r1,-STACKFRAMESIZE(r1); \
- bl enter_vmx_ops; \
+ bl CFUNC(enter_vmx_ops); \
cmpwi cr1,r3,0; \
ld r0,STACKFRAMESIZE+16(r1); \
ld r3,STK_REG(R31)(r1); \
@@ -60,7 +60,7 @@
std r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
std r0,16(r1); \
stdu r1,-STACKFRAMESIZE(r1); \
- bl exit_vmx_ops; \
+ bl CFUNC(exit_vmx_ops); \
ld r0,STACKFRAMESIZE+16(r1); \
ld r3,STK_REG(R31)(r1); \
ld r4,STK_REG(R30)(r1); \
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 54f226333c94..9398b2b746c4 100644
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -218,7 +218,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
std r5,-STACKFRAMESIZE+STK_REG(R29)(r1)
std r0,16(r1)
stdu r1,-STACKFRAMESIZE(r1)
- bl enter_vmx_ops
+ bl CFUNC(enter_vmx_ops)
cmpwi cr1,r3,0
ld r0,STACKFRAMESIZE+16(r1)
ld r3,STK_REG(R31)(r1)
@@ -433,7 +433,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
15: addi r1,r1,STACKFRAMESIZE
ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
- b exit_vmx_ops /* tail call optimise */
+ b CFUNC(exit_vmx_ops) /* tail call optimise */
.Lvmx_unaligned_copy:
/* Get the destination 16B aligned */
@@ -637,5 +637,5 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
15: addi r1,r1,STACKFRAMESIZE
ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
- b exit_vmx_ops /* tail call optimise */
+ b CFUNC(exit_vmx_ops) /* tail call optimise */
#endif /* CONFIG_ALTIVEC */
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 0a42e1e7a577..6ec0baa88709 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -38,7 +38,7 @@ declare_var_end
std r0,16(r1); \
addi r4,r1,STK_PARAM(FIRST_REG); \
stdu r1,-STACK_FRAME_OVERHEAD(r1); \
- bl __trace_hcall_entry; \
+ bl CFUNC(__trace_hcall_entry); \
ld r3,STACK_FRAME_OVERHEAD+STK_PARAM(R3)(r1); \
ld r4,STACK_FRAME_OVERHEAD+STK_PARAM(R4)(r1); \
ld r5,STACK_FRAME_OVERHEAD+STK_PARAM(R5)(r1); \
@@ -57,7 +57,7 @@ declare_var_end
std r3,STACK_FRAME_OVERHEAD+STK_PARAM(R3)(r1); \
mr r4,r3; \
mr r3,r0; \
- bl __trace_hcall_exit; \
+ bl CFUNC(__trace_hcall_exit); \
ld r0,STACK_FRAME_OVERHEAD+16(r1); \
addi r1,r1,STACK_FRAME_OVERHEAD; \
ld r3,STK_PARAM(R3)(r1); \
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
` (3 preceding siblings ...)
2022-09-19 14:01 ` [RFC PATCH 4/7] powerpc: add CFUNC assembly label annotation Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-20 22:16 ` Segher Boessenkool
2022-09-19 14:01 ` [RFC PATCH 6/7] powerpc/64s: POWER10 CPU Kconfig build option Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 7/7] powerpc/64s: Add option to build vmlinux with pcrel addressing Nicholas Piggin
6 siblings, 1 reply; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
Update the 64s GENERIC_CPU option. POWER4 support has been dropped, so
make that clear in the option name.
-mtune= before power8 is dropped because the minimum gcc version
supports power8, and tuning is made consistent between big and little
endian.
Big endian drops -mcpu=power4 in favour of power5. Effectively the
minimum compiler version means power5 was always being selected here,
so this should not change anything. 970 / G5 code generation does not
seem to have been a problem with -mcpu=power5, but it's possible we
should go back to power4 to be really safe.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 8 +++++---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 02742facf895..471ef14f8574 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -149,11 +149,13 @@ CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata)
ifdef CONFIG_PPC_BOOK3S_64
ifdef CONFIG_CPU_LITTLE_ENDIAN
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
-CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power9,-mtune=power8)
else
-CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
-CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
+# -mcpu=power5 should generate 970 compatible kernel code
+CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power5
endif
+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power10, \
+ $(call cc-option,-mtune=power9, \
+ $(call cc-option,-mtune=power8)))
else ifdef CONFIG_PPC_BOOK3E_64
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
endif
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 5185d942b455..4bf9af6a6eb5 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -125,7 +125,7 @@ choice
If unsure, select Generic.
config GENERIC_CPU
- bool "Generic (POWER4 and above)"
+ bool "Generic (POWER5 / PPC970 and above)"
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
select PPC_64S_HASH_MMU
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags
2022-09-19 14:01 ` [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags Nicholas Piggin
@ 2022-09-20 22:16 ` Segher Boessenkool
2022-09-21 1:01 ` Nicholas Piggin
0 siblings, 1 reply; 17+ messages in thread
From: Segher Boessenkool @ 2022-09-20 22:16 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: linuxppc-dev, Alan Modra
Hi!
On Tue, Sep 20, 2022 at 12:01:47AM +1000, Nicholas Piggin wrote:
> Update the 64s GENERIC_CPU option. POWER4 support has been dropped, so
> make that clear in the option name.
AFAIR the minimum now is POWER4+ (ISA 2.01), not POWER5 (ISA 2.02).
> -mtune= before power8 is dropped because the minimum gcc version
> supports power8, and tuning is made consistent between big and little
> endian.
Tuning for p8 on e.g. 970 gives quite bad results. No idea if anyone
cares, but this is a serious regression if so.
> Big endian drops -mcpu=power4 in favour of power5. Effectively the
> minimum compiler version means power5 was always being selected here,
> so this should not change anything. 970 / G5 code generation does not
> seem to have been a problem with -mcpu=power5, but it's possible we
> should go back to power4 to be really safe.
Yes, -mcpu=power5 code does *not* run on 970, if you are unlucky enough
that the compiler does something smart with popcntb (the sole non-float
insn new on p5, not counting hrfid).
> +# -mcpu=power5 should generate 970 compatible kernel code
It doesn't. Even if it did, it would need more explanation!
Segher
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags
2022-09-20 22:16 ` Segher Boessenkool
@ 2022-09-21 1:01 ` Nicholas Piggin
2022-09-21 15:22 ` Segher Boessenkool
0 siblings, 1 reply; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-21 1:01 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev, Alan Modra
On Wed Sep 21, 2022 at 8:16 AM AEST, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Sep 20, 2022 at 12:01:47AM +1000, Nicholas Piggin wrote:
> > Update the 64s GENERIC_CPU option. POWER4 support has been dropped, so
> > make that clear in the option name.
>
> AFAIR the minimum now is POWER4+ (ISA 2.01), not POWER5 (ISA 2.02).
It's POWER5 now, because of commit 471d7ff8b5 ("powerpc/64s: Remove
POWER4 support"), which is misguided about POWER4+ and also introduced
the -mcpu=power5 bug on 970 builds :\
Not sure it's worth adding POWER4+ support back but if someone has a
POWER4+ or adds it to QEMU TCG, I will do the patch.
> > -mtune= before power8 is dropped because the minimum gcc version
> > supports power8, and tuning is made consistent between big and little
> > endian.
>
> Tuning for p8 on e.g. 970 gives quite bad results. No idea if anyone
> cares, but this is a serious regression if so.
It's for "generic" kernel so we set low minimum but higher tune,
assuming that people would usually have newer, so it was already
doing -mtune=power7.
We could make a specific 970/G5 entry though, since those still
have users.
> > Big endian drops -mcpu=power4 in favour of power5. Effectively the
> > minimum compiler version means power5 was always being selected here,
> > so this should not change anything. 970 / G5 code generation does not
> > seem to have been a problem with -mcpu=power5, but it's possible we
> > should go back to power4 to be really safe.
>
> Yes, -mcpu=power5 code does *not* run on 970, if you are unlucky enough
> that the compiler does something smart with popcntb (the sole non-float
> insn new on p5, not counting hrfid).
>
> > +# -mcpu=power5 should generate 970 compatible kernel code
>
> It doesn't. Even if it did, it would need more explanation!
Okay, sounds like we should go back to power4.
Thanks,
Nick
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags
2022-09-21 1:01 ` Nicholas Piggin
@ 2022-09-21 15:22 ` Segher Boessenkool
2022-09-23 7:22 ` Nicholas Piggin
0 siblings, 1 reply; 17+ messages in thread
From: Segher Boessenkool @ 2022-09-21 15:22 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: linuxppc-dev, Alan Modra
Hi!
On Wed, Sep 21, 2022 at 11:01:18AM +1000, Nicholas Piggin wrote:
> On Wed Sep 21, 2022 at 8:16 AM AEST, Segher Boessenkool wrote:
> > On Tue, Sep 20, 2022 at 12:01:47AM +1000, Nicholas Piggin wrote:
> > > Update the 64s GENERIC_CPU option. POWER4 support has been dropped, so
> > > make that clear in the option name.
> >
> > AFAIR the minimum now is POWER4+ (ISA 2.01), not POWER5 (ISA 2.02).
>
> It's POWER5 now, because of commit 471d7ff8b5 ("powerpc/64s: Remove
> POWER4 support"), which is misguided about POWER4+ and also introduced
> the -mcpu=power5 bug on 970 builds :\
ISA 2.01 added just a few things (LPES[0], HDEC, some PM things, but
crucially also anything that sets MSR[PR] also sets MSR[EE] since then).
> Not sure it's worth adding POWER4+ support back but if someone has a
> POWER4+ or adds it to QEMU TCG, I will do the patch.
970 is 2.01 -- pretending it is 2.02 is a ticking time bomb: the popcntb
insn will be generated for popcount and parity intrinsics, which can be
generated by generic code!
> > > -mtune= before power8 is dropped because the minimum gcc version
> > > supports power8, and tuning is made consistent between big and little
> > > endian.
> >
> > Tuning for p8 on e.g. 970 gives quite bad results. No idea if anyone
> > cares, but this is a serious regression if so.
>
> It's for "generic" kernel so we set low minimum but higher tune,
> assuming that people would usually have newer, so it was already
> doing -mtune=power7.
>
> We could make a specific 970/G5 entry though, since those still
> have users.
If that uses -mcpu=power4 (which means ISA 2.01 btw!) all is fine
already? (Or -mcpu=970, same thing really, it just allows VMX as well).
Thanks for taking care of this Nick, much appreciated!
Segher
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags
2022-09-21 15:22 ` Segher Boessenkool
@ 2022-09-23 7:22 ` Nicholas Piggin
0 siblings, 0 replies; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-23 7:22 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev, Alan Modra
On Thu Sep 22, 2022 at 1:22 AM AEST, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Sep 21, 2022 at 11:01:18AM +1000, Nicholas Piggin wrote:
> > On Wed Sep 21, 2022 at 8:16 AM AEST, Segher Boessenkool wrote:
> > > On Tue, Sep 20, 2022 at 12:01:47AM +1000, Nicholas Piggin wrote:
> > > > Update the 64s GENERIC_CPU option. POWER4 support has been dropped, so
> > > > make that clear in the option name.
> > >
> > > AFAIR the minimum now is POWER4+ (ISA 2.01), not POWER5 (ISA 2.02).
> >
> > It's POWER5 now, because of commit 471d7ff8b5 ("powerpc/64s: Remove
> > POWER4 support"), which is misguided about POWER4+ and also introduced
> > the -mcpu=power5 bug on 970 builds :\
>
> ISA 2.01 added just a few things (LPES[0], HDEC, some PM things, but
> crucially also anything that sets MSR[PR] also sets MSR[EE] since then).
Ah, right. Some Book3 cleanups mainly.
> > Not sure it's worth adding POWER4+ support back but if someone has a
> > POWER4+ or adds it to QEMU TCG, I will do the patch.
>
> 970 is 2.01 -- pretending it is 2.02 is a ticking time bomb: the popcntb
> insn will be generated for popcount and parity intrinsics, which can be
> generated by generic code!
Yeah agreed, it was an error on my part with that original patch.
> > > > -mtune= before power8 is dropped because the minimum gcc version
> > > > supports power8, and tuning is made consistent between big and little
> > > > endian.
> > >
> > > Tuning for p8 on e.g. 970 gives quite bad results. No idea if anyone
> > > cares, but this is a serious regression if so.
> >
> > It's for "generic" kernel so we set low minimum but higher tune,
> > assuming that people would usually have newer, so it was already
> > doing -mtune=power7.
> >
> > We could make a specific 970/G5 entry though, since those still
> > have users.
>
> If that uses -mcpu=power4 (which means ISA 2.01 btw!) all is fine
> already? (Or -mcpu=970, same thing really, it just allows VMX as well).
Well it does -mcpu=power4 but the "generic" CPU option also does
the -mtune=power7 or 8. I added a -mcpu=970 version, even though
we don't let the compiler generate VMX in the kernel so I guess
it's not functionally different.
> Thanks for taking care of this Nick, much appreciated!
No problem, thanks for reviewing and finding my errors :P
Thanks,
Nick
^ permalink raw reply [flat|nested] 17+ messages in thread
* [RFC PATCH 6/7] powerpc/64s: POWER10 CPU Kconfig build option
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
` (4 preceding siblings ...)
2022-09-19 14:01 ` [RFC PATCH 5/7] powerpc/64s: update generic cpu option name and compiler flags Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
2022-09-19 14:01 ` [RFC PATCH 7/7] powerpc/64s: Add option to build vmlinux with pcrel addressing Nicholas Piggin
6 siblings, 0 replies; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
This adds basic POWER10_CPU option, which builds with -mcpu=power10.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 7 ++++++-
arch/powerpc/platforms/Kconfig.cputype | 8 +++++++-
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 471ef14f8574..8c233f0894ba 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -193,9 +193,14 @@ ifdef CONFIG_476FPE_ERR46
-T $(srctree)/arch/powerpc/platforms/44x/ppc476_modules.lds
endif
-# No AltiVec or VSX instructions when building kernel
+# No prefix or pcrel
+KBUILD_CFLAGS += $(call cc-option,-mno-prefixed)
+KBUILD_CFLAGS += $(call cc-option,-mno-pcrel)
+
+# No AltiVec or VSX or MMA instructions when building kernel
KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
KBUILD_CFLAGS += $(call cc-option,-mno-vsx)
+KBUILD_CFLAGS += $(call cc-option,-mno-mma)
# No SPE instruction when building kernel
# (We use all available options to help semi-broken compilers)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 4bf9af6a6eb5..9d4d54fea081 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -84,7 +84,7 @@ choice
help
There are two families of 64 bit PowerPC chips supported.
The most common ones are the desktop and server CPUs
- (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9 ...)
+ (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9, ...)
The other are the "embedded" processors compliant with the
"Book 3E" variant of the architecture
@@ -171,6 +171,11 @@ config POWER9_CPU
depends on PPC_BOOK3S_64
select ARCH_HAS_FAST_MULTIPLIER
+config POWER10_CPU
+ bool "POWER10"
+ depends on PPC_BOOK3S_64
+ select ARCH_HAS_FAST_MULTIPLIER
+
config E5500_CPU
bool "Freescale e5500"
depends on PPC64 && E500
@@ -239,6 +244,7 @@ config TARGET_CPU
default "power7" if POWER7_CPU
default "power8" if POWER8_CPU
default "power9" if POWER9_CPU
+ default "power10" if POWER10_CPU
default "405" if 405_CPU
default "440" if 440_CPU
default "464" if 464_CPU
--
2.37.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [RFC PATCH 7/7] powerpc/64s: Add option to build vmlinux with pcrel addressing
2022-09-19 14:01 [RFC PATCH 0/7] powerpc: first hack at pcrel addressing Nicholas Piggin
` (5 preceding siblings ...)
2022-09-19 14:01 ` [RFC PATCH 6/7] powerpc/64s: POWER10 CPU Kconfig build option Nicholas Piggin
@ 2022-09-19 14:01 ` Nicholas Piggin
6 siblings, 0 replies; 17+ messages in thread
From: Nicholas Piggin @ 2022-09-19 14:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin, Alan Modra
The main trick to this is that the kernel does not pick up the
PAGE_OFFSET (0xc.... load address) from the absolute address TOC load in
early boot so it doesn't load all addresses with the proper PAGE_OFFSET
as a matter of course, and needs to be moved there by hand.
- Extended inline asm memory addresses grow some complexity, so this
uses a dumb base addressing for now.
- Modules are still using TOC addressing. Building modules with prcrel
will I think require the loader add pc relative plt stubs, and add a
GOT section for global variable access. Would be nice to add though.
- definetely ftrace and probes, possibly BPF and KVM have some breakage.
I haven't looked closely yet.
- copypage_64.S has an interesting problem, prefixed instructions have
alignment restrictions so the linker can change their size so
difference between two local labels may no longer be constant at
assembly time. Even aligning the prefixed instruction can't generally
solve it. Fortunately it's only one place in the kernel so far.
This reduces kernel text size by about 6%.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/Makefile | 7 +++
arch/powerpc/include/asm/atomic.h | 20 +++++--
arch/powerpc/include/asm/io.h | 36 ++++++++++++
arch/powerpc/include/asm/ppc_asm.h | 77 ++++++++++++++++++++++++++
arch/powerpc/include/asm/uaccess.h | 22 ++++++++
arch/powerpc/kernel/head_64.S | 35 ++++++++++++
arch/powerpc/kernel/irq.c | 4 ++
arch/powerpc/kernel/vmlinux.lds.S | 6 ++
arch/powerpc/lib/copypage_64.S | 4 +-
arch/powerpc/platforms/Kconfig.cputype | 20 +++++++
10 files changed, 226 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 8c233f0894ba..a33ce1cf75ce 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -107,6 +107,9 @@ LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) += -z notext
LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-y)
ifdef CONFIG_PPC64
+ifdef CONFIG_PPC_KERNEL_PCREL
+ KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-pcrel)
+endif
ifeq ($(call cc-option-yn,-mcmodel=medium),y)
# -mcmodel=medium breaks modules because it uses 32bit offsets from
# the TOC pointer to create pointers where possible. Pointers into the
@@ -194,8 +197,12 @@ ifdef CONFIG_476FPE_ERR46
endif
# No prefix or pcrel
+ifndef CONFIG_PPC_KERNEL_PREFIXED
KBUILD_CFLAGS += $(call cc-option,-mno-prefixed)
+endif
+ifndef CONFIG_PPC_KERNEL_PCREL
KBUILD_CFLAGS += $(call cc-option,-mno-pcrel)
+endif
# No AltiVec or VSX or MMA instructions when building kernel
KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 486ab7889121..4124e5795872 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -27,14 +27,20 @@ static __inline__ int arch_atomic_read(const atomic_t *v)
{
int t;
- __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
+ if (IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
+ __asm__ __volatile__("lwz %0,0(%1)" : "=r"(t) : "b"(&v->counter));
+ else
+ __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
return t;
}
static __inline__ void arch_atomic_set(atomic_t *v, int i)
{
- __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
+ if (IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
+ __asm__ __volatile__("stw %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter));
+ else
+ __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
}
#define ATOMIC_OP(op, asm_op, suffix, sign, ...) \
@@ -226,14 +232,20 @@ static __inline__ s64 arch_atomic64_read(const atomic64_t *v)
{
s64 t;
- __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
+ if (IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
+ __asm__ __volatile__("ld %0,0(%1)" : "=r"(t) : "b"(&v->counter));
+ else
+ __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
return t;
}
static __inline__ void arch_atomic64_set(atomic64_t *v, s64 i)
{
- __asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
+ if (IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
+ __asm__ __volatile__("std %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter));
+ else
+ __asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
}
#define ATOMIC64_OP(op, asm_op) \
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index fc112a91d0c2..4dc95872bffc 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -97,6 +97,41 @@ extern bool isa_io_special;
*
*/
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define DEF_MMIO_IN_X(name, size, insn) \
+static inline u##size name(const volatile u##size __iomem *addr) \
+{ \
+ u##size ret; \
+ __asm__ __volatile__("sync;"#insn" %0,0,%1;twi 0,%0,0;isync" \
+ : "=r" (ret) : "r" (addr) : "memory"); \
+ return ret; \
+}
+
+#define DEF_MMIO_OUT_X(name, size, insn) \
+static inline void name(volatile u##size __iomem *addr, u##size val) \
+{ \
+ __asm__ __volatile__("sync;"#insn" %1,0,%0" \
+ : : "r" (addr), "r" (val) : "memory"); \
+ mmiowb_set_pending(); \
+}
+
+#define DEF_MMIO_IN_D(name, size, insn) \
+static inline u##size name(const volatile u##size __iomem *addr) \
+{ \
+ u##size ret; \
+ __asm__ __volatile__("sync;"#insn" %0,0(%1);twi 0,%0,0;isync"\
+ : "=r" (ret) : "b" (addr) : "memory"); \
+ return ret; \
+}
+
+#define DEF_MMIO_OUT_D(name, size, insn) \
+static inline void name(volatile u##size __iomem *addr, u##size val) \
+{ \
+ __asm__ __volatile__("sync;"#insn" %1,0(%0)" \
+ : : "b" (addr), "r" (val) : "memory"); \
+ mmiowb_set_pending(); \
+}
+#else
#define DEF_MMIO_IN_X(name, size, insn) \
static inline u##size name(const volatile u##size __iomem *addr) \
{ \
@@ -130,6 +165,7 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
: "=m<>" (*addr) : "r" (val) : "memory"); \
mmiowb_set_pending(); \
}
+#endif
DEF_MMIO_IN_D(in_8, 8, lbz);
DEF_MMIO_OUT_D(out_8, 8, stb);
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index ab8adf2b833f..effaed790f37 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -142,7 +142,11 @@
/*
* Used to name C functions called from asm
*/
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define CFUNC(name) name@notoc
+#else
#define CFUNC(name) name
+#endif
/*
* We use __powerpc64__ here because we want the compat VDSO to use the 32-bit
@@ -171,6 +175,9 @@
.globl name; \
name:
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define _GLOBAL_TOC _GLOBAL
+#else
#define _GLOBAL_TOC(name) \
.align 2 ; \
.type name,@function; \
@@ -179,6 +186,7 @@ name: \
0: addis r2,r12,(.TOC.-0b)@ha; \
addi r2,r2,(.TOC.-0b)@l; \
.localentry name,.-name
+#endif
#define DOTSYM(a) a
@@ -308,6 +316,69 @@ GLUE(.,name):
.endif
.endm
+#ifdef CONFIG_PPC_KERNEL_PCREL
+.macro declare_var name, align
+ .type \name,@object
+ .balign \align
+\name\():
+.endm
+
+.macro declare_var_end
+.endm
+
+.macro load_var_addr reg, name
+ pla \reg,\name\()@pcrel
+.endm
+
+.macro load_var reg, name, size
+ .if \size == 1
+ plbz \reg,\name\()@pcrel
+ .elseif \size == 2
+ plhz \reg,\name\()@pcrel
+ .elseif \size == 4
+ plwz \reg,\name\()@pcrel
+ .elseif \size == 8
+ pld \reg,\name\()@pcrel
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro store_var reg, name, size
+ .if \size == 1
+ pstb \reg,\name\()@pcrel
+ .elseif \size == 2
+ psth \reg,\name\()@pcrel
+ .elseif \size == 4
+ pstw \reg,\name\()@pcrel
+ .elseif \size == 8
+ pstd \reg,\name\()@pcrel
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro fload_var reg, tmpreg, name, size
+ .if \size == 4
+ plfs \reg,\name\()@pcrel
+ .elseif \size == 8
+ plfd \reg,\name\()@pcrel
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+.macro fstore_var reg, tmpreg, name, size
+ .if \size == 4
+ pstfs \reg,\name\()@pcrel
+ .elseif \size == 8
+ pstfd \reg,\name\()@pcrel
+ .else
+ .error "bad size"
+ .endif
+.endm
+
+#else
.macro declare_var name, align
.type \name,@object
# .section ".toc","aw"
@@ -376,6 +447,7 @@ GLUE(.,name):
.error "bad size"
.endif
.endm
+#endif
#ifdef __powerpc64__
@@ -391,6 +463,11 @@ GLUE(.,name):
ori reg, reg, (expr)@l; \
rldimi reg, tmp, 32, 0
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define LOAD_REG_ADDR(reg,name) \
+ pla reg,name@pcrel
+
+#else
#define LOAD_REG_ADDR(reg,name) \
addis reg,r2,name@toc@ha; \
addi reg,reg,name@toc@l
diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h
index 3ddc65c63a49..88b23bb3bbf3 100644
--- a/arch/powerpc/include/asm/uaccess.h
+++ b/arch/powerpc/include/asm/uaccess.h
@@ -71,6 +71,16 @@ __pu_failed: \
* because we do not write to any memory gcc knows about, so there
* are no aliasing issues.
*/
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define __put_user_asm_goto(x, addr, label, op) \
+ asm_volatile_goto( \
+ "1: " op " %0,0(%1) # put_user\n" \
+ EX_TABLE(1b, %l2) \
+ : \
+ : "r" (x), "b" (addr) \
+ : \
+ : label)
+#else
#define __put_user_asm_goto(x, addr, label, op) \
asm_volatile_goto( \
"1: " op "%U1%X1 %0,%1 # put_user\n" \
@@ -79,6 +89,7 @@ __pu_failed: \
: "r" (x), "m<>" (*addr) \
: \
: label)
+#endif
#ifdef __powerpc64__
#define __put_user_asm2_goto(x, ptr, label) \
@@ -131,6 +142,16 @@ do { \
#ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define __get_user_asm_goto(x, addr, label, op) \
+ asm_volatile_goto( \
+ "1: "op" %0,0(%1) # get_user\n" \
+ EX_TABLE(1b, %l2) \
+ : "=r" (x) \
+ : "b" (addr) \
+ : \
+ : label)
+#else
#define __get_user_asm_goto(x, addr, label, op) \
asm_volatile_goto( \
"1: "op"%U1%X1 %0, %1 # get_user\n" \
@@ -139,6 +160,7 @@ do { \
: "m<>" (*addr) \
: \
: label)
+#endif
#ifdef __powerpc64__
#define __get_user_asm2_goto(x, addr, label) \
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 6b04f327263e..75d11a210244 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -415,6 +415,21 @@ generic_secondary_common_init:
mtspr SPRN_SPRG_TLB_EXFRAME,r12
#endif
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ /*
+ * pcrel does not get PAGE_OFFSET because it is out of range. We
+ * must move there now so other pointers calculated via pcrel are
+ * valid with PAGE_OFFSET.
+ */
+ lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
+ sldi r25,r25,32
+ LOAD_REG_ADDR(r3, 1f)
+ add r25,r25,r3
+ mtctr r25
+ bctr
+1:
+#endif
+
/* From now on, r24 is expected to be logical cpuid */
mr r24,r5
@@ -888,6 +903,10 @@ enable_64b_mode:
* sites to handle this.
*/
_GLOBAL(relative_toc)
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ li r2,-1
+ blr
+#else
mflr r0
bcl 20,31,$+4
0: mflr r11
@@ -895,6 +914,7 @@ _GLOBAL(relative_toc)
add r2,r2,r11
mtlr r0
blr
+#endif
.balign 8
p_toc: .8byte .TOC. - 0b
@@ -946,6 +966,21 @@ start_here_multiplatform:
std r0,0(r4)
#endif
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ /*
+ * pcrel does not get PAGE_OFFSET because it is out of range. We
+ * must move there now so other pointers calculated via pcrel are
+ * valid with PAGE_OFFSET.
+ */
+ lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
+ sldi r25,r25,32
+ LOAD_REG_ADDR(r3, 1f)
+ add r25,r25,r3
+ mtctr r25
+ bctr
+1:
+#endif
+
/* set up a stack pointer */
LOAD_REG_ADDR(r3,init_thread_union)
LOAD_REG_IMMEDIATE(r1,THREAD_SIZE)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 0f17268c1f0b..7c38e4e90f45 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -206,7 +206,11 @@ static __always_inline void call_do_softirq(const void *sp)
asm volatile (
PPC_STLU " %%r1, %[offset](%[sp]) ;"
"mr %%r1, %[sp] ;"
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ "bl %[callee]@notoc ;"
+#else
"bl %[callee] ;"
+#endif
PPC_LL " %%r1, 0(%%r1) ;"
: // Outputs
: // Inputs
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 3d96d51c8a5f..5e8b29ec4c2f 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -164,12 +164,18 @@ SECTIONS
}
#else /* CONFIG_PPC32 */
+#ifndef CONFIG_PPC_KERNEL_PCREL
.toc1 : AT(ADDR(.toc1) - LOAD_OFFSET) {
*(.toc1)
}
+#endif
.got : AT(ADDR(.got) - LOAD_OFFSET) ALIGN(256) {
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ *(.got)
+#else
*(.got .toc)
+#endif
#ifndef CONFIG_RELOCATABLE
__prom_init_toc_start = .;
arch/powerpc/kernel/prom_init.o*(.toc)
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index cfff67161011..d2b9f3bc3efb 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -22,8 +22,10 @@ FTR_SECTION_ELSE
#endif
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
ori r5,r5,PAGE_SIZE@l
-BEGIN_FTR_SECTION
+ /* prefixed instructions cause label difference to be non-constant
+ * so can't go in FTR sections */
load_var r10, caches, 8
+BEGIN_FTR_SECTION
lwz r11,DCACHEL1LOGBLOCKSIZE(r10) /* log2 of cache block size */
lwz r12,DCACHEL1BLOCKSIZE(r10) /* get cache block size */
li r9,0
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9d4d54fea081..b328c49b3e5f 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -175,6 +175,8 @@ config POWER10_CPU
bool "POWER10"
depends on PPC_BOOK3S_64
select ARCH_HAS_FAST_MULTIPLIER
+ select PPC_HAVE_PCREL_SUPPORT
+ select PPC_HAVE_PREFIXED_SUPPORT
config E5500_CPU
bool "Freescale e5500"
@@ -454,6 +456,18 @@ config PPC_RADIX_MMU_DEFAULT
If you're unsure, say Y.
+config PPC_KERNEL_PREFIXED
+ depends on PPC_HAVE_PREFIXED_SUPPORT
+ default n
+ bool "Build Kernel with Prefixed Instructions"
+
+config PPC_KERNEL_PCREL
+ depends on PPC_HAVE_PCREL_SUPPORT
+ depends on PPC_HAVE_PREFIXED_SUPPORT
+ default n
+ select PPC_KERNEL_PREFIXED
+ bool "Build Kernel with PC-Relative addressing model"
+
config PPC_KUEP
bool "Kernel Userspace Execution Prevention" if !40x
default y if !40x
@@ -494,6 +508,12 @@ config PPC_BOOK3E_MMU
config PPC_HAVE_PMU_SUPPORT
bool
+config PPC_HAVE_PCREL_SUPPORT
+ bool
+
+config PPC_HAVE_PREFIXED_SUPPORT
+ bool
+
config PMU_SYSFS
bool "Create PMU SPRs sysfs file"
default n
--
2.37.2
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