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Wed, 11 Aug 2021 10:51:10 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7759D42081; Wed, 11 Aug 2021 10:54:21 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 95E6C42067; Wed, 11 Aug 2021 10:54:20 +0000 (GMT) Received: from smtpclient.apple (unknown [9.79.182.59]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Wed, 11 Aug 2021 10:54:20 +0000 (GMT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.120.0.1.13\)) Subject: Re: [PATCH v1 16/55] powerpc/64s: Implement PMU override command line option From: Athira Rajeev In-Reply-To: <1628246339.762vtrxskz.astroid@bobo.none> Date: Wed, 11 Aug 2021 16:24:16 +0530 Content-Transfer-Encoding: quoted-printable Message-Id: <5C3CA279-F9C6-463A-BE1E-8FC6BB5BDA21@linux.vnet.ibm.com> References: <20210726035036.739609-1-npiggin@gmail.com> <20210726035036.739609-17-npiggin@gmail.com> <4600EC62-5505-4856-AE23-939ED62287B3@linux.vnet.ibm.com> <1628246339.762vtrxskz.astroid@bobo.none> To: Nicholas Piggin X-Mailer: Apple Mail (2.3654.120.0.1.13) X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: izhRoOFnlzz4boZxfT_GGZvAxv1oN5N8 X-Proofpoint-GUID: S8ncV2I4xh-wkazU7b9daDzKZcqKM3H2 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-11_03:2021-08-11, 2021-08-11 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 phishscore=0 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108110069 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" > On 06-Aug-2021, at 4:12 PM, Nicholas Piggin wrote: >=20 > Excerpts from Athira Rajeev's message of August 6, 2021 7:28 pm: >>=20 >>=20 >>> On 26-Jul-2021, at 9:19 AM, Nicholas Piggin = wrote: >>>=20 >>> It can be useful in simulators (with very constrained environments) >>> to allow some PMCs to run from boot so they can be sampled directly >>> by a test harness, rather than having to run perf. >>>=20 >>> A previous change freezes counters at boot by default, so provide >>> a boot time option to un-freeze (plus a bit more flexibility). >>>=20 >>> Signed-off-by: Nicholas Piggin >>> --- >>> .../admin-guide/kernel-parameters.txt | 7 ++++ >>> arch/powerpc/perf/core-book3s.c | 35 = +++++++++++++++++++ >>> 2 files changed, 42 insertions(+) >>>=20 >>> diff --git a/Documentation/admin-guide/kernel-parameters.txt = b/Documentation/admin-guide/kernel-parameters.txt >>> index bdb22006f713..96b7d0ebaa40 100644 >>> --- a/Documentation/admin-guide/kernel-parameters.txt >>> +++ b/Documentation/admin-guide/kernel-parameters.txt >>> @@ -4089,6 +4089,13 @@ >>> Override pmtimer IOPort with a hex value. >>> e.g. pmtmr=3D0x508 >>>=20 >>> + pmu=3D [PPC] Manually enable the PMU. >>> + Enable the PMU by setting MMCR0 to 0 (clear FC = bit). >>> + This option is implemented for Book3S = processors. >>> + If a number is given, then MMCR1 is set to that = number, >>> + otherwise (e.g., 'pmu=3Don'), it is left 0. The = perf >>> + subsystem is disabled if this option is used. >>> + >>> pm_debug_messages [SUSPEND,KNL] >>> Enable suspend/resume debug messages during boot = up. >>>=20 >>> diff --git a/arch/powerpc/perf/core-book3s.c = b/arch/powerpc/perf/core-book3s.c >>> index 65795cadb475..e7cef4fe17d7 100644 >>> --- a/arch/powerpc/perf/core-book3s.c >>> +++ b/arch/powerpc/perf/core-book3s.c >>> @@ -2428,8 +2428,24 @@ int register_power_pmu(struct power_pmu *pmu) >>> } >>>=20 >>> #ifdef CONFIG_PPC64 >>> +static bool pmu_override =3D false; >>> +static unsigned long pmu_override_val; >>> +static void do_pmu_override(void *data) >>> +{ >>> + ppc_set_pmu_inuse(1); >>> + if (pmu_override_val) >>> + mtspr(SPRN_MMCR1, pmu_override_val); >>> + mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); >>=20 >> Hi Nick >>=20 >> Here, we are not doing any validity check for the value used to set = MMCR1.=20 >> For advanced users, the option to pass value for MMCR1 is fine. But = other cases, it could result in >> invalid event getting used. Do we need to restrict this boot time = option for only PMC5/6 ? >=20 > Depends what would be useful. We don't have to prevent the admin = shooting=20 > themselves in the foot with options like this, but if we can make it=20= > safer without making it less useful then that's always a good option. Hi Nick I checked back on my comment and it will be difficult to add/maintain = validity check for MMCR1 considering different platforms that we have. We can go ahead with present approach you have in this patch. Changes = looks good to me. Reviewed-by: Athira Rajeev >=20 > Thanks, > Nick