From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mo6-p00-ob.smtp.rzone.de (mo6-p00-ob.smtp.rzone.de [IPv6:2a01:238:20a:202:5300::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3zfw7Q2n9fzF0dR for ; Mon, 12 Feb 2018 17:02:39 +1100 (AEDT) Content-Type: multipart/alternative; boundary=Apple-Mail-075E060E-FAD4-432A-89CD-3BD6BFA7B823 Mime-Version: 1.0 (1.0) Subject: Re: [PATCH v1] PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports From: Christian Zigotzky In-Reply-To: <20180210154342.GE206223@bhelgaas-glaptop.roam.corp.google.com> Date: Mon, 12 Feb 2018 07:02:32 +0100 Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Message-Id: <5ED03D5D-B20A-48FE-AD56-E76A06B1DC7C@xenosoft.de> References: <20171202002710.17686.21340.stgit@bhelgaas-glaptop.roam.corp.google.com> <20171202191827.GB18780@bhelgaas-glaptop.roam.corp.google.com> <33CA1586-051C-47F4-83CD-4A406FAE85F7@xenosoft.de> <20180210154342.GE206223@bhelgaas-glaptop.roam.corp.google.com> To: Bjorn Helgaas List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --Apple-Mail-075E060E-FAD4-432A-89CD-3BD6BFA7B823 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hi Bjorn, Sorry for my late answer. The X1000 boots and works since yesterday. I think= the following patch solved the issue: https://git.kernel.org/pub/scm/linux/= kernel/git/torvalds/linux.git/commit/?id=3Dc591c2e36ccc9a08f265841d2fd68e353= 27ab3c4 Cheers, Christian Sent from my iPhone > On 10. Feb 2018, at 16:43, Bjorn Helgaas wrote: >=20 >> On Sat, Feb 10, 2018 at 09:05:40AM +0100, Christian Zigotzky wrote: >> Hi All, >>=20 >> The AmigaOne X1000 doesn=E2=80=99t boot anymore since the PCI updates. I >> have seen, that the PCI updates are different to the updates below. >> The code below works but the latest not. Is there a problem with the >> latest PCI updates currently? >=20 > I'm not aware of a problem, and it *looks* like the patch below is in > Linus' tree (I'm looking at 9a61df9e5f74 ("Merge tag 'kbuild-v4.16-2' > of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild"))= . >=20 > I assume you're still booting with "pci=3Dpcie_scan_all", since I don't > think we ever got a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically. >=20 > If AmigaOne X1000 doesn't boot with "pci=3Dpcie_scan_all", can you diff > the working only_one_child() with the current upstream? I compared > the version in my pci/enumeration branch with what's upstream, and > they're identical. So maybe the original patch I applied was wrong? >=20 > If you have a patch that works, can you post it and maybe I can sort > out what's different? >=20 >> On 2. Dec 2017, at 20:18, Bjorn Helgaas wrote: >>=20 >> On Fri, Dec 01, 2017 at 06:27:10PM -0600, Bjorn Helgaas wrote: >> From: Bjorn Helgaas >>=20 >> PCIe Downstream Ports normally have only a Device 0 below them. To >> optimize enumeration, we don't scan for other devices *unless* the >> PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the >> "pci=3Dpcie_scan_all" kernel parameter. >>=20 >> Previously PCI_SCAN_ALL_PCIE_DEVS only affected scanning below Switch >> Downstream Ports, not Root Ports. >>=20 >> But the "Nemo" system, also known as the AmigaOne X1000, has a PA Semi Ro= ot >> Port whose link leads to an AMD/ATI SB600 South Bridge. The Root Port is= a >> PCIe device, of course, but the SB600 contains only conventional PCI >> devices with no visible PCIe port. >>=20 >> Simplify and restructure only_one_child() so that we scan for all possibl= e >> devices below Root Ports as well as Switch Downstream Ports when >> PCI_SCAN_ALL_PCIE_DEVS is set. >>=20 >> This is enough to make Nemo work with "pci=3Dpcie_scan_all". We would al= so >> like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically on Nemo s= o >> users wouldn't have to use the "pci=3Dpcie_scan_all" parameter, but we do= n't >> have that yet. >>=20 >> Link: https://lkml.kernel.org/r/CAErSpo55Q8Q=3D5p6_+uu7ahnw+53ibVDNRXxrzR= V9QnUr_9EUfw@mail.gmail.com >> Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D198057 >> Reported-and-Tested-by: Christian Zigotzky >> Signed-off-by: Bjorn Helgaas >>=20 >> Applied to pci/enumeration for v4.16. >>=20 >> --- >> drivers/pci/probe.c | 25 +++++++++++++++---------- >> 1 file changed, 15 insertions(+), 10 deletions(-) >>=20 >> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c >> index 14e0ea1ff38b..303c0cb0550c 100644 >> --- a/drivers/pci/probe.c >> +++ b/drivers/pci/probe.c >> @@ -2215,22 +2215,27 @@ static unsigned next_fn(struct pci_bus *bus, stru= ct pci_dev *dev, unsigned fn) >>=20 >> static int only_one_child(struct pci_bus *bus) >> { >> - struct pci_dev *parent =3D bus->self; >> + struct pci_dev *bridge =3D bus->self; >>=20 >> - if (!parent || !pci_is_pcie(parent)) >> + /* >> + * Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so >> + * we scan for all possible devices, not just Device 0. >> + */ >> + if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS)) >> return 0; >> - if (pci_pcie_type(parent) =3D=3D PCI_EXP_TYPE_ROOT_PORT) >> - return 1; >>=20 >> /* >> - * PCIe downstream ports are bridges that normally lead to only a >> - * device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all >> - * possible devices, not just device 0. See PCIe spec r3.0, >> - * sec 7.3.1. >> + * A PCIe Downstream Port normally leads to a Link with only Device >> + * 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan >> + * only for Device 0 in that situation. >> + * >> + * Checking has_secondary_link is a hack to identify Downstream >> + * Ports because sometimes Switches are configured such that the >> + * PCIe Port Type labels are backwards. >> */ >> - if (parent->has_secondary_link && >> - !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS)) >> + if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link) >> return 1; >> + >> return 0; >> } >>=20 --Apple-Mail-075E060E-FAD4-432A-89CD-3BD6BFA7B823 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hi Bjorn,

Sorry for my l= ate answer. The X1000 boots and works since yesterday. I think the following patch solved= the issue: ht= tps://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3D= c591c2e36ccc9a08f265841d2fd68e35327ab3c4

Cheers,
Christian

Sent from= my iPhone

On 10. Feb 2018, at 16:43, Bjorn Helgaas <helgaas@kernel.org> wrote:

On Sat, Feb 10, 2018 at 09:05:40AM += 0100, Christian Zigotzky wrote:
Hi= All,

The AmigaOne X1000 doesn=E2=80=99t b= oot anymore since the PCI updates. I
have seen, that the PCI updates are different to the updates= below.
The code belo= w works but the latest not. Is there a problem with the
latest PCI updates currently?
<= /blockquote>
I'm not aware of a problem, and it *looks= * like the patch below is in
Linus' tree (I'm looking at 9a6= 1df9e5f74 ("Merge tag 'kbuild-v4.16-2'
of git://git.kernel.o= rg/pub/scm/linux/kernel/git/masahiroy/linux-kbuild")).

I assume you're still booting with "pci=3Dpcie_scan_all", since I= don't
think we ever got a quirk to set PCI_SCAN_ALL_PCIE_DE= VS automatically.

If AmigaOne X1000 doesn't= boot with "pci=3Dpcie_scan_all", can you diff
the working o= nly_one_child() with the current upstream?  I compared
= the version in my pci/enumeration branch with what's upstream, andthey're identical.  So maybe the original patch I applied was wr= ong?

If you have a patch that works, can yo= u post it and maybe I can sort
out what's different?<= br>
On 2. Dec 2017, at 20:18= , Bjorn Helgaas <helgaas@kernel.org= > wrote:

On Fri, Dec 01, 2017 at 0= 6:27:10PM -0600, Bjorn Helgaas wrote:
From: Bjorn Helgaas <bhelgaas@google.com>

PCIe Down= stream Ports normally have only a Device 0 below them.  To
optimize enumeration, we don't sc= an for other devices *unless* the
PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the
"pci=3Dpcie_scan_all" ker= nel parameter.

Previously PCI_SCAN_ALL_PC= IE_DEVS only affected scanning below Switch
Downstream Ports, not Root Ports.

But the "Nemo" system, also known as the AmigaOne X1000, has= a PA Semi Root
Port w= hose link leads to an AMD/ATI SB600 South Bridge.  The Root Port is a
PCIe device, of course= , but the SB600 contains only conventional PCI
devices with no visible PCIe port.

Simplify and restructure only_one_child() so that we scan= for all possible
dev= ices below Root Ports as well as Switch Downstream Ports when
PCI_SCAN_ALL_PCIE_DEVS is set.

<= blockquote type=3D"cite">This is enough to make Nemo work with "pci=3D= pcie_scan_all".  We would also
like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically= on Nemo so
users wou= ldn't have to use the "pci=3Dpcie_scan_all" parameter, but we don't
have that yet.

Link: https://lkml.kerne= l.org/r/CAErSpo55Q8Q=3D5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com=
Link: https://bugzilla.kern= el.org/show_bug.cgi?id=3D198057
Reported-and-Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Applied to pci/enumeration for v4.16.

---
d= rivers/pci/probe.c |   25 +++++++++++++++----------
1 file changed, 15 insertions(+), 1= 0 deletions(-)

diff --git a/drivers/pci/p= robe.c b/drivers/pci/probe.c
index 14e0ea1ff38b..303c0cb0550c 100644
--- a/drivers/pci/probe.c
=
+++ b/drivers/pci/probe.c
@@ -2215,22 +2215,27 @@ static unsigned= next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn)

static int only_one_child(struct pci_bus *bus)=
{
-    struct pci_dev *parent =3D= bus->self;
+ &nbs= p;  struct pci_dev *bridge =3D bus->self;

-    if (!parent || !pci_is_pcie(parent))=
+    /*
+     = ;* Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so
<= /blockquote>
+     * we s= can for all possible devices, not just Device 0.
+     */
+    if (pci_has_flag(PCI= _SCAN_ALL_PCIE_DEVS))
      return 0;
-    if (pci_pcie_type(parent) =3D= =3D PCI_EXP_TYPE_ROOT_PORT)
-        return 1;

  /*
-     * PCIe downstream ports are bridges t= hat normally lead to only a
-     * device 0, but if PCI_SCAN_ALL_PCIE_DEVS i= s set, scan all
- &nb= sp;   * possible devices, not just device 0.  See PCIe s= pec r3.0,
-  &nb= sp;  * sec 7.3.1.
+     * A PCIe Downstream Port normally leads to a= Link with only Device
+     * 0 on it (PCIe spec r3.1, sec 7.3.1).  As a= n optimization, scan
= +     * only for Device 0 in that situation.
<= /blockquote>
+     *
+     = ;* Checking has_secondary_link is a hack to identify Downstream
+     * Ports= because sometimes Switches are configured such that the
+     * PCIe Port Ty= pe labels are backwards.
   */
<= span>-    if (parent->has_secondary_link &&=
-     &= nbsp;  !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
+    if (bridge &&= pci_is_pcie(bridge) && bridge->has_secondary_link)
     &nb= sp;return 1;
+=
  return 0;
}
=

<= /div>= --Apple-Mail-075E060E-FAD4-432A-89CD-3BD6BFA7B823--