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Thu, 17 Sep 2020 04:30:57 GMT Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by ppma04fra.de.ibm.com with ESMTP id 33k64s8tqy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Sep 2020 04:30:57 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 08H4UtCY13238680 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 17 Sep 2020 04:30:55 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0D1BE4C044; Thu, 17 Sep 2020 04:30:55 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 544DE4C050; Thu, 17 Sep 2020 04:30:54 +0000 (GMT) Received: from localhost.localdomain (unknown [9.85.89.36]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 17 Sep 2020 04:30:54 +0000 (GMT) Subject: Re: [PATCH 2/2] powerpc/perf: Add declarations to fix sparse warnings To: Michael Ellerman , linuxppc-dev@ozlabs.org References: <20200916115637.3100484-1-mpe@ellerman.id.au> <20200916115637.3100484-2-mpe@ellerman.id.au> From: Madhavan Srinivasan Message-ID: <5b9dac60-bb02-991f-7f97-3d529f078744@linux.ibm.com> Date: Thu, 17 Sep 2020 10:00:52 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20200916115637.3100484-2-mpe@ellerman.id.au> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-17_02:2020-09-16, 2020-09-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 clxscore=1011 lowpriorityscore=0 bulkscore=0 impostorscore=0 malwarescore=0 suspectscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009170023 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 9/16/20 5:26 PM, Michael Ellerman wrote: > Sparse warns about all the init functions: > symbol init_ppc970_pmu was not declared. Should it be static? > symbol init_power5p_pmu was not declared. Should it be static? > symbol init_power5_pmu was not declared. Should it be static? > symbol init_power6_pmu was not declared. Should it be static? > symbol init_power7_pmu was not declared. Should it be static? > symbol init_power9_pmu was not declared. Should it be static? > symbol init_power8_pmu was not declared. Should it be static? > symbol init_generic_compat_pmu was not declared. Should it be static? > > They're already declared in internal.h, so just make sure all the C > files include that directly or indirectly. Reviewed-by: Madhavan Srinivasan > Signed-off-by: Michael Ellerman > --- > arch/powerpc/perf/isa207-common.h | 2 ++ > arch/powerpc/perf/power10-pmu.c | 1 - > arch/powerpc/perf/power5+-pmu.c | 2 ++ > arch/powerpc/perf/power5-pmu.c | 2 ++ > arch/powerpc/perf/power6-pmu.c | 2 ++ > arch/powerpc/perf/power7-pmu.c | 2 ++ > arch/powerpc/perf/ppc970-pmu.c | 2 ++ > 7 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h > index 044de65e96b9..7025de5e60e7 100644 > --- a/arch/powerpc/perf/isa207-common.h > +++ b/arch/powerpc/perf/isa207-common.h > @@ -13,6 +13,8 @@ > #include > #include > > +#include "internal.h" > + > #define EVENT_EBB_MASK 1ull > #define EVENT_EBB_SHIFT PERF_EVENT_CONFIG_EBB_SHIFT > #define EVENT_BHRB_MASK 1ull > diff --git a/arch/powerpc/perf/power10-pmu.c b/arch/powerpc/perf/power10-pmu.c > index 83148656b524..9dbe8f9b89b4 100644 > --- a/arch/powerpc/perf/power10-pmu.c > +++ b/arch/powerpc/perf/power10-pmu.c > @@ -9,7 +9,6 @@ > #define pr_fmt(fmt) "power10-pmu: " fmt > > #include "isa207-common.h" > -#include "internal.h" > > /* > * Raw event encoding for Power10: > diff --git a/arch/powerpc/perf/power5+-pmu.c b/arch/powerpc/perf/power5+-pmu.c > index a62b2cd7914f..3e64b4a1511f 100644 > --- a/arch/powerpc/perf/power5+-pmu.c > +++ b/arch/powerpc/perf/power5+-pmu.c > @@ -10,6 +10,8 @@ > #include > #include > > +#include "internal.h" > + > /* > * Bits in event code for POWER5+ (POWER5 GS) and POWER5++ (POWER5 GS DD3) > */ > diff --git a/arch/powerpc/perf/power5-pmu.c b/arch/powerpc/perf/power5-pmu.c > index 8732b587cf71..017bb19b73fb 100644 > --- a/arch/powerpc/perf/power5-pmu.c > +++ b/arch/powerpc/perf/power5-pmu.c > @@ -10,6 +10,8 @@ > #include > #include > > +#include "internal.h" > + > /* > * Bits in event code for POWER5 (not POWER5++) > */ > diff --git a/arch/powerpc/perf/power6-pmu.c b/arch/powerpc/perf/power6-pmu.c > index 0e318cf87129..189974478e9f 100644 > --- a/arch/powerpc/perf/power6-pmu.c > +++ b/arch/powerpc/perf/power6-pmu.c > @@ -10,6 +10,8 @@ > #include > #include > > +#include "internal.h" > + > /* > * Bits in event code for POWER6 > */ > diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c > index 5e0bf09cf077..bacfab104a1a 100644 > --- a/arch/powerpc/perf/power7-pmu.c > +++ b/arch/powerpc/perf/power7-pmu.c > @@ -10,6 +10,8 @@ > #include > #include > > +#include "internal.h" > + > /* > * Bits in event code for POWER7 > */ > diff --git a/arch/powerpc/perf/ppc970-pmu.c b/arch/powerpc/perf/ppc970-pmu.c > index d35223fb112c..7d78df97f272 100644 > --- a/arch/powerpc/perf/ppc970-pmu.c > +++ b/arch/powerpc/perf/ppc970-pmu.c > @@ -9,6 +9,8 @@ > #include > #include > > +#include "internal.h" > + > /* > * Bits in event code for PPC970 > */