* [kvm-unit-tests PATCH v10 00/15] powerpc improvements
@ 2024-06-12 5:23 Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 01/15] powerpc: Add facility to query TCG or KVM host Nicholas Piggin
` (14 more replies)
0 siblings, 15 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Tree here
https://gitlab.com/npiggin/kvm-unit-tests/-/tree/powerpc
Since v9:
- Rebase after a good chunk of patches were merged.
- Review from Thomas:
- TCG/KVM host query is moved to the start of the series.
- Changelog for atomics test.
- Dropped spinlock patch change for now.
- Fixed tlbie assembly long lines in mmu patch.
- Use fdt64 accessor for 64-bit dt value.
- Upgrade powerpc gitlab CI to Fedora 40 and enable more tests
- Several other improvements.
- Reduced some long lines.
- Fixed some SPDX headers.
- New patch for adding a panic test. s390x is the only other panic
test user but it requires KVM so I couldn't see if run_tests.sh
looks sane there, but the harness needed a fix to work on powerpc.
Thanks,
Nick
Nicholas Piggin (15):
powerpc: Add facility to query TCG or KVM host
powerpc: Add atomics tests
powerpc: Add timebase tests
powerpc: Add MMU support
common/sieve: Support machines without MMU
powerpc: Add sieve.c common test
powerpc: add usermode support
powerpc: add pmu tests
configure: Make arch_libdir a first-class entity
powerpc: Remove remnants of ppc64 directory and build structure
powerpc: gitlab CI update
scripts/arch-run.bash: Fix run_panic() success exit status
powerpc: Add a panic test
powerpc/gitlab-ci: Upgrade powerpc to Fedora 40
powerpc/gitlab-ci: Enable more tests with Fedora 40
.gitlab-ci.yml | 36 +-
MAINTAINERS | 1 -
Makefile | 2 +-
common/sieve.c | 14 +-
configure | 63 ++-
lib/{ppc64 => powerpc}/asm-offsets.c | 0
lib/{ppc64 => powerpc}/asm/asm-offsets.h | 0
lib/{ppc64 => powerpc}/asm/atomic.h | 0
lib/{ppc64 => powerpc}/asm/barrier.h | 4 +-
lib/{ppc64 => powerpc}/asm/bitops.h | 4 +-
lib/powerpc/asm/hcall.h | 6 +
lib/{ppc64 => powerpc}/asm/io.h | 4 +-
lib/powerpc/asm/mmu.h | 86 ++++
lib/{ppc64 => powerpc}/asm/opal.h | 4 +-
lib/powerpc/asm/page.h | 65 +++
lib/powerpc/asm/pgtable-hwdef.h | 66 +++
lib/powerpc/asm/pgtable.h | 125 +++++
lib/powerpc/asm/processor.h | 15 +
lib/{ppc64 => powerpc}/asm/ptrace.h | 6 +-
lib/powerpc/asm/reg.h | 14 +
lib/powerpc/asm/rtas.h | 1 +
lib/powerpc/asm/setup.h | 1 +
lib/powerpc/asm/smp.h | 3 +
lib/powerpc/asm/spinlock.h | 6 +
lib/powerpc/asm/stack.h | 3 +
lib/{ppc64 => powerpc}/asm/vpa.h | 0
lib/powerpc/io.c | 7 +
lib/powerpc/mmu.c | 260 +++++++++++
lib/{ppc64 => powerpc}/opal-calls.S | 4 +-
lib/{ppc64 => powerpc}/opal.c | 0
lib/powerpc/processor.c | 47 ++
lib/powerpc/rtas.c | 19 +
lib/powerpc/setup.c | 61 ++-
lib/{ppc64 => powerpc}/stack.c | 0
lib/ppc64/.gitignore | 1 -
lib/ppc64/asm/handlers.h | 1 -
lib/ppc64/asm/hcall.h | 1 -
lib/ppc64/asm/memory_areas.h | 6 -
lib/ppc64/asm/page.h | 1 -
lib/ppc64/asm/ppc_asm.h | 1 -
lib/ppc64/asm/processor.h | 1 -
lib/ppc64/asm/reg.h | 1 -
lib/ppc64/asm/rtas.h | 1 -
lib/ppc64/asm/setup.h | 1 -
lib/ppc64/asm/smp.h | 1 -
lib/ppc64/asm/spinlock.h | 6 -
lib/ppc64/asm/stack.h | 11 -
lib/vmalloc.c | 7 +
lib/vmalloc.h | 2 +
powerpc/Makefile | 111 ++++-
powerpc/Makefile.common | 89 ----
powerpc/Makefile.ppc64 | 30 --
powerpc/atomics.c | 386 ++++++++++++++++
powerpc/interrupts.c | 129 +++++-
powerpc/mmu.c | 225 +++++++++
powerpc/pmu.c | 562 +++++++++++++++++++++++
powerpc/run | 2 +-
powerpc/selftest.c | 18 +-
powerpc/sieve.c | 1 +
powerpc/sprs.c | 2 +-
powerpc/timebase.c | 350 ++++++++++++++
powerpc/tm.c | 2 +-
powerpc/unittests.cfg | 64 ++-
scripts/arch-run.bash | 1 +
64 files changed, 2696 insertions(+), 245 deletions(-)
rename lib/{ppc64 => powerpc}/asm-offsets.c (100%)
rename lib/{ppc64 => powerpc}/asm/asm-offsets.h (100%)
rename lib/{ppc64 => powerpc}/asm/atomic.h (100%)
rename lib/{ppc64 => powerpc}/asm/barrier.h (83%)
rename lib/{ppc64 => powerpc}/asm/bitops.h (69%)
rename lib/{ppc64 => powerpc}/asm/io.h (50%)
create mode 100644 lib/powerpc/asm/mmu.h
rename lib/{ppc64 => powerpc}/asm/opal.h (90%)
create mode 100644 lib/powerpc/asm/page.h
create mode 100644 lib/powerpc/asm/pgtable-hwdef.h
create mode 100644 lib/powerpc/asm/pgtable.h
rename lib/{ppc64 => powerpc}/asm/ptrace.h (89%)
create mode 100644 lib/powerpc/asm/spinlock.h
rename lib/{ppc64 => powerpc}/asm/vpa.h (100%)
create mode 100644 lib/powerpc/mmu.c
rename lib/{ppc64 => powerpc}/opal-calls.S (88%)
rename lib/{ppc64 => powerpc}/opal.c (100%)
rename lib/{ppc64 => powerpc}/stack.c (100%)
delete mode 100644 lib/ppc64/.gitignore
delete mode 100644 lib/ppc64/asm/handlers.h
delete mode 100644 lib/ppc64/asm/hcall.h
delete mode 100644 lib/ppc64/asm/memory_areas.h
delete mode 100644 lib/ppc64/asm/page.h
delete mode 100644 lib/ppc64/asm/ppc_asm.h
delete mode 100644 lib/ppc64/asm/processor.h
delete mode 100644 lib/ppc64/asm/reg.h
delete mode 100644 lib/ppc64/asm/rtas.h
delete mode 100644 lib/ppc64/asm/setup.h
delete mode 100644 lib/ppc64/asm/smp.h
delete mode 100644 lib/ppc64/asm/spinlock.h
delete mode 100644 lib/ppc64/asm/stack.h
delete mode 100644 powerpc/Makefile.common
delete mode 100644 powerpc/Makefile.ppc64
create mode 100644 powerpc/atomics.c
create mode 100644 powerpc/mmu.c
create mode 100644 powerpc/pmu.c
create mode 120000 powerpc/sieve.c
create mode 100644 powerpc/timebase.c
--
2.45.1
^ permalink raw reply [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 01/15] powerpc: Add facility to query TCG or KVM host
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 02/15] powerpc: Add atomics tests Nicholas Piggin
` (13 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Use device tree properties to determine whether KVM or TCG is in
use.
Logically these are not the inverse of one another, because KVM can run
on a TCG processor (if TCG is emulating HV mode, or it is using the
nested hypervisor APIs in pseries / spapr). And kvm-unit-tests can run
on that KVM.
This can be a problem because some issues relate to TCG CPU emulation
some to the spapr hypervisor implementation, some to KVM, some to real
hardware, so the TCG test is best-effort for now and is set to the
opposite of KVM. The two independent variables are added because we may
be able to more accurately determine this in future.
Use this facility to restrict some of the known test failures to TCG.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/processor.h | 3 +++
lib/powerpc/setup.c | 26 ++++++++++++++++++++++++++
powerpc/interrupts.c | 6 ++++--
powerpc/sprs.c | 2 +-
powerpc/tm.c | 2 +-
5 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index a3859b5d4..a660344cb 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -10,6 +10,9 @@ void handle_exception(int trap, void (*func)(struct pt_regs *, void *), void *);
void do_handle_exception(struct pt_regs *regs);
#endif /* __ASSEMBLY__ */
+extern bool host_is_tcg;
+extern bool host_is_kvm;
+
extern bool cpu_has_hv;
extern bool cpu_has_power_mce;
extern bool cpu_has_siar;
diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c
index 622b99e5d..86e2e144c 100644
--- a/lib/powerpc/setup.c
+++ b/lib/powerpc/setup.c
@@ -208,6 +208,9 @@ void cpu_init(struct cpu *cpu, int cpu_id)
cpu->exception_stack += SZ_64K - 64;
}
+bool host_is_tcg;
+bool host_is_kvm;
+
void setup(const void *fdt)
{
void *freemem = &stacktop;
@@ -259,6 +262,29 @@ void setup(const void *fdt)
assert(ret == 0);
freemem += fdt_size;
+ if (!fdt_node_check_compatible(fdt, 0, "qemu,pseries")) {
+ assert(!cpu_has_hv);
+
+ /*
+ * host_is_tcg incorrectly does not get set when running
+ * KVM on a TCG host (using powernv HV emulation or spapr
+ * nested HV).
+ */
+ ret = fdt_subnode_offset(fdt, 0, "hypervisor");
+ if (ret < 0) {
+ host_is_tcg = true;
+ host_is_kvm = false;
+ } else {
+ /* KVM is the only supported hypervisor */
+ assert(!fdt_node_check_compatible(fdt, ret, "linux,kvm"));
+ host_is_tcg = false;
+ host_is_kvm = true;
+ }
+ } else {
+ assert(cpu_has_hv);
+ host_is_tcg = true;
+ host_is_kvm = false;
+ }
ret = dt_get_initrd(&tmp, &initrd_size);
assert(ret == 0 || ret == -FDT_ERR_NOTFOUND);
if (ret == 0) {
diff --git a/powerpc/interrupts.c b/powerpc/interrupts.c
index 552c48ef2..3e3622e59 100644
--- a/powerpc/interrupts.c
+++ b/powerpc/interrupts.c
@@ -72,7 +72,8 @@ static void test_mce(void)
is_fetch = false;
asm volatile("lbz %0,0(%1)" : "=r"(tmp) : "r"(addr));
- report(got_interrupt, "MCE on access to invalid real address");
+ /* KVM does not MCE on access outside partition scope */
+ report_kfail(host_is_kvm, got_interrupt, "MCE on access to invalid real address");
if (got_interrupt) {
report(mfspr(SPR_DAR) == addr, "MCE sets DAR correctly");
if (cpu_has_power_mce)
@@ -82,7 +83,8 @@ static void test_mce(void)
is_fetch = true;
asm volatile("mtctr %0 ; bctrl" :: "r"(addr) : "ctr", "lr");
- report(got_interrupt, "MCE on fetch from invalid real address");
+ /* KVM does not MCE on access outside partition scope */
+ report_kfail(host_is_kvm, got_interrupt, "MCE on fetch from invalid real address");
if (got_interrupt) {
report(recorded_regs.nip == addr, "MCE sets SRR0 correctly");
if (cpu_has_power_mce)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index a85011ad5..dc810b8da 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -590,7 +590,7 @@ int main(int argc, char **argv)
if (sprs[i].width == 32 && !(before[i] >> 32) && !(after[i] >> 32)) {
/* known failure KVM migration of CTRL */
- report_kfail(i == 136, pass,
+ report_kfail(host_is_kvm && i == 136, pass,
"%-10s(%4d):\t 0x%08lx <==> 0x%08lx",
sprs[i].name, i,
before[i], after[i]);
diff --git a/powerpc/tm.c b/powerpc/tm.c
index 507eaf492..d4f436147 100644
--- a/powerpc/tm.c
+++ b/powerpc/tm.c
@@ -135,7 +135,7 @@ int main(int argc, char **argv)
}
/* kvm-unit-tests can limit number of CPUs present */
/* KVM does not report TM in secondary threads in POWER9 */
- report_kfail(true, cpus_with_tm >= nr_cpus_present,
+ report_kfail(host_is_kvm, cpus_with_tm >= nr_cpus_present,
"TM available in all 'ibm,pa-features' properties");
all = argc == 1 || !strcmp(argv[1], "all");
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 02/15] powerpc: Add atomics tests
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 01/15] powerpc: Add facility to query TCG or KVM host Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 03/15] powerpc: Add timebase tests Nicholas Piggin
` (12 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Add some tests for larx/stcx. operations for certain edge cases including
migration, as well as some simple performance tests.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
powerpc/Makefile.common | 1 +
powerpc/atomics.c | 386 ++++++++++++++++++++++++++++++++++++++++
powerpc/unittests.cfg | 10 ++
3 files changed, 397 insertions(+)
create mode 100644 powerpc/atomics.c
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index 16f14577e..b52037c0d 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -11,6 +11,7 @@ tests-common = \
$(TEST_DIR)/spapr_hcall.elf \
$(TEST_DIR)/rtas.elf \
$(TEST_DIR)/emulator.elf \
+ $(TEST_DIR)/atomics.elf \
$(TEST_DIR)/tm.elf \
$(TEST_DIR)/smp.elf \
$(TEST_DIR)/sprs.elf \
diff --git a/powerpc/atomics.c b/powerpc/atomics.c
new file mode 100644
index 000000000..abbfff4b4
--- /dev/null
+++ b/powerpc/atomics.c
@@ -0,0 +1,386 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Test some powerpc instructions
+ *
+ * Copyright 2024 Nicholas Piggin, IBM Corp.
+ */
+#include <stdint.h>
+#include <libcflat.h>
+#include <migrate.h>
+#include <asm/processor.h>
+#include <asm/time.h>
+#include <asm/atomic.h>
+#include <asm/setup.h>
+#include <asm/barrier.h>
+#include <asm/smp.h>
+
+static bool do_migrate;
+static bool do_record;
+
+#define RSV_SIZE 128
+
+static uint8_t granule[RSV_SIZE] __attribute((__aligned__(RSV_SIZE)));
+
+static void spin_lock(unsigned int *lock)
+{
+ unsigned int old;
+
+ asm volatile ("1:"
+ "lwarx %0,0,%2;"
+ "cmpwi %0,0;"
+ "bne 1b;"
+ "stwcx. %1,0,%2;"
+ "bne- 1b;"
+ "lwsync;"
+ : "=&r"(old) : "r"(1), "r"(lock) : "cr0", "memory");
+}
+
+static void spin_unlock(unsigned int *lock)
+{
+ asm volatile("lwsync;"
+ "stw %1,%0;"
+ : "+m"(*lock) : "r"(0) : "memory");
+}
+
+static volatile bool got_interrupt;
+static volatile struct pt_regs recorded_regs;
+
+static void interrupt_handler(struct pt_regs *regs, void *opaque)
+{
+ assert(!got_interrupt);
+ got_interrupt = true;
+ memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
+ regs_advance_insn(regs);
+}
+
+static void test_lwarx_stwcx(int argc, char *argv[])
+{
+ unsigned int *var = (unsigned int *)granule;
+ unsigned int old;
+ unsigned int result;
+
+ *var = 0;
+ asm volatile ("1:"
+ "lwarx %0,0,%2;"
+ "stwcx. %1,0,%2;"
+ "bne- 1b;"
+ : "=&r"(old) : "r"(1), "r"(var) : "cr0", "memory");
+ report(old == 0 && *var == 1, "simple update");
+
+ *var = 0;
+ asm volatile ("li %0,0;"
+ "stwcx. %1,0,%2;"
+ "stwcx. %1,0,%2;"
+ "bne- 1f;"
+ "li %0,1;"
+ "1:"
+ : "=&r"(result)
+ : "r"(1), "r"(var) : "cr0", "memory");
+ report(result == 0 && *var == 0, "failed stwcx. (no reservation)");
+
+ *var = 0;
+ asm volatile ("li %0,0;"
+ "lwarx %1,0,%4;"
+ "stw %3,0(%4);"
+ "stwcx. %2,0,%4;"
+ "bne- 1f;"
+ "li %0,1;"
+ "1:"
+ : "=&r"(result), "=&r"(old)
+ : "r"(1), "r"(2), "r"(var) : "cr0", "memory");
+ /* This is implementation specific, so don't fail */
+ if (result == 0 && *var == 2)
+ report(true, "failed stwcx. (intervening store)");
+ else
+ report(true, "succeeded stwcx. (intervening store)");
+
+ handle_exception(0x600, interrupt_handler, NULL);
+ handle_exception(0x700, interrupt_handler, NULL);
+
+ /* Implementations may not necessarily invoke the alignment interrupt */
+ old = 10;
+ *var = 0;
+ asm volatile (
+ "lwarx %0,0,%1;"
+ : "+&r"(old) : "r"((char *)var + 1));
+ report(old == 10 && got_interrupt && recorded_regs.trap == 0x600,
+ "unaligned lwarx causes fault");
+ got_interrupt = false;
+
+ /*
+ * Unaligned stwcx. is more difficult to test, at least under QEMU,
+ * the store does not proceed if there is no matching reservation, so
+ * the alignment handler does not get invoked. This is okay according
+ * to the Power ISA (unalignment does not necessarily invoke the
+ * alignment interrupt). But POWER CPUs do cause alignment interrupt.
+ */
+ *var = 0;
+ asm volatile (
+ "lwarx %0,0,%2;"
+ "stwcx. %1,0,%3;"
+ : "=&r"(old) : "r"(1), "r"(var), "r"((char *)var+1)
+ : "cr0", "memory");
+ /*
+ * An unaligned larx/stcx. is not required by the ISA to cause an
+ * exception, and in TCG the stcx does not though it does on POWER CPUs.
+ */
+ report_kfail(host_is_tcg, old == 0 && *var == 0 &&
+ got_interrupt && recorded_regs.trap == 0x600,
+ "unaligned stwcx. causes fault");
+ got_interrupt = false;
+
+ handle_exception(0x600, NULL, NULL);
+
+}
+
+static void test_lqarx_stqcx(int argc, char *argv[])
+{
+ union {
+ __int128_t var;
+ struct {
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ unsigned long var1;
+ unsigned long var2;
+#else
+ unsigned long var2;
+ unsigned long var1;
+#endif
+ };
+ } var __attribute__((aligned(16)));
+ register unsigned long new1 asm("r8");
+ register unsigned long new2 asm("r9");
+ register unsigned long old1 asm("r10");
+ register unsigned long old2 asm("r11");
+ unsigned int result;
+
+ var.var1 = 1;
+ var.var2 = 2;
+
+ (void)new2;
+ (void)old2;
+
+ old1 = 0;
+ old2 = 0;
+ new1 = 3;
+ new2 = 4;
+ asm volatile ("1:"
+ "lqarx %0,0,%4;"
+ "stqcx. %2,0,%4;"
+ "bne- 1b;"
+ : "=&r"(old1), "=&r"(old2)
+ : "r"(new1), "r"(new2), "r"(&var)
+ : "cr0", "memory");
+
+ report(old1 == 2 && old2 == 1 && var.var1 == 4 && var.var2 == 3,
+ "simple update");
+
+ var.var1 = 1;
+ var.var2 = 2;
+ new1 = 3;
+ new2 = 4;
+ asm volatile ("li %0,0;"
+ "stqcx. %1,0,%3;"
+ "stqcx. %1,0,%3;"
+ "bne- 1f;"
+ "li %0,1;"
+ "1:"
+ : "=&r"(result)
+ : "r"(new1), "r"(new2), "r"(&var)
+ : "cr0", "memory");
+ report(result == 0 && var.var1 == 1 && var.var2 == 2,
+ "failed stqcx. (no reservation)");
+
+ var.var1 = 1;
+ var.var2 = 2;
+ new1 = 3;
+ new2 = 4;
+ asm volatile ("li %0,0;"
+ "lqarx %1,0,%6;"
+ "std %5,0(%6);"
+ "stqcx. %3,0,%6;"
+ "bne- 1f;"
+ "li %0,1;"
+ "1:"
+ : "=&r"(result), "=&r"(old1), "=&r"(old2)
+ : "r"(new1), "r"(new2), "r"(0), "r"(&var)
+ : "cr0", "memory");
+ /* This is implementation specific, so don't fail */
+ if (result == 0 && (var.var1 == 0 || var.var2 == 0))
+ report(true, "failed stqcx. (intervening store)");
+ else
+ report(true, "succeeded stqcx. (intervening store)");
+}
+
+static void test_migrate_reserve(int argc, char *argv[])
+{
+ unsigned int *var = (unsigned int *)granule;
+ unsigned int old;
+ int i;
+ int succeed = 0;
+
+ if (!do_migrate)
+ return;
+
+ for (i = 0; i < 10; i++) {
+ *var = 0x12345;
+ asm volatile ("lwarx %0,0,%1" : "=&r"(old) : "r"(var) : "memory");
+ migrate_quiet();
+ asm volatile ("stwcx. %0,0,%1" : : "r"(0xf00d), "r"(var) : "cr0", "memory");
+ if (*var == 0xf00d)
+ succeed++;
+ }
+
+ if (do_record) {
+ /*
+ * Running under TCG record-replay, reservations must not
+ * be lost by migration
+ */
+ report(succeed > 0, "migrated reservation is not lost");
+ } else {
+ report(succeed == 0, "migrated reservation is lost");
+ }
+
+ report_prefix_pop();
+}
+
+#define ITERS 10000000
+static int test_counter = 0;
+static void test_inc_perf(int argc, char *argv[])
+{
+ int i;
+ uint64_t tb1, tb2;
+
+ tb1 = get_tb();
+ for (i = 0; i < ITERS; i++)
+ __atomic_fetch_add(&test_counter, 1, __ATOMIC_RELAXED);
+ tb2 = get_tb();
+ report(true, "atomic add takes %ldns",
+ (tb2 - tb1) * 1000000000 / ITERS / tb_hz);
+
+ tb1 = get_tb();
+ for (i = 0; i < ITERS; i++)
+ __atomic_fetch_add(&test_counter, 1, __ATOMIC_SEQ_CST);
+ tb2 = get_tb();
+ report(true, "sequentially conssistent atomic add takes %ldns",
+ (tb2 - tb1) * 1000000000 / ITERS / tb_hz);
+}
+
+static long smp_inc_counter = 0;
+static int smp_inc_started;
+
+static void smp_inc_fn(int cpu_id)
+{
+ long i;
+
+ atomic_fetch_inc(&smp_inc_started);
+ while (smp_inc_started < nr_cpus_present)
+ cpu_relax();
+
+ for (i = 0; i < ITERS; i++)
+ atomic_fetch_inc(&smp_inc_counter);
+ atomic_fetch_dec(&smp_inc_started);
+}
+
+static void test_smp_inc(int argc, char **argv)
+{
+ if (nr_cpus_present < 2)
+ return;
+
+ if (!start_all_cpus(smp_inc_fn))
+ report_abort("Failed to start secondary cpus");
+
+ while (smp_inc_started < nr_cpus_present - 1)
+ cpu_relax();
+ smp_inc_fn(smp_processor_id());
+ while (smp_inc_started > 0)
+ cpu_relax();
+
+ stop_all_cpus();
+
+ report(smp_inc_counter == nr_cpus_present * ITERS,
+ "counter lost no increments");
+}
+
+static long smp_lock_counter __attribute__((aligned(128))) = 0;
+static unsigned int smp_lock __attribute__((aligned(128)));
+static int smp_lock_started;
+
+static void smp_lock_fn(int cpu_id)
+{
+ long i;
+
+ atomic_fetch_inc(&smp_lock_started);
+ while (smp_lock_started < nr_cpus_present)
+ cpu_relax();
+
+ for (i = 0; i < ITERS; i++) {
+ spin_lock(&smp_lock);
+ smp_lock_counter++;
+ spin_unlock(&smp_lock);
+ }
+ atomic_fetch_dec(&smp_lock_started);
+}
+
+static void test_smp_lock(int argc, char **argv)
+{
+ if (nr_cpus_present < 2)
+ return;
+
+ if (!start_all_cpus(smp_lock_fn))
+ report_abort("Failed to start secondary cpus");
+
+ while (smp_lock_started < nr_cpus_present - 1)
+ cpu_relax();
+ smp_lock_fn(smp_processor_id());
+ while (smp_lock_started > 0)
+ cpu_relax();
+
+ stop_all_cpus();
+
+ report(smp_lock_counter == nr_cpus_present * ITERS,
+ "counter lost no increments");
+}
+
+struct {
+ const char *name;
+ void (*func)(int argc, char **argv);
+} hctests[] = {
+ { "lwarx/stwcx", test_lwarx_stwcx },
+ { "lqarx/stqcx", test_lqarx_stqcx },
+ { "migration", test_migrate_reserve },
+ { "performance", test_inc_perf },
+ { "SMP-atomic", test_smp_inc },
+ { "SMP-lock", test_smp_lock },
+ { NULL, NULL }
+};
+
+int main(int argc, char **argv)
+{
+ int i;
+ int all;
+
+ all = argc == 1 || !strcmp(argv[1], "all");
+
+ for (i = 1; i < argc; i++) {
+ if (strcmp(argv[i], "-r") == 0) {
+ do_record = true;
+ }
+ if (strcmp(argv[i], "-m") == 0) {
+ do_migrate = true;
+ }
+ }
+
+ report_prefix_push("atomics");
+
+ for (i = 0; hctests[i].name != NULL; i++) {
+ if (all || strcmp(argv[1], hctests[i].name) == 0) {
+ report_prefix_push(hctests[i].name);
+ hctests[i].func(argc, argv);
+ report_prefix_pop();
+ }
+ }
+
+ report_prefix_pop();
+
+ return report_summary();
+}
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 5c458996b..407090ac4 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -83,6 +83,16 @@ file = smp.elf
smp = 8,threads=4
accel = tcg,thread=single
+[atomics]
+file = atomics.elf
+smp = 2
+
+[atomics-migration]
+file = atomics.elf
+machine = pseries
+extra_params = -append "migration -m"
+groups = migration
+
[h_cede_tm]
file = tm.elf
machine = pseries
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 03/15] powerpc: Add timebase tests
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 01/15] powerpc: Add facility to query TCG or KVM host Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 02/15] powerpc: Add atomics tests Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 04/15] powerpc: Add MMU support Nicholas Piggin
` (11 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
This has a known failure on QEMU TCG machines where the decrementer
interrupt is not lowered when the DEC wraps from -ve to +ve.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/reg.h | 1 +
powerpc/Makefile.common | 1 +
powerpc/timebase.c | 350 ++++++++++++++++++++++++++++++++++++++++
powerpc/unittests.cfg | 8 +
4 files changed, 360 insertions(+)
create mode 100644 powerpc/timebase.c
diff --git a/lib/powerpc/asm/reg.h b/lib/powerpc/asm/reg.h
index d2ca964c4..12f9e8ac6 100644
--- a/lib/powerpc/asm/reg.h
+++ b/lib/powerpc/asm/reg.h
@@ -35,6 +35,7 @@
#define SPR_HSRR1 0x13b
#define SPR_LPCR 0x13e
#define LPCR_HDICE UL(0x1)
+#define LPCR_LD UL(0x20000)
#define SPR_HEIR 0x153
#define SPR_MMCR0 0x31b
#define MMCR0_FC UL(0x80000000)
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index b52037c0d..6f50f6b6c 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -15,6 +15,7 @@ tests-common = \
$(TEST_DIR)/tm.elf \
$(TEST_DIR)/smp.elf \
$(TEST_DIR)/sprs.elf \
+ $(TEST_DIR)/timebase.elf \
$(TEST_DIR)/interrupts.elf
tests-all = $(tests-common) $(tests)
diff --git a/powerpc/timebase.c b/powerpc/timebase.c
new file mode 100644
index 000000000..1e6343999
--- /dev/null
+++ b/powerpc/timebase.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Test Timebase
+ *
+ * Copyright 2024 Nicholas Piggin, IBM Corp.
+ *
+ * This contains tests of timebase facility, TB, DEC, etc.
+ */
+#include <libcflat.h>
+#include <util.h>
+#include <migrate.h>
+#include <alloc.h>
+#include <asm/handlers.h>
+#include <devicetree.h>
+#include <asm/hcall.h>
+#include <asm/processor.h>
+#include <asm/time.h>
+#include <asm/barrier.h>
+
+static int dec_bits = 0;
+
+static void cpu_dec_bits(int fdtnode, u64 regval __unused, void *arg __unused)
+{
+ const struct fdt_property *prop;
+ int plen;
+
+ prop = fdt_get_property(dt_fdt(), fdtnode, "ibm,dec-bits", &plen);
+ if (!prop) {
+ dec_bits = 32;
+ return;
+ }
+
+ /* Sanity check for the property layout (first two bytes are header) */
+ assert(plen == 4);
+
+ /* Check all CPU nodes have the same value of dec-bits */
+ if (dec_bits)
+ assert(dec_bits == fdt32_to_cpu(*(uint32_t *)prop->data));
+ else
+ dec_bits = fdt32_to_cpu(*(uint32_t *)prop->data);
+}
+
+/* Check amount of CPUs nodes that have the TM flag */
+static int find_dec_bits(void)
+{
+ int ret;
+
+ ret = dt_for_each_cpu_node(cpu_dec_bits, NULL);
+ if (ret < 0)
+ return ret;
+
+ return dec_bits;
+}
+
+
+static bool do_migrate = false;
+static volatile bool got_interrupt;
+static volatile struct pt_regs recorded_regs;
+
+static uint64_t dec_max;
+static uint64_t dec_min;
+
+static void test_tb(int argc, char **argv)
+{
+ uint64_t tb;
+ int i;
+
+ tb = get_tb();
+ report(get_tb() >= tb, "timebase is not going backwards");
+ if (do_migrate) {
+ tb = get_tb();
+ migrate();
+ report(get_tb() >= tb,
+ "timebase is not going backwards over migration");
+ }
+
+ for (i = 0; i < 100; i++) {
+ if (get_tb() > tb)
+ break;
+ }
+ report(get_tb() > tb, "timebase is incrementing");
+}
+
+static void dec_stop_handler(struct pt_regs *regs, void *data)
+{
+ mtspr(SPR_DEC, dec_max);
+}
+
+static void dec_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
+ regs->msr &= ~MSR_EE;
+}
+
+static void test_dec(int argc, char **argv)
+{
+ uint64_t tb1, tb2, dec;
+ int i;
+
+ handle_exception(0x900, &dec_handler, NULL);
+
+ for (i = 0; i < 100; i++) {
+ tb1 = get_tb();
+ mtspr(SPR_DEC, dec_max);
+ dec = mfspr(SPR_DEC);
+ tb2 = get_tb();
+ if (tb2 - tb1 < dec_max - dec)
+ break;
+ }
+ /* POWER CPUs can have a slight (few ticks) variation here */
+ report_kfail(!host_is_tcg, tb2 - tb1 >= dec_max - dec,
+ "decrementer remains within TB after mtDEC");
+
+ tb1 = get_tb();
+ mtspr(SPR_DEC, dec_max);
+ mdelay(1000);
+ dec = mfspr(SPR_DEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - dec,
+ "decrementer remains within TB after 1s");
+
+ mtspr(SPR_DEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ if (mfspr(SPR_DEC) <= dec_max) {
+ report(!got_interrupt,
+ "no interrupt on decrementer positive");
+ }
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, 1);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer underflow");
+ got_interrupt = false;
+
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer still underflown");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, 0);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "DEC deal with set to 0");
+ got_interrupt = false;
+
+ /* Test for level-triggered decrementer */
+ mtspr(SPR_DEC, -1ULL);
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer write MSB");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, dec_max);
+ local_irq_enable();
+ if (do_migrate)
+ migrate();
+ mtspr(SPR_DEC, -1);
+ local_irq_disable();
+ report(got_interrupt, "interrupt on decrementer write MSB with irqs on");
+ got_interrupt = false;
+
+ mtspr(SPR_DEC, dec_min + 1);
+ mdelay(100);
+ local_irq_enable();
+ local_irq_disable();
+ /* TCG does not model this correctly */
+ report_kfail(host_is_tcg, !got_interrupt,
+ "no interrupt after wrap to positive");
+ got_interrupt = false;
+
+ handle_exception(0x900, NULL, NULL);
+}
+
+static void test_hdec(int argc, char **argv)
+{
+ uint64_t tb1, tb2, hdec;
+
+ if (!machine_is_powernv()) {
+ report_skip("test reqiures powernv machine");
+ return;
+ }
+
+ handle_exception(0x900, &dec_stop_handler, NULL);
+ handle_exception(0x980, &dec_handler, NULL);
+
+ mtspr(SPR_HDEC, dec_max);
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_HDICE);
+
+ tb1 = get_tb();
+ mtspr(SPR_HDEC, dec_max);
+ hdec = mfspr(SPR_HDEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - hdec, "hdecrementer remains within TB");
+
+ tb1 = get_tb();
+ mtspr(SPR_HDEC, dec_max);
+ mdelay(1000);
+ hdec = mfspr(SPR_HDEC);
+ tb2 = get_tb();
+ report(tb2 - tb1 >= dec_max - hdec, "hdecrementer remains within TB after 1s");
+
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ if (mfspr(SPR_HDEC) <= dec_max) {
+ report(!got_interrupt, "no interrupt on decrementer positive");
+ }
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, 1);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ /* HDEC is edge triggered so ensure it still fires */
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "interrupt on hdecrementer underflow");
+ got_interrupt = false;
+
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(!got_interrupt, "no interrupt on hdecrementer still underflown");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, -1ULL);
+ if (do_migrate)
+ migrate();
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "no interrupt on hdecrementer underflown write MSB");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, 0);
+ mdelay(100); /* Give the timer a chance to run */
+ if (do_migrate)
+ migrate();
+ /* HDEC is edge triggered so ensure it still fires */
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "HDEC deal with set to 0");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, dec_max);
+ local_irq_enable();
+ if (do_migrate)
+ migrate();
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_disable();
+ report(got_interrupt, "interrupt on hdecrementer write MSB with irqs on");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, dec_max);
+ got_interrupt = false;
+ mtspr(SPR_HDEC, dec_min + 1);
+ if (do_migrate)
+ migrate();
+ mdelay(100);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "got interrupt after wrap to positive");
+ got_interrupt = false;
+
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_enable();
+ local_irq_disable();
+ got_interrupt = false;
+ mtspr(SPR_HDEC, dec_min + 1000000);
+ if (do_migrate)
+ migrate();
+ mdelay(100);
+ mtspr(SPR_HDEC, -1ULL);
+ local_irq_enable();
+ local_irq_disable();
+ report(got_interrupt, "edge re-armed after wrap to positive");
+ got_interrupt = false;
+
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) & ~LPCR_HDICE);
+
+ handle_exception(0x900, NULL, NULL);
+ handle_exception(0x980, NULL, NULL);
+}
+
+struct {
+ const char *name;
+ void (*func)(int argc, char **argv);
+} hctests[] = {
+ { "tb", test_tb },
+ { "dec", test_dec },
+ { "hdec", test_hdec },
+ { NULL, NULL }
+};
+
+int main(int argc, char **argv)
+{
+ bool all;
+ int i;
+
+ all = argc == 1 || !strcmp(argv[1], "all");
+
+ for (i = 1; i < argc; i++) {
+ if (!strcmp(argv[i], "-w")) {
+ do_migrate = true;
+ if (!all && argc == 2)
+ all = true;
+ }
+ }
+
+ find_dec_bits();
+ dec_max = (1ULL << (dec_bits - 1)) - 1;
+ dec_min = (1ULL << (dec_bits - 1));
+
+ if (machine_is_powernv() && dec_bits > 32) {
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_LD);
+ }
+
+ report_prefix_push("timebase");
+
+ for (i = 0; hctests[i].name != NULL; i++) {
+ if (all || strcmp(argv[1], hctests[i].name) == 0) {
+ report_prefix_push(hctests[i].name);
+ hctests[i].func(argc, argv);
+ report_prefix_pop();
+ }
+ }
+
+ report_prefix_pop();
+
+ if (machine_is_powernv() && dec_bits > 32) {
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) & ~LPCR_LD);
+ }
+
+ return report_summary();
+}
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 407090ac4..9af933b14 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -93,6 +93,14 @@ machine = pseries
extra_params = -append "migration -m"
groups = migration
+[timebase]
+file = timebase.elf
+
+[timebase-icount]
+file = timebase.elf
+accel = tcg
+extra_params = -icount shift=5
+
[h_cede_tm]
file = tm.elf
machine = pseries
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 04/15] powerpc: Add MMU support
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (2 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 03/15] powerpc: Add timebase tests Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 05/15] common/sieve: Support machines without MMU Nicholas Piggin
` (10 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Add support for radix MMU, 4kB and 64kB pages.
This also adds MMU interrupt test cases, and runs the interrupts
test entirely with MMU enabled if it is available (aside from
machine check tests).
Acked-by: Andrew Jones <andrew.jones@linux.dev> (configure changes)
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
configure | 44 ++++--
lib/powerpc/asm/hcall.h | 6 +
lib/powerpc/asm/processor.h | 1 +
lib/powerpc/asm/reg.h | 3 +
lib/powerpc/asm/smp.h | 2 +
lib/powerpc/processor.c | 9 ++
lib/powerpc/setup.c | 8 +-
lib/ppc64/asm/mmu.h | 87 ++++++++++++
lib/ppc64/asm/page.h | 66 ++++++++-
lib/ppc64/asm/pgtable-hwdef.h | 66 +++++++++
lib/ppc64/asm/pgtable.h | 125 ++++++++++++++++
lib/ppc64/mmu.c | 258 ++++++++++++++++++++++++++++++++++
lib/ppc64/opal-calls.S | 4 +-
powerpc/Makefile.common | 4 +-
powerpc/Makefile.ppc64 | 1 +
powerpc/interrupts.c | 95 +++++++++++--
powerpc/mmu.c | 225 +++++++++++++++++++++++++++++
powerpc/unittests.cfg | 4 +
18 files changed, 978 insertions(+), 30 deletions(-)
create mode 100644 lib/ppc64/asm/mmu.h
create mode 100644 lib/ppc64/asm/pgtable-hwdef.h
create mode 100644 lib/ppc64/asm/pgtable.h
create mode 100644 lib/ppc64/mmu.c
create mode 100644 powerpc/mmu.c
diff --git a/configure b/configure
index 0e0a28825..db15e85d6 100755
--- a/configure
+++ b/configure
@@ -74,8 +74,9 @@ usage() {
Allow PV guests to be dumped. Requires at least z16.
(s390x only)
--page-size=PAGE_SIZE
- Specify the page size (translation granule) (4k, 16k or
- 64k, default is 4k, arm64 only)
+ Specify the page size (translation granule). PAGE_SIZE can be
+ 4k [default], 16k, 64k for arm64.
+ 4k [default], 64k for ppc64.
--earlycon=EARLYCON
Specify the UART name, type and address (optional, arm and
arm64 only). The specified address will overwrite the UART
@@ -245,25 +246,33 @@ fi
if [ -z "$page_size" ]; then
if [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
page_size="4096"
+ elif [ "$arch" = "ppc64" ]; then
+ page_size="65536"
fi
else
- if [ "$arch" != "arm64" ]; then
- echo "--page-size is not supported for $arch"
- usage
- fi
-
if [ "${page_size: -1}" = "K" ] || [ "${page_size: -1}" = "k" ]; then
page_size=$(( ${page_size%?} * 1024 ))
fi
- if [ "$page_size" != "4096" ] && [ "$page_size" != "16384" ] &&
- [ "$page_size" != "65536" ]; then
- echo "arm64 doesn't support page size of $page_size"
+
+ if [ "$arch" = "arm64" ]; then
+ if [ "$page_size" != "4096" ] && [ "$page_size" != "16384" ] &&
+ [ "$page_size" != "65536" ]; then
+ echo "arm64 doesn't support page size of $page_size"
+ usage
+ fi
+ if [ "$efi" = 'y' ] && [ "$page_size" != "4096" ]; then
+ echo "efi must use 4K pages"
+ exit 1
+ fi
+ elif [ "$arch" = "ppc64" ]; then
+ if [ "$page_size" != "4096" ] && [ "$page_size" != "65536" ]; then
+ echo "ppc64 doesn't support page size of $page_size"
+ usage
+ fi
+ else
+ echo "--page-size is not supported for $arch"
usage
fi
- if [ "$efi" = 'y' ] && [ "$page_size" != "4096" ]; then
- echo "efi must use 4K pages"
- exit 1
- fi
fi
[ -z "$processor" ] && processor="$arch"
@@ -472,6 +481,13 @@ cat <<EOF >> lib/config.h
#define CONFIG_UART_EARLY_BASE ${arm_uart_early_addr}
#define CONFIG_ERRATA_FORCE ${errata_force}
+
+EOF
+fi
+
+if [ "$arch" = "arm" ] || [ "$arch" = "arm64" ] || [ "$arch" = "ppc64" ]; then
+cat <<EOF >> lib/config.h
+
#define CONFIG_PAGE_SIZE _AC(${page_size}, UL)
EOF
diff --git a/lib/powerpc/asm/hcall.h b/lib/powerpc/asm/hcall.h
index e0f5009e3..3b44dd204 100644
--- a/lib/powerpc/asm/hcall.h
+++ b/lib/powerpc/asm/hcall.h
@@ -24,6 +24,12 @@
#define H_PUT_TERM_CHAR 0x58
#define H_RANDOM 0x300
#define H_SET_MODE 0x31C
+#define H_REGISTER_PROCESS_TABLE 0x37C
+
+#define PTBL_NEW 0x18
+#define PTBL_UNREGISTER 0x10
+#define PTBL_RADIX 0x04
+#define PTBL_GTSE 0x01
#define KVMPPC_HCALL_BASE 0xf000
#define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0)
diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index a660344cb..b4f195856 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -17,6 +17,7 @@ extern bool cpu_has_hv;
extern bool cpu_has_power_mce;
extern bool cpu_has_siar;
extern bool cpu_has_heai;
+extern bool cpu_has_radix;
extern bool cpu_has_prefix;
extern bool cpu_has_sc_lev;
extern bool cpu_has_pause_short;
diff --git a/lib/powerpc/asm/reg.h b/lib/powerpc/asm/reg.h
index 12f9e8ac6..b2fab4313 100644
--- a/lib/powerpc/asm/reg.h
+++ b/lib/powerpc/asm/reg.h
@@ -11,6 +11,7 @@
#define SPR_SRR0 0x01a
#define SPR_SRR1 0x01b
#define SRR1_PREFIX UL(0x20000000)
+#define SPR_PIDR 0x030
#define SPR_FSCR 0x099
#define FSCR_PREFIX UL(0x2000)
#define SPR_HFSCR 0x0be
@@ -36,7 +37,9 @@
#define SPR_LPCR 0x13e
#define LPCR_HDICE UL(0x1)
#define LPCR_LD UL(0x20000)
+#define SPR_LPIDR 0x13f
#define SPR_HEIR 0x153
+#define SPR_PTCR 0x1d0
#define SPR_MMCR0 0x31b
#define MMCR0_FC UL(0x80000000)
#define MMCR0_PMAE UL(0x04000000)
diff --git a/lib/powerpc/asm/smp.h b/lib/powerpc/asm/smp.h
index c45988bfa..bc2a68935 100644
--- a/lib/powerpc/asm/smp.h
+++ b/lib/powerpc/asm/smp.h
@@ -3,6 +3,7 @@
#include <libcflat.h>
#include <asm/processor.h>
+#include <asm/page.h>
typedef void (*secondary_entry_fn)(int cpu_id);
@@ -11,6 +12,7 @@ struct cpu {
unsigned long stack;
unsigned long exception_stack;
secondary_entry_fn entry;
+ pgd_t *pgtable;
};
extern int nr_cpus_present;
diff --git a/lib/powerpc/processor.c b/lib/powerpc/processor.c
index a6ce3c905..09f6bb9d8 100644
--- a/lib/powerpc/processor.c
+++ b/lib/powerpc/processor.c
@@ -13,6 +13,7 @@
#include <asm/barrier.h>
#include <asm/hcall.h>
#include <asm/handlers.h>
+#include <asm/mmu.h>
#include <asm/smp.h>
static struct {
@@ -47,6 +48,14 @@ void do_handle_exception(struct pt_regs *regs)
__current_cpu = (struct cpu *)mfspr(SPR_SPRG0);
+ /*
+ * We run with AIL=0, so interrupts taken with MMU disabled.
+ * Enable here.
+ */
+ assert(!(mfmsr() & (MSR_IR|MSR_DR)));
+ if (mmu_enabled())
+ mtmsr(mfmsr() | (MSR_IR|MSR_DR));
+
v = regs->trap >> 5;
if (v < 128 && handlers[v].func) {
diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c
index 86e2e144c..b7450e5e5 100644
--- a/lib/powerpc/setup.c
+++ b/lib/powerpc/setup.c
@@ -103,6 +103,7 @@ bool cpu_has_hv;
bool cpu_has_power_mce; /* POWER CPU machine checks */
bool cpu_has_siar;
bool cpu_has_heai;
+bool cpu_has_radix;
bool cpu_has_prefix;
bool cpu_has_sc_lev; /* sc interrupt has LEV field in SRR1 */
bool cpu_has_pause_short;
@@ -125,6 +126,7 @@ static void cpu_init_params(void)
cpu_has_sc_lev = true;
cpu_has_pause_short = true;
case PVR_VER_POWER9:
+ cpu_has_radix = true;
case PVR_VER_POWER8E:
case PVR_VER_POWER8NVL:
case PVR_VER_POWER8:
@@ -202,10 +204,11 @@ void cpu_init(struct cpu *cpu, int cpu_id)
{
cpu->server_no = cpu_id;
- cpu->stack = (unsigned long)memalign(SZ_4K, SZ_64K);
+ cpu->stack = (unsigned long)memalign_pages(SZ_4K, SZ_64K);
cpu->stack += SZ_64K - 64;
- cpu->exception_stack = (unsigned long)memalign(SZ_4K, SZ_64K);
+ cpu->exception_stack = (unsigned long)memalign_pages(SZ_4K, SZ_64K);
cpu->exception_stack += SZ_64K - 64;
+ cpu->pgtable = NULL;
}
bool host_is_tcg;
@@ -227,6 +230,7 @@ void setup(const void *fdt)
cpu->server_no = fdt_boot_cpuid_phys(fdt);
cpu->exception_stack = (unsigned long)boot_exception_stack;
cpu->exception_stack += EXCEPTION_STACK_SIZE - 64;
+ cpu->pgtable = NULL;
mtspr(SPR_SPRG0, (unsigned long)cpu);
__current_cpu = cpu;
diff --git a/lib/ppc64/asm/mmu.h b/lib/ppc64/asm/mmu.h
new file mode 100644
index 000000000..32f1abab6
--- /dev/null
+++ b/lib/ppc64/asm/mmu.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASMPOWERPC_MMU_H_
+#define _ASMPOWERPC_MMU_H_
+
+#include <asm/pgtable.h>
+
+bool vm_available(void);
+bool mmu_enabled(void);
+void mmu_enable(pgd_t *pgtable);
+void mmu_disable(void);
+
+static inline void tlbie(unsigned long rb, unsigned long rs, int ric, int prs, int r)
+{
+ /* MMU is radix (>= POWER9), so can use P9 tlbie directly */
+ asm volatile(
+" .machine push \n"
+" .machine power9 \n"
+" ptesync \n"
+" tlbie %0,%1,%2,%3,%4 \n"
+" eieio \n"
+" tlbsync \n"
+" ptesync \n"
+" .machine pop "
+ :: "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r) : "memory");
+}
+
+static inline void tlbiel(unsigned long rb, unsigned long rs, int ric, int prs, int r)
+{
+ asm volatile(
+" .machine push \n"
+" .machine power9 \n"
+" ptesync \n"
+" tlbiel %0,%1,%2,%3,%4 \n"
+" ptesync \n"
+" .machine pop "
+ :: "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r) : "memory");
+}
+
+static inline void flush_tlb_page(uintptr_t vaddr)
+{
+ unsigned long rb;
+ unsigned long rs = (1ULL << 32); /* pid */
+ unsigned long ap;
+
+ /* AP should come from dt (for pseries, at least) */
+ if (PAGE_SIZE == SZ_4K)
+ ap = 0;
+ else if (PAGE_SIZE == SZ_64K)
+ ap = 5;
+ else if (PAGE_SIZE == SZ_2M)
+ ap = 1;
+ else if (PAGE_SIZE == SZ_1G)
+ ap = 2;
+ else
+ assert(0);
+
+ rb = vaddr & ~((1UL << 12) - 1);
+ rb |= ap << 5;
+
+ tlbie(rb, rs, 0, 1, 1);
+}
+
+static inline void flush_tlb_page_local(uintptr_t vaddr)
+{
+ unsigned long rb;
+ unsigned long rs = (1ULL << 32); /* pid */
+ unsigned long ap;
+
+ /* AP should come from dt (for pseries, at least) */
+ if (PAGE_SIZE == SZ_4K)
+ ap = 0;
+ else if (PAGE_SIZE == SZ_64K)
+ ap = 5;
+ else if (PAGE_SIZE == SZ_2M)
+ ap = 1;
+ else if (PAGE_SIZE == SZ_1G)
+ ap = 2;
+ else
+ assert(0);
+
+ rb = vaddr & ~((1UL << 12) - 1);
+ rb |= ap << 5;
+
+ tlbiel(rb, rs, 0, 1, 1);
+}
+
+#endif
diff --git a/lib/ppc64/asm/page.h b/lib/ppc64/asm/page.h
index 1a8b62711..c497d86b9 100644
--- a/lib/ppc64/asm/page.h
+++ b/lib/ppc64/asm/page.h
@@ -1 +1,65 @@
-#include <asm-generic/page.h>
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASMPPC64_PAGE_H_
+#define _ASMPPC64_PAGE_H_
+/*
+ * Adapted from
+ * lib/arm64/asm/page.h and Linux kernel defines.
+ *
+ * Copyright (C) 2017, Red Hat Inc, Andrew Jones <drjones@redhat.com>
+ */
+
+#include <config.h>
+#include <linux/const.h>
+#include <libcflat.h>
+
+#define VA_BITS 52
+
+#define PAGE_SIZE CONFIG_PAGE_SIZE
+#if PAGE_SIZE == SZ_64K
+#define PAGE_SHIFT 16
+#elif PAGE_SIZE == SZ_4K
+#define PAGE_SHIFT 12
+#else
+#error Unsupported PAGE_SIZE
+#endif
+#define PAGE_MASK (~(PAGE_SIZE-1))
+
+#ifndef __ASSEMBLY__
+
+#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
+
+typedef u64 pteval_t;
+typedef u64 pmdval_t;
+typedef u64 pudval_t;
+typedef u64 pgdval_t;
+typedef struct { pteval_t pte; } pte_t;
+typedef struct { pmdval_t pmd; } pmd_t;
+typedef struct { pudval_t pud; } pud_t;
+typedef struct { pgdval_t pgd; } pgd_t;
+typedef struct { pteval_t pgprot; } pgprot_t;
+
+#define pte_val(x) ((x).pte)
+#define pmd_val(x) ((x).pmd)
+#define pud_val(x) ((x).pud)
+#define pgd_val(x) ((x).pgd)
+#define pgprot_val(x) ((x).pgprot)
+
+#define __pte(x) ((pte_t) { (x) } )
+#define __pmd(x) ((pmd_t) { (x) } )
+#define __pud(x) ((pud_t) { (x) } )
+#define __pgd(x) ((pgd_t) { (x) } )
+#define __pgprot(x) ((pgprot_t) { (x) } )
+
+#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
+#define __pa(x) __virt_to_phys((unsigned long)(x))
+
+#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
+#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
+
+extern phys_addr_t __virt_to_phys(unsigned long addr);
+extern unsigned long __phys_to_virt(phys_addr_t addr);
+
+extern void *__ioremap(phys_addr_t phys_addr, size_t size);
+
+#endif /* !__ASSEMBLY__ */
+#endif /* _ASMPPC64_PAGE_H_ */
diff --git a/lib/ppc64/asm/pgtable-hwdef.h b/lib/ppc64/asm/pgtable-hwdef.h
new file mode 100644
index 000000000..0f4b1068a
--- /dev/null
+++ b/lib/ppc64/asm/pgtable-hwdef.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASMPPC64_PGTABLE_HWDEF_H_
+#define _ASMPPC64_PGTABLE_HWDEF_H_
+/*
+ * Copyright (C) 2024, IBM Inc, Nicholas Piggin <npiggin@gmail.com>
+ *
+ * Derived from Linux kernel MMU code.
+ */
+
+#include <asm/page.h>
+
+#define UL(x) _AC(x, UL)
+
+/*
+ * Book3S-64 Radix page table
+ */
+#define PGDIR_SHIFT 39
+#define PUD_SHIFT 30
+#define PMD_SHIFT 21
+
+#define PTRS_PER_PGD (SZ_64K / 8)
+#define PTRS_PER_PUD (SZ_4K / 8)
+#define PTRS_PER_PMD (SZ_4K / 8)
+#if PAGE_SIZE == SZ_4K
+#define PTRS_PER_PTE (SZ_4K / 8)
+#else /* 64K */
+#define PTRS_PER_PTE (256 / 8)
+#endif
+
+#define PGDIR_SIZE (UL(1) << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+#define PUD_SIZE (UL(1) << PUD_SHIFT)
+#define PUD_MASK (~(PUD_SIZE-1))
+
+#define PMD_SIZE (UL(1) << PMD_SHIFT)
+#define PMD_MASK (~(PMD_SIZE-1))
+
+#define _PAGE_VALID 0x8000000000000000UL
+#define _PAGE_PTE 0x4000000000000000UL
+
+#define _PAGE_EXEC 0x00001 /* execute permission */
+#define _PAGE_WRITE 0x00002 /* write access allowed */
+#define _PAGE_READ 0x00004 /* read access allowed */
+#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
+#define _PAGE_SAO 0x00010 /* Strong access order */
+#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
+#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
+#define _PAGE_DIRTY 0x00080 /* C: page changed */
+#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
+
+/*
+ * Software bits
+ */
+#define _PAGE_SW0 0x2000000000000000UL
+#define _PAGE_SW1 0x00800UL
+#define _PAGE_SW2 0x00400UL
+#define _PAGE_SW3 0x00200UL
+
+/*
+ * Highest possible physical address.
+ */
+#define PHYS_MASK_SHIFT (48)
+#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1)
+
+#endif /* _ASMPPC64_PGTABLE_HWDEF_H_ */
diff --git a/lib/ppc64/asm/pgtable.h b/lib/ppc64/asm/pgtable.h
new file mode 100644
index 000000000..a6ee0d4cd
--- /dev/null
+++ b/lib/ppc64/asm/pgtable.h
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASMARM64_PGTABLE_H_
+#define _ASMARM64_PGTABLE_H_
+/*
+ * Copyright (C) 2024, IBM Inc, Nicholas Piggin <npiggin@gmail.com>
+ *
+ * Derived from Linux kernel MMU code.
+ */
+#include <alloc.h>
+#include <alloc_page.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/pgtable-hwdef.h>
+
+#include <linux/compiler.h>
+
+/*
+ * We can convert va <=> pa page table addresses with simple casts
+ * because we always allocate their pages with alloc_page(), and
+ * alloc_page() always returns identity mapped pages.
+ */
+#define pgtable_va(x) ((void *)(unsigned long)(x))
+#define pgtable_pa(x) ((unsigned long)(x))
+
+#define pgd_none(pgd) (!pgd_val(pgd))
+#define pud_none(pud) (!pud_val(pud))
+#define pmd_none(pmd) (!pmd_val(pmd))
+#define pte_none(pte) (!pte_val(pte))
+
+#define pgd_valid(pgd) (pgd_val(pgd) & cpu_to_be64(_PAGE_VALID))
+#define pud_valid(pud) (pud_val(pud) & cpu_to_be64(_PAGE_VALID))
+#define pmd_valid(pmd) (pmd_val(pmd) & cpu_to_be64(_PAGE_VALID))
+#define pte_valid(pte) (pte_val(pte) & cpu_to_be64(_PAGE_VALID))
+
+#define pmd_huge(pmd) false
+
+static inline pud_t *pgd_page_vaddr(pgd_t pgd)
+{
+ return pgtable_va(be64_to_cpu(pgd_val(pgd)) & PHYS_MASK & ~0xfffULL);
+}
+
+static inline pmd_t *pud_page_vaddr(pud_t pud)
+{
+ return pgtable_va(be64_to_cpu(pud_val(pud)) & PHYS_MASK & ~0xfffULL);
+}
+
+static inline pte_t *pmd_page_vaddr(pmd_t pmd)
+{
+ return pgtable_va(be64_to_cpu(pmd_val(pmd)) & PHYS_MASK & ~0xfffULL);
+}
+
+#define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
+#define pgd_offset(pt, addr) ((pt) + pgd_index(addr))
+#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
+#define pud_offset(pgd, addr) (pgd_page_vaddr(*(pgd)) + pud_index(addr))
+#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+#define pmd_offset(pud, addr) (pud_page_vaddr(*(pud)) + pmd_index(addr))
+#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset(pmd, addr) (pmd_page_vaddr(*(pmd)) + pte_index(addr))
+
+#define pgd_free(pgd) free(pgd)
+static inline pgd_t *pgd_alloc_one(void)
+{
+ size_t sz = PTRS_PER_PGD * sizeof(pgd_t);
+ pgd_t *pgd = memalign_pages(sz, sz);
+ memset(pgd, 0, sz);
+ return pgd;
+}
+
+#define pud_free(pud) free(pud)
+static inline pud_t *pud_alloc_one(void)
+{
+ size_t sz = PTRS_PER_PGD * sizeof(pud_t);
+ pud_t *pud = memalign_pages(sz, sz);
+ memset(pud, 0, sz);
+ return pud;
+}
+static inline pud_t *pud_alloc(pgd_t *pgd, unsigned long addr)
+{
+ if (pgd_none(*pgd)) {
+ pgd_t entry;
+ pgd_val(entry) = cpu_to_be64(pgtable_pa(pud_alloc_one()) | _PAGE_VALID | (12 - 3) /* 4k pud page */);
+ WRITE_ONCE(*pgd, entry);
+ }
+ return pud_offset(pgd, addr);
+}
+
+#define pmd_free(pmd) free(pmd)
+static inline pmd_t *pmd_alloc_one(void)
+{
+ size_t sz = PTRS_PER_PMD * sizeof(pmd_t);
+ pmd_t *pmd = memalign_pages(sz, sz);
+ memset(pmd, 0, sz);
+ return pmd;
+}
+static inline pmd_t *pmd_alloc(pud_t *pud, unsigned long addr)
+{
+ if (pud_none(*pud)) {
+ pud_t entry;
+ pud_val(entry) = cpu_to_be64(pgtable_pa(pmd_alloc_one()) | _PAGE_VALID | (12 - 3) /* 4k pmd page */);
+ WRITE_ONCE(*pud, entry);
+ }
+ return pmd_offset(pud, addr);
+}
+
+#define pte_free(pte) free(pte)
+static inline pte_t *pte_alloc_one(void)
+{
+ size_t sz = PTRS_PER_PTE * sizeof(pte_t);
+ pte_t *pte = memalign_pages(sz, sz);
+ memset(pte, 0, sz);
+ return pte;
+}
+static inline pte_t *pte_alloc(pmd_t *pmd, unsigned long addr)
+{
+ if (pmd_none(*pmd)) {
+ pmd_t entry;
+ pmd_val(entry) = cpu_to_be64(pgtable_pa(pte_alloc_one()) | _PAGE_VALID | (21 - PAGE_SHIFT) /* 4k/256B pte page */);
+ WRITE_ONCE(*pmd, entry);
+ }
+ return pte_offset(pmd, addr);
+}
+
+#endif /* _ASMPPC64_PGTABLE_H_ */
diff --git a/lib/ppc64/mmu.c b/lib/ppc64/mmu.c
new file mode 100644
index 000000000..9e62cc800
--- /dev/null
+++ b/lib/ppc64/mmu.c
@@ -0,0 +1,258 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Radix MMU support
+ *
+ * Copyright (C) 2024, IBM Inc, Nicholas Piggin <npiggin@gmail.com>
+ *
+ * Derived from Linux kernel MMU code.
+ */
+#include <asm/mmu.h>
+#include <asm/setup.h>
+#include <asm/smp.h>
+#include <asm/page.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/hcall.h>
+
+#include "alloc_page.h"
+#include "vmalloc.h"
+#include <asm/pgtable-hwdef.h>
+#include <asm/pgtable.h>
+
+#include <linux/compiler.h>
+
+static pgd_t *identity_pgd;
+
+bool vm_available(void)
+{
+ return cpu_has_radix;
+}
+
+bool mmu_enabled(void)
+{
+ return current_cpu()->pgtable != NULL;
+}
+
+void mmu_enable(pgd_t *pgtable)
+{
+ struct cpu *cpu = current_cpu();
+
+ if (!pgtable)
+ pgtable = identity_pgd;
+
+ cpu->pgtable = pgtable;
+
+ mtmsr(mfmsr() | (MSR_IR|MSR_DR));
+}
+
+void mmu_disable(void)
+{
+ struct cpu *cpu = current_cpu();
+
+ cpu->pgtable = NULL;
+
+ mtmsr(mfmsr() & ~(MSR_IR|MSR_DR));
+}
+
+static pteval_t *get_pte(pgd_t *pgtable, uintptr_t vaddr)
+{
+ pgd_t *pgd = pgd_offset(pgtable, vaddr);
+ pud_t *pud = pud_alloc(pgd, vaddr);
+ pmd_t *pmd = pmd_alloc(pud, vaddr);
+ pte_t *pte = pte_alloc(pmd, vaddr);
+
+ return &pte_val(*pte);
+}
+
+static pteval_t *install_pte(pgd_t *pgtable, uintptr_t vaddr, pteval_t pte)
+{
+ pteval_t *p_pte = get_pte(pgtable, vaddr);
+
+ if (READ_ONCE(*p_pte) & cpu_to_be64(_PAGE_VALID)) {
+ WRITE_ONCE(*p_pte, 0);
+ flush_tlb_page(vaddr);
+ }
+
+ WRITE_ONCE(*p_pte, cpu_to_be64(pte));
+
+ return p_pte;
+}
+
+static pteval_t *install_page_prot(pgd_t *pgtable, phys_addr_t phys,
+ uintptr_t vaddr, pgprot_t prot)
+{
+ pteval_t pte = phys;
+ pte |= _PAGE_VALID | _PAGE_PTE;
+ pte |= pgprot_val(prot);
+ return install_pte(pgtable, vaddr, pte);
+}
+
+pteval_t *install_page(pgd_t *pgtable, phys_addr_t phys, void *virt)
+{
+ if (!pgtable)
+ pgtable = identity_pgd;
+
+ return install_page_prot(pgtable, phys, (uintptr_t)virt,
+ __pgprot(_PAGE_VALID | _PAGE_PTE |
+ _PAGE_READ | _PAGE_WRITE |
+ _PAGE_EXEC | _PAGE_ACCESSED |
+ _PAGE_DIRTY));
+}
+
+static pteval_t *follow_pte(pgd_t *pgtable, uintptr_t vaddr)
+{
+ pgd_t *pgd;
+ pud_t *pud;
+ pmd_t *pmd;
+ pte_t *pte;
+
+ pgd = pgd_offset(pgtable, vaddr);
+ if (!pgd_valid(*pgd))
+ return NULL;
+
+ pud = pud_offset(pgd, vaddr);
+ if (!pud_valid(*pud))
+ return NULL;
+
+ pmd = pmd_offset(pud, vaddr);
+ if (!pmd_valid(*pmd))
+ return NULL;
+ if (pmd_huge(*pmd))
+ return &pmd_val(*pmd);
+
+ pte = pte_offset(pmd, vaddr);
+ if (!pte_valid(*pte))
+ return NULL;
+
+ return &pte_val(*pte);
+}
+
+phys_addr_t virt_to_pte_phys(pgd_t *pgtable, void *virt)
+{
+ phys_addr_t mask;
+ pteval_t *pteval;
+
+ if (!pgtable)
+ pgtable = identity_pgd;
+
+ pteval = follow_pte(pgtable, (uintptr_t)virt);
+ if (!pteval) {
+ install_page(pgtable, (phys_addr_t)(unsigned long)virt, virt);
+ return (phys_addr_t)(unsigned long)virt;
+ }
+
+ if (pmd_huge(__pmd(*pteval)))
+ mask = PMD_MASK;
+ else
+ mask = PAGE_MASK;
+
+ return (be64_to_cpu(*pteval) & PHYS_MASK & mask) |
+ ((phys_addr_t)(unsigned long)virt & ~mask);
+}
+
+struct partition_table_entry {
+ uint64_t dw0;
+ uint64_t dw1;
+};
+
+static struct partition_table_entry *partition_table;
+
+struct process_table_entry {
+ uint64_t dw0;
+ uint64_t dw1;
+};
+
+static struct process_table_entry *process_table;
+
+void *setup_mmu(phys_addr_t phys_end, void *unused)
+{
+ phys_addr_t addr;
+ uint64_t dw0, dw1;
+
+ if (identity_pgd)
+ goto enable;
+
+ assert_msg(cpu_has_radix, "MMU support requires radix MMU.");
+
+ /* 32G address is reserved for vmalloc, cap phys_end at 31G */
+ if (phys_end > (31ul << 30)) {
+ /* print warning */
+ phys_end = 31ul << 30;
+ }
+
+ init_alloc_vpage((void *)(32ul << 30));
+
+ process_table = memalign_pages(SZ_4K, SZ_4K);
+ memset(process_table, 0, SZ_4K);
+
+ identity_pgd = pgd_alloc_one();
+
+ dw0 = (unsigned long)identity_pgd;
+ dw0 |= 16UL - 3; /* 64K pgd size */
+ dw0 |= (0x2UL << 61) | (0x5UL << 5); /* 52-bit virt */
+ process_table[1].dw0 = cpu_to_be64(dw0);
+
+ if (machine_is_pseries()) {
+ int ret;
+
+ ret = hcall(H_REGISTER_PROCESS_TABLE, PTBL_NEW | PTBL_RADIX | PTBL_GTSE, process_table, 0, 0 /* 4K size */);
+ assert_msg(!ret, "H_REGISTER_PROCESS_TABLE failed! err=%d\n", ret);
+ } else if (machine_is_powernv()) {
+ partition_table = memalign_pages(SZ_4K, SZ_4K);
+ memset(partition_table, 0, SZ_4K);
+
+ /* Reuse dw0 for partition table */
+ dw0 |= 1ULL << 63; /* Host radix */
+ dw1 = (unsigned long)process_table; /* 4K size */
+ partition_table[0].dw0 = cpu_to_be64(dw0);
+ partition_table[0].dw1 = cpu_to_be64(dw1);
+
+ } else {
+ /* Only pseries and powernv support radix so far */
+ assert(0);
+ }
+
+ /*
+ * Avoid mapping page 0 so NULL dereferences fault. Test images
+ * run relocated well above 0, so nothing useful here except
+ * real-mode interrupt entry code.
+ */
+ for (addr = PAGE_SIZE; addr < phys_end; addr += PAGE_SIZE)
+ install_page(identity_pgd, addr, __va(addr));
+
+enable:
+ if (machine_is_powernv()) {
+ mtspr(SPR_PTCR, (unsigned long)partition_table); /* 4KB size */
+
+ mtspr(SPR_LPIDR, 0);
+ /* Set LPCR[UPRT] and LPCR[HR] for radix */
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | (1ULL << 22) | (1ULL << 20));
+ }
+
+ /* PID=1 is used because PID=0 is also mapped in quadrant 3 */
+ mtspr(SPR_PIDR, 1);
+
+ mmu_enable(identity_pgd);
+
+ return identity_pgd;
+}
+
+phys_addr_t __virt_to_phys(unsigned long addr)
+{
+ if (mmu_enabled()) {
+ pgd_t *pgtable = current_cpu()->pgtable;
+ return virt_to_pte_phys(pgtable, (void *)addr);
+ }
+ return addr;
+}
+
+unsigned long __phys_to_virt(phys_addr_t addr)
+{
+ /*
+ * We don't guarantee that phys_to_virt(virt_to_phys(vaddr)) == vaddr, but
+ * the default page tables do identity map all physical addresses, which
+ * means phys_to_virt(virt_to_phys((void *)paddr)) == paddr.
+ */
+ assert(!mmu_enabled() || __virt_to_phys(addr) == addr);
+ return addr;
+}
diff --git a/lib/ppc64/opal-calls.S b/lib/ppc64/opal-calls.S
index 8cb4c3e91..bc9c51f84 100644
--- a/lib/ppc64/opal-calls.S
+++ b/lib/ppc64/opal-calls.S
@@ -25,8 +25,8 @@ opal_call:
mfmsr r12
std r12,-16(r1) /* use redzone */
- /* switch to BE when we enter OPAL */
- li r11,(1 << MSR_LE_BIT)
+ /* switch to BE and real-mode when we enter OPAL */
+ li r11,(1 << MSR_LE_BIT) | MSR_IR | MSR_DR
ori r11,r11,(1 << MSR_EE_BIT)
andc r12,r12,r11
mtspr SPR_HSRR1,r12
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index 6f50f6b6c..d8db19580 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -16,7 +16,8 @@ tests-common = \
$(TEST_DIR)/smp.elf \
$(TEST_DIR)/sprs.elf \
$(TEST_DIR)/timebase.elf \
- $(TEST_DIR)/interrupts.elf
+ $(TEST_DIR)/interrupts.elf \
+ $(TEST_DIR)/mmu.elf
tests-all = $(tests-common) $(tests)
all: directories $(TEST_DIR)/boot_rom.bin $(tests-all)
@@ -42,6 +43,7 @@ cflatobjs += lib/getchar.o
cflatobjs += lib/alloc_phys.o
cflatobjs += lib/alloc.o
cflatobjs += lib/alloc_page.o
+cflatobjs += lib/vmalloc.o
cflatobjs += lib/devicetree.o
cflatobjs += lib/migrate.o
cflatobjs += lib/powerpc/io.o
diff --git a/powerpc/Makefile.ppc64 b/powerpc/Makefile.ppc64
index a18a9628f..2466471f9 100644
--- a/powerpc/Makefile.ppc64
+++ b/powerpc/Makefile.ppc64
@@ -18,6 +18,7 @@ reloc.o = $(TEST_DIR)/reloc64.o
OBJDIRS += lib/ppc64
cflatobjs += lib/ppc64/stack.o
+cflatobjs += lib/ppc64/mmu.o
cflatobjs += lib/ppc64/opal.o
cflatobjs += lib/ppc64/opal-calls.o
diff --git a/powerpc/interrupts.c b/powerpc/interrupts.c
index 3e3622e59..66b4cd626 100644
--- a/powerpc/interrupts.c
+++ b/powerpc/interrupts.c
@@ -14,6 +14,9 @@
#include <asm/processor.h>
#include <asm/time.h>
#include <asm/barrier.h>
+#include <asm/mmu.h>
+#include "alloc_phys.h"
+#include "vmalloc.h"
static volatile bool got_interrupt;
static volatile struct pt_regs recorded_regs;
@@ -44,6 +47,7 @@ static void test_mce(void)
unsigned long addr = -4ULL;
uint8_t tmp;
bool is_fetch;
+ bool mmu = mmu_enabled();
report_prefix_push("mce");
@@ -53,6 +57,9 @@ static void test_mce(void)
handle_exception(0x400, fault_handler, NULL);
handle_exception(0x480, fault_handler, NULL);
+ if (mmu)
+ mmu_disable();
+
if (machine_is_powernv()) {
enable_mcheck();
} else {
@@ -92,6 +99,9 @@ static void test_mce(void)
got_interrupt = false;
}
+ if (mmu)
+ mmu_enable(NULL);
+
handle_exception(0x200, NULL, NULL);
handle_exception(0x300, NULL, NULL);
handle_exception(0x380, NULL, NULL);
@@ -101,29 +111,36 @@ static void test_mce(void)
report_prefix_pop();
}
-static void dseg_handler(struct pt_regs *regs, void *data)
+static void dside_handler(struct pt_regs *regs, void *data)
{
got_interrupt = true;
memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
regs_advance_insn(regs);
- regs->msr &= ~MSR_DR;
}
-static void test_dseg(void)
+static void iside_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
+ regs->nip = regs->link;
+}
+
+static void test_dseg_nommu(void)
{
uint64_t msr, tmp;
- report_prefix_push("data segment");
+ report_prefix_push("dseg");
/* Some HV start in radix mode and need 0x300 */
- handle_exception(0x300, &dseg_handler, NULL);
- handle_exception(0x380, &dseg_handler, NULL);
+ handle_exception(0x300, &dside_handler, NULL);
+ handle_exception(0x380, &dside_handler, NULL);
asm volatile(
" mfmsr %0 \n \
- ori %0,%0,%2 \n \
- mtmsrd %0 \n \
- lbz %1,0(0) "
+ ori %1,%0,%2 \n \
+ mtmsrd %1 \n \
+ lbz %1,0(0) \n \
+ mtmsrd %0 "
: "=r"(msr), "=r"(tmp) : "i"(MSR_DR): "memory");
report(got_interrupt, "interrupt on NULL dereference");
@@ -135,6 +152,61 @@ static void test_dseg(void)
report_prefix_pop();
}
+static void test_mmu(void)
+{
+ uint64_t tmp, addr;
+ phys_addr_t base, top;
+
+ if (!mmu_enabled()) {
+ test_dseg_nommu();
+ return;
+ }
+
+ phys_alloc_get_unused(&base, &top);
+
+ report_prefix_push("dsi");
+ addr = top + PAGE_SIZE;
+ handle_exception(0x300, &dside_handler, NULL);
+ asm volatile("lbz %0,0(%1)" : "=r"(tmp) : "r"(addr));
+ report(got_interrupt, "dsi on out of range dereference");
+ report(mfspr(SPR_DAR) == addr, "DAR set correctly");
+ report(mfspr(SPR_DSISR) & (1ULL << 30), "DSISR set correctly");
+ got_interrupt = false;
+ handle_exception(0x300, NULL, NULL);
+ report_prefix_pop();
+
+ report_prefix_push("dseg");
+ addr = -4ULL;
+ handle_exception(0x380, &dside_handler, NULL);
+ asm volatile("lbz %0,0(%1)" : "=r"(tmp) : "r"(addr));
+ report(got_interrupt, "dseg on out of range dereference");
+ report(mfspr(SPR_DAR) == addr, "DAR set correctly");
+ got_interrupt = false;
+ handle_exception(0x380, NULL, NULL);
+ report_prefix_pop();
+
+ report_prefix_push("isi");
+ addr = top + PAGE_SIZE;
+ handle_exception(0x400, &iside_handler, NULL);
+ asm volatile("mtctr %0 ; bctrl" :: "r"(addr) : "ctr", "lr");
+ report(got_interrupt, "isi on out of range fetch");
+ report(recorded_regs.nip == addr, "SRR0 set correctly");
+ report(recorded_regs.msr & (1ULL << 30), "SRR1 set correctly");
+ got_interrupt = false;
+ handle_exception(0x400, NULL, NULL);
+ report_prefix_pop();
+
+ report_prefix_push("iseg");
+ addr = -4ULL;
+ handle_exception(0x480, &iside_handler, NULL);
+ asm volatile("mtctr %0 ; bctrl" :: "r"(addr) : "ctr", "lr");
+ report(got_interrupt, "isi on out of range fetch");
+ report(recorded_regs.nip == addr, "SRR0 set correctly");
+ got_interrupt = false;
+ handle_exception(0x480, NULL, NULL);
+ report_prefix_pop();
+}
+
static void dec_handler(struct pt_regs *regs, void *data)
{
got_interrupt = true;
@@ -402,9 +474,12 @@ int main(int argc, char **argv)
{
report_prefix_push("interrupts");
+ if (vm_available())
+ setup_vm();
+
if (cpu_has_power_mce)
test_mce();
- test_dseg();
+ test_mmu();
test_illegal();
test_dec();
test_sc();
diff --git a/powerpc/mmu.c b/powerpc/mmu.c
new file mode 100644
index 000000000..4c6b6a17c
--- /dev/null
+++ b/powerpc/mmu.c
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MMU Tests
+ *
+ * Copyright 2024 Nicholas Piggin, IBM Corp.
+ */
+#include <libcflat.h>
+#include <asm/atomic.h>
+#include <asm/barrier.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/smp.h>
+#include <asm/setup.h>
+#include <asm/ppc_asm.h>
+#include <vmalloc.h>
+#include <devicetree.h>
+
+static volatile bool tlbie_test_running = true;
+static volatile bool tlbie_test_failed = false;
+static int tlbie_fn_started;
+
+static void *memory;
+
+static void trap_handler(struct pt_regs *regs, void *opaque)
+{
+ tlbie_test_failed = true;
+ regs_advance_insn(regs);
+}
+
+static void tlbie_fn(int cpu_id)
+{
+ volatile char *m = memory;
+
+ setup_mmu(0, NULL);
+
+ atomic_fetch_inc(&tlbie_fn_started);
+ while (tlbie_test_running) {
+ unsigned long tmp;
+
+ /*
+ * This is intended to execuse a QEMU TCG bug by forming a
+ * large TB which can prevent async work from running while the
+ * TB executes, so it could miss a broadcast TLB invalidation
+ * and pick up a stale translation.
+ */
+ asm volatile (".rept 256 ; lbz %0,0(%1) ; tdnei %0,0 ; .endr" : "=&r"(tmp) : "r"(m));
+ }
+}
+
+#define ITERS 100000
+
+static void test_tlbie(int argc, char **argv)
+{
+ void *m[2];
+ phys_addr_t p[2];
+ pteval_t pteval[2];
+ pteval_t *ptep;
+ int i;
+
+ if (argc > 2)
+ report_abort("Unsupported argument: '%s'", argv[2]);
+
+ if (nr_cpus_present < 2) {
+ report_skip("Requires SMP (2 or more CPUs)");
+ return;
+ }
+
+ handle_exception(0x700, &trap_handler, NULL);
+
+ m[0] = alloc_page();
+ p[0] = virt_to_phys(m[0]);
+ memset(m[0], 0, PAGE_SIZE);
+ m[1] = alloc_page();
+ p[1] = virt_to_phys(m[1]);
+ memset(m[1], 0, PAGE_SIZE);
+
+ memory = alloc_vpages(1);
+ ptep = install_page(NULL, p[0], memory);
+ pteval[0] = *ptep;
+ assert(ptep == install_page(NULL, p[1], memory));
+ pteval[1] = *ptep;
+ assert(ptep == install_page(NULL, p[0], memory));
+ assert(pteval[0] == *ptep);
+ flush_tlb_page((unsigned long)memory);
+
+ if (!start_all_cpus(tlbie_fn))
+ report_abort("Failed to start secondary cpus");
+
+ while (tlbie_fn_started < nr_cpus_present - 1) {
+ cpu_relax();
+ }
+
+ for (i = 0; i < ITERS; i++) {
+ *ptep = pteval[1];
+ flush_tlb_page((unsigned long)memory);
+ *(long *)m[0] = -1;
+ barrier();
+ *(long *)m[0] = 0;
+ barrier();
+ *ptep = pteval[0];
+ flush_tlb_page((unsigned long)memory);
+ *(long *)m[1] = -1;
+ barrier();
+ *(long *)m[1] = 0;
+ barrier();
+ if (tlbie_test_failed)
+ break;
+ }
+
+ tlbie_test_running = false;
+
+ stop_all_cpus();
+
+ handle_exception(0x700, NULL, NULL);
+
+ /* TCG has a known race invalidating other CPUs */
+ report_kfail(host_is_tcg, !tlbie_test_failed, "tlbie");
+}
+
+#define THIS_ITERS 100000
+
+static void test_tlbie_this_cpu(int argc, char **argv)
+{
+ void *m[2];
+ phys_addr_t p[2];
+ pteval_t pteval[2];
+ pteval_t *ptep;
+ int i;
+ bool success;
+
+ if (argc > 2)
+ report_abort("Unsupported argument: '%s'", argv[2]);
+
+ m[0] = alloc_page();
+ p[0] = virt_to_phys(m[0]);
+ memset(m[0], 0, PAGE_SIZE);
+ m[1] = alloc_page();
+ p[1] = virt_to_phys(m[1]);
+ memset(m[1], 0, PAGE_SIZE);
+
+ memory = alloc_vpages(1);
+ ptep = install_page(NULL, p[0], memory);
+ pteval[0] = *ptep;
+ assert(ptep == install_page(NULL, p[1], memory));
+ pteval[1] = *ptep;
+ assert(ptep == install_page(NULL, p[0], memory));
+ assert(pteval[0] == *ptep);
+ flush_tlb_page((unsigned long)memory);
+
+ *(long *)m[0] = 0;
+ *(long *)m[1] = -1;
+
+ success = true;
+ for (i = 0; i < THIS_ITERS; i++) {
+ if (*(long *)memory != 0) {
+ success = false;
+ break;
+ }
+ *ptep = pteval[1];
+ flush_tlb_page_local((unsigned long)memory);
+ if (*(long *)memory != -1) {
+ success = false;
+ break;
+ }
+ *ptep = pteval[0];
+ flush_tlb_page_local((unsigned long)memory);
+ }
+ report(success, "tlbiel");
+
+ success = true;
+ flush_tlb_page((unsigned long)memory);
+ for (i = 0; i < THIS_ITERS; i++) {
+ if (*(long *)memory != 0) {
+ success = false;
+ break;
+ }
+ *ptep = pteval[1];
+ flush_tlb_page((unsigned long)memory);
+ if (*(long *)memory != -1) {
+ success = false;
+ break;
+ }
+ *ptep = pteval[0];
+ flush_tlb_page((unsigned long)memory);
+ }
+ report(success, "tlbie");
+}
+
+
+struct {
+ const char *name;
+ void (*func)(int argc, char **argv);
+} hctests[] = {
+ { "tlbi-this-cpu", test_tlbie_this_cpu },
+ { "tlbi-other-cpu", test_tlbie },
+ { NULL, NULL }
+};
+
+int main(int argc, char **argv)
+{
+ bool all;
+ int i;
+
+ if (!vm_available()) {
+ report_skip("MMU is only supported for radix");
+ return 0;
+ }
+
+ setup_vm();
+
+ all = argc == 1 || !strcmp(argv[1], "all");
+
+ report_prefix_push("mmu");
+
+ for (i = 0; hctests[i].name != NULL; i++) {
+ if (all || strcmp(argv[1], hctests[i].name) == 0) {
+ report_prefix_push(hctests[i].name);
+ hctests[i].func(argc, argv);
+ report_prefix_pop();
+ }
+ }
+
+ report_prefix_pop();
+ return report_summary();
+}
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 9af933b14..9af88d2ae 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -69,6 +69,10 @@ file = emulator.elf
[interrupts]
file = interrupts.elf
+[mmu]
+file = mmu.elf
+smp = 2
+
[smp]
file = smp.elf
smp = 2
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 05/15] common/sieve: Support machines without MMU
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (3 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 04/15] powerpc: Add MMU support Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 06/15] powerpc: Add sieve.c common test Nicholas Piggin
` (9 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Not all powerpc CPUs provide MMU support. Define vm_available() that is
true by default but archs can override it. Use this to run VM tests.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
common/sieve.c | 14 ++++++++------
lib/ppc64/asm/mmu.h | 1 -
lib/ppc64/mmu.c | 2 +-
lib/vmalloc.c | 7 +++++++
lib/vmalloc.h | 2 ++
5 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/common/sieve.c b/common/sieve.c
index 8fe05ef13..db084691a 100644
--- a/common/sieve.c
+++ b/common/sieve.c
@@ -40,12 +40,14 @@ int main(void)
printf("starting sieve\n");
test_sieve("static", static_data, STATIC_SIZE);
- setup_vm();
- test_sieve("mapped", static_data, STATIC_SIZE);
- for (i = 0; i < 3; ++i) {
- v = malloc(VSIZE);
- test_sieve("virtual", v, VSIZE);
- free(v);
+ if (vm_available()) {
+ setup_vm();
+ test_sieve("mapped", static_data, STATIC_SIZE);
+ for (i = 0; i < 3; ++i) {
+ v = malloc(VSIZE);
+ test_sieve("virtual", v, VSIZE);
+ free(v);
+ }
}
return 0;
diff --git a/lib/ppc64/asm/mmu.h b/lib/ppc64/asm/mmu.h
index 32f1abab6..2bf94e498 100644
--- a/lib/ppc64/asm/mmu.h
+++ b/lib/ppc64/asm/mmu.h
@@ -4,7 +4,6 @@
#include <asm/pgtable.h>
-bool vm_available(void);
bool mmu_enabled(void);
void mmu_enable(pgd_t *pgtable);
void mmu_disable(void);
diff --git a/lib/ppc64/mmu.c b/lib/ppc64/mmu.c
index 9e62cc800..6f9f4130f 100644
--- a/lib/ppc64/mmu.c
+++ b/lib/ppc64/mmu.c
@@ -23,7 +23,7 @@
static pgd_t *identity_pgd;
-bool vm_available(void)
+bool vm_available(void) /* weak override */
{
return cpu_has_radix;
}
diff --git a/lib/vmalloc.c b/lib/vmalloc.c
index 572682576..cf2ef7a70 100644
--- a/lib/vmalloc.c
+++ b/lib/vmalloc.c
@@ -206,10 +206,17 @@ void init_alloc_vpage(void *top)
spin_unlock(&lock);
}
+bool __attribute__((__weak__)) vm_available(void)
+{
+ return true;
+}
+
void __setup_vm(void *opaque)
{
phys_addr_t base, top;
+ assert_msg(vm_available(), "Virtual memory not available. Must check vm_available() before calling setup_vm()");
+
if (alloc_ops == &vmalloc_ops)
return;
diff --git a/lib/vmalloc.h b/lib/vmalloc.h
index 0269fdde9..e81be39f4 100644
--- a/lib/vmalloc.h
+++ b/lib/vmalloc.h
@@ -17,6 +17,8 @@ extern void setup_vm(void);
/* As above, plus passes an opaque value to setup_mmu(). */
extern void __setup_vm(void *opaque);
+/* common/ tests must check availability before calling setup_vm() */
+extern bool vm_available(void);
/* Set up paging */
extern void *setup_mmu(phys_addr_t top, void *opaque);
/* Walk the page table and resolve the virtual address to a physical address */
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 06/15] powerpc: Add sieve.c common test
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (4 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 05/15] common/sieve: Support machines without MMU Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 07/15] powerpc: add usermode support Nicholas Piggin
` (8 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Now that sieve copes with lack of MMU support, it can be run by
powerpc.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
powerpc/Makefile.common | 1 +
powerpc/sieve.c | 1 +
powerpc/unittests.cfg | 3 +++
3 files changed, 5 insertions(+)
create mode 120000 powerpc/sieve.c
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index d8db19580..900b1f00b 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -8,6 +8,7 @@ tests-common = \
$(TEST_DIR)/selftest.elf \
$(TEST_DIR)/selftest-migration.elf \
$(TEST_DIR)/memory-verify.elf \
+ $(TEST_DIR)/sieve.elf \
$(TEST_DIR)/spapr_hcall.elf \
$(TEST_DIR)/rtas.elf \
$(TEST_DIR)/emulator.elf \
diff --git a/powerpc/sieve.c b/powerpc/sieve.c
new file mode 120000
index 000000000..fe299f309
--- /dev/null
+++ b/powerpc/sieve.c
@@ -0,0 +1 @@
+../common/sieve.c
\ No newline at end of file
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 9af88d2ae..149f963f3 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -121,3 +121,6 @@ file = sprs.elf
machine = pseries
extra_params = -append '-w'
groups = migration
+
+[sieve]
+file = sieve.elf
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 07/15] powerpc: add usermode support
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (5 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 06/15] powerpc: Add sieve.c common test Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests Nicholas Piggin
` (7 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
The biggest difficulty for user mode is MMU support. Otherwise it is
a simple matter of setting and clearing MSR[PR] with rfid and sc
respectively.
Some common harness operations will fail in usermode, so some workarounds
are reqiured (e.g., puts() can't be used directly).
A usermode privileged instruction interrupt test is added.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/processor.h | 9 +++++++++
lib/powerpc/asm/reg.h | 1 +
lib/powerpc/asm/smp.h | 1 +
lib/powerpc/io.c | 7 +++++++
lib/powerpc/processor.c | 38 +++++++++++++++++++++++++++++++++++++
lib/powerpc/rtas.c | 3 +++
lib/powerpc/setup.c | 7 +++++--
lib/ppc64/mmu.c | 2 ++
powerpc/interrupts.c | 28 +++++++++++++++++++++++++++
9 files changed, 94 insertions(+), 2 deletions(-)
diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index b4f195856..9609c9c67 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -22,6 +22,8 @@ extern bool cpu_has_prefix;
extern bool cpu_has_sc_lev;
extern bool cpu_has_pause_short;
+bool in_usermode(void);
+
static inline uint64_t mfspr(int nr)
{
uint64_t ret;
@@ -54,6 +56,8 @@ static inline void local_irq_enable(void)
{
unsigned long msr;
+ assert(!in_usermode());
+
asm volatile(
" mfmsr %0 \n \
ori %0,%0,%1 \n \
@@ -65,6 +69,8 @@ static inline void local_irq_disable(void)
{
unsigned long msr;
+ assert(!in_usermode());
+
asm volatile(
" mfmsr %0 \n \
andc %0,%0,%1 \n \
@@ -93,4 +99,7 @@ static inline bool machine_is_pseries(void)
void enable_mcheck(void);
void disable_mcheck(void);
+void enter_usermode(void);
+void exit_usermode(void);
+
#endif /* _ASMPOWERPC_PROCESSOR_H_ */
diff --git a/lib/powerpc/asm/reg.h b/lib/powerpc/asm/reg.h
index b2fab4313..69ef21adb 100644
--- a/lib/powerpc/asm/reg.h
+++ b/lib/powerpc/asm/reg.h
@@ -58,5 +58,6 @@
#define MSR_SE UL(0x0400) /* Single Step Enable */
#define MSR_EE UL(0x8000)
#define MSR_ME UL(0x1000)
+#define MSR_PR UL(0x4000)
#endif
diff --git a/lib/powerpc/asm/smp.h b/lib/powerpc/asm/smp.h
index bc2a68935..9ec416e25 100644
--- a/lib/powerpc/asm/smp.h
+++ b/lib/powerpc/asm/smp.h
@@ -11,6 +11,7 @@ struct cpu {
unsigned long server_no;
unsigned long stack;
unsigned long exception_stack;
+ bool in_user;
secondary_entry_fn entry;
pgd_t *pgtable;
};
diff --git a/lib/powerpc/io.c b/lib/powerpc/io.c
index cb7f2f050..5c2810884 100644
--- a/lib/powerpc/io.c
+++ b/lib/powerpc/io.c
@@ -11,6 +11,7 @@
#include <asm/setup.h>
#include <asm/processor.h>
#include <asm/atomic.h>
+#include <asm/smp.h>
#include "io.h"
static struct spinlock print_lock;
@@ -41,10 +42,16 @@ void io_init(void)
void puts(const char *s)
{
+ bool user = in_usermode();
+
+ if (user)
+ exit_usermode();
spin_lock(&print_lock);
while (*s)
putchar(*s++);
spin_unlock(&print_lock);
+ if (user)
+ enter_usermode();
}
/*
diff --git a/lib/powerpc/processor.c b/lib/powerpc/processor.c
index 09f6bb9d8..6c3000d5c 100644
--- a/lib/powerpc/processor.c
+++ b/lib/powerpc/processor.c
@@ -47,6 +47,8 @@ void do_handle_exception(struct pt_regs *regs)
unsigned char v;
__current_cpu = (struct cpu *)mfspr(SPR_SPRG0);
+ if (in_usermode())
+ current_cpu()->in_user = false;
/*
* We run with AIL=0, so interrupts taken with MMU disabled.
@@ -60,6 +62,8 @@ void do_handle_exception(struct pt_regs *regs)
if (v < 128 && handlers[v].func) {
handlers[v].func(regs, handlers[v].data);
+ if (regs->msr & MSR_PR)
+ current_cpu()->in_user = true;
return;
}
@@ -169,3 +173,37 @@ void disable_mcheck(void)
{
rfid_msr(mfmsr() & ~MSR_ME);
}
+
+bool in_usermode(void)
+{
+ return current_cpu()->in_user;
+}
+
+static void usermode_sc_handler(struct pt_regs *regs, void *data)
+{
+ regs->msr &= ~(MSR_PR|MSR_EE);
+ /* Interrupt return handler will keep in_user clear */
+}
+
+void enter_usermode(void)
+{
+ assert_msg(!in_usermode(), "enter_usermode called with in_usermode");
+ /* mfmsr would fault in usermode anyway */
+ assert_msg(!(mfmsr() & MSR_PR), "enter_usermode called from user mode");
+ assert_msg(!(mfmsr() & MSR_EE), "enter_usermode called with interrupts enabled");
+ assert_msg((mfmsr() & (MSR_IR|MSR_DR)) == (MSR_IR|MSR_DR),
+ "enter_usermode called with virtual memory disabled");
+
+ handle_exception(0xc00, usermode_sc_handler, NULL);
+ rfid_msr(mfmsr() | (MSR_PR|MSR_IR|MSR_DR|MSR_EE));
+ current_cpu()->in_user = true;
+}
+
+void exit_usermode(void)
+{
+ assert_msg(in_usermode(), "enter_usermode called with !in_usermode");
+ asm volatile("sc 0" ::: "memory");
+ handle_exception(0xc00, NULL, NULL);
+ assert(!in_usermode());
+ assert(!(mfmsr() & MSR_PR));
+}
diff --git a/lib/powerpc/rtas.c b/lib/powerpc/rtas.c
index b477a38e0..9c1e0affc 100644
--- a/lib/powerpc/rtas.c
+++ b/lib/powerpc/rtas.c
@@ -9,6 +9,7 @@
#include <libfdt/libfdt.h>
#include <devicetree.h>
#include <asm/spinlock.h>
+#include <asm/smp.h>
#include <asm/hcall.h>
#include <asm/io.h>
#include <asm/rtas.h>
@@ -137,6 +138,8 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
va_list list;
int ret;
+ assert_msg(!in_usermode(), "May not make RTAS call from user mode\n");
+
spin_lock(&rtas_lock);
va_start(list, outputs);
diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c
index b7450e5e5..c1f0f9adf 100644
--- a/lib/powerpc/setup.c
+++ b/lib/powerpc/setup.c
@@ -209,10 +209,12 @@ void cpu_init(struct cpu *cpu, int cpu_id)
cpu->exception_stack = (unsigned long)memalign_pages(SZ_4K, SZ_64K);
cpu->exception_stack += SZ_64K - 64;
cpu->pgtable = NULL;
+ cpu->in_user = false;
}
bool host_is_tcg;
bool host_is_kvm;
+bool is_hvmode;
void setup(const void *fdt)
{
@@ -222,8 +224,6 @@ void setup(const void *fdt)
u32 fdt_size;
int ret;
- cpu_has_hv = !!(mfmsr() & (1ULL << MSR_HV_BIT));
-
memset(cpus, 0xff, sizeof(cpus));
cpu = &cpus[0];
@@ -231,10 +231,13 @@ void setup(const void *fdt)
cpu->exception_stack = (unsigned long)boot_exception_stack;
cpu->exception_stack += EXCEPTION_STACK_SIZE - 64;
cpu->pgtable = NULL;
+ cpu->in_user = false;
mtspr(SPR_SPRG0, (unsigned long)cpu);
__current_cpu = cpu;
+ cpu_has_hv = !!(mfmsr() & (1ULL << MSR_HV_BIT));
+
enable_mcheck();
/*
diff --git a/lib/ppc64/mmu.c b/lib/ppc64/mmu.c
index 6f9f4130f..f2aebf584 100644
--- a/lib/ppc64/mmu.c
+++ b/lib/ppc64/mmu.c
@@ -42,6 +42,7 @@ void mmu_enable(pgd_t *pgtable)
cpu->pgtable = pgtable;
+ assert(!in_usermode());
mtmsr(mfmsr() | (MSR_IR|MSR_DR));
}
@@ -51,6 +52,7 @@ void mmu_disable(void)
cpu->pgtable = NULL;
+ assert(!in_usermode());
mtmsr(mfmsr() & ~(MSR_IR|MSR_DR));
}
diff --git a/powerpc/interrupts.c b/powerpc/interrupts.c
index 66b4cd626..4c136a842 100644
--- a/powerpc/interrupts.c
+++ b/powerpc/interrupts.c
@@ -329,6 +329,33 @@ static void test_illegal(void)
report_prefix_pop();
}
+static void dec_ignore_handler(struct pt_regs *regs, void *data)
+{
+ mtspr(SPR_DEC, 0x7fffffff);
+}
+
+static void test_privileged(void)
+{
+ unsigned long msr;
+
+ if (!mmu_enabled())
+ return;
+
+ report_prefix_push("privileged instruction");
+
+ handle_exception(0x700, &program_handler, NULL);
+ handle_exception(0x900, &dec_ignore_handler, NULL);
+ enter_usermode();
+ asm volatile("mfmsr %0" : "=r"(msr) :: "memory");
+ exit_usermode();
+ report(got_interrupt, "interrupt on privileged instruction");
+ got_interrupt = false;
+ handle_exception(0x900, NULL, NULL);
+ handle_exception(0x700, NULL, NULL);
+
+ report_prefix_pop();
+}
+
static void sc_handler(struct pt_regs *regs, void *data)
{
got_interrupt = true;
@@ -481,6 +508,7 @@ int main(int argc, char **argv)
test_mce();
test_mmu();
test_illegal();
+ test_privileged();
test_dec();
test_sc();
test_trace();
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (6 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 07/15] powerpc: add usermode support Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-18 15:20 ` Thomas Huth
2024-06-18 18:39 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 09/15] configure: Make arch_libdir a first-class entity Nicholas Piggin
` (6 subsequent siblings)
14 siblings, 2 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
Add some initial PMU testing.
- PMC5/6 tests
- PMAE / PMI test
- BHRB basic tests
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/processor.h | 2 +
lib/powerpc/asm/reg.h | 9 +
lib/powerpc/asm/setup.h | 1 +
lib/powerpc/setup.c | 20 ++
powerpc/Makefile.common | 3 +-
powerpc/pmu.c | 562 ++++++++++++++++++++++++++++++++++++
powerpc/unittests.cfg | 3 +
7 files changed, 599 insertions(+), 1 deletion(-)
create mode 100644 powerpc/pmu.c
diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index 9609c9c67..09535f8c3 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -17,6 +17,8 @@ extern bool cpu_has_hv;
extern bool cpu_has_power_mce;
extern bool cpu_has_siar;
extern bool cpu_has_heai;
+extern bool cpu_has_bhrb;
+extern bool cpu_has_p10_bhrb;
extern bool cpu_has_radix;
extern bool cpu_has_prefix;
extern bool cpu_has_sc_lev;
diff --git a/lib/powerpc/asm/reg.h b/lib/powerpc/asm/reg.h
index 69ef21adb..602fba1b6 100644
--- a/lib/powerpc/asm/reg.h
+++ b/lib/powerpc/asm/reg.h
@@ -40,10 +40,19 @@
#define SPR_LPIDR 0x13f
#define SPR_HEIR 0x153
#define SPR_PTCR 0x1d0
+#define SPR_MMCRA 0x312
+#define MMCRA_BHRBRD UL(0x0000002000000000)
+#define MMCRA_IFM_MASK UL(0x00000000c0000000)
+#define SPR_PMC5 0x317
+#define SPR_PMC6 0x318
#define SPR_MMCR0 0x31b
#define MMCR0_FC UL(0x80000000)
+#define MMCR0_FCP UL(0x20000000)
#define MMCR0_PMAE UL(0x04000000)
+#define MMCR0_BHRBA UL(0x00200000)
+#define MMCR0_FCPC UL(0x00001000)
#define MMCR0_PMAO UL(0x00000080)
+#define MMCR0_FC56 UL(0x00000010)
#define SPR_SIAR 0x31c
/* Machine State Register definitions: */
diff --git a/lib/powerpc/asm/setup.h b/lib/powerpc/asm/setup.h
index 9ca318ce6..8f0b58ed0 100644
--- a/lib/powerpc/asm/setup.h
+++ b/lib/powerpc/asm/setup.h
@@ -10,6 +10,7 @@
#define NR_CPUS 8 /* arbitrarily set for now */
extern uint64_t tb_hz;
+extern uint64_t cpu_hz;
#define NR_MEM_REGIONS 8
#define MR_F_PRIMARY (1U << 0)
diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c
index c1f0f9adf..ef4ebdbce 100644
--- a/lib/powerpc/setup.c
+++ b/lib/powerpc/setup.c
@@ -33,6 +33,7 @@ u32 initrd_size;
u32 cpu_to_hwid[NR_CPUS] = { [0 ... NR_CPUS-1] = (~0U) };
int nr_cpus_present;
uint64_t tb_hz;
+uint64_t cpu_hz;
struct mem_region mem_regions[NR_MEM_REGIONS];
phys_addr_t __physical_start, __physical_end;
@@ -42,6 +43,7 @@ struct cpu_set_params {
unsigned icache_bytes;
unsigned dcache_bytes;
uint64_t tb_hz;
+ uint64_t cpu_hz;
};
static void cpu_set(int fdtnode, u64 regval, void *info)
@@ -95,6 +97,19 @@ static void cpu_set(int fdtnode, u64 regval, void *info)
data = (u32 *)prop->data;
params->tb_hz = fdt32_to_cpu(*data);
+ prop = fdt_get_property(dt_fdt(), fdtnode,
+ "ibm,extended-clock-frequency", NULL);
+ if (prop) {
+ u64 *data64 = (u64 *)prop->data;
+ params->cpu_hz = fdt64_to_cpu(*data64);
+ } else {
+ prop = fdt_get_property(dt_fdt(), fdtnode,
+ "clock-frequency", NULL);
+ assert(prop != NULL);
+ data = (u32 *)prop->data;
+ params->cpu_hz = fdt32_to_cpu(*data);
+ }
+
read_common_info = true;
}
}
@@ -103,6 +118,8 @@ bool cpu_has_hv;
bool cpu_has_power_mce; /* POWER CPU machine checks */
bool cpu_has_siar;
bool cpu_has_heai;
+bool cpu_has_bhrb;
+bool cpu_has_p10_bhrb;
bool cpu_has_radix;
bool cpu_has_prefix;
bool cpu_has_sc_lev; /* sc interrupt has LEV field in SRR1 */
@@ -119,12 +136,14 @@ static void cpu_init_params(void)
__icache_bytes = params.icache_bytes;
__dcache_bytes = params.dcache_bytes;
tb_hz = params.tb_hz;
+ cpu_hz = params.cpu_hz;
switch (mfspr(SPR_PVR) & PVR_VERSION_MASK) {
case PVR_VER_POWER10:
cpu_has_prefix = true;
cpu_has_sc_lev = true;
cpu_has_pause_short = true;
+ cpu_has_p10_bhrb = true;
case PVR_VER_POWER9:
cpu_has_radix = true;
case PVR_VER_POWER8E:
@@ -133,6 +152,7 @@ static void cpu_init_params(void)
cpu_has_power_mce = true;
cpu_has_heai = true;
cpu_has_siar = true;
+ cpu_has_bhrb = true;
break;
default:
break;
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index 900b1f00b..0d271cdb6 100644
--- a/powerpc/Makefile.common
+++ b/powerpc/Makefile.common
@@ -18,7 +18,8 @@ tests-common = \
$(TEST_DIR)/sprs.elf \
$(TEST_DIR)/timebase.elf \
$(TEST_DIR)/interrupts.elf \
- $(TEST_DIR)/mmu.elf
+ $(TEST_DIR)/mmu.elf \
+ $(TEST_DIR)/pmu.elf
tests-all = $(tests-common) $(tests)
all: directories $(TEST_DIR)/boot_rom.bin $(tests-all)
diff --git a/powerpc/pmu.c b/powerpc/pmu.c
new file mode 100644
index 000000000..bdc45e167
--- /dev/null
+++ b/powerpc/pmu.c
@@ -0,0 +1,562 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Test PMU
+ *
+ * Copyright 2024 Nicholas Piggin, IBM Corp.
+ */
+#include <libcflat.h>
+#include <util.h>
+#include <migrate.h>
+#include <alloc.h>
+#include <asm/setup.h>
+#include <asm/handlers.h>
+#include <asm/hcall.h>
+#include <asm/processor.h>
+#include <asm/time.h>
+#include <asm/barrier.h>
+#include <asm/mmu.h>
+#include <asm/smp.h>
+#include "alloc_phys.h"
+#include "vmalloc.h"
+
+static volatile bool got_interrupt;
+static volatile struct pt_regs recorded_regs;
+static volatile unsigned long recorded_mmcr0;
+
+static void illegal_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ regs_advance_insn(regs);
+}
+
+static void fault_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ regs_advance_insn(regs);
+}
+
+static void sc_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+}
+
+static void reset_mmcr0(void)
+{
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_PMAE | MMCR0_PMAO));
+}
+
+static __attribute__((__noinline__)) unsigned long pmc5_count_nr_insns(unsigned long nr)
+{
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile("mtctr %0 ; 1: bdnz 1b" :: "r"(nr) : "ctr");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+
+ return mfspr(SPR_PMC5);
+}
+
+static void test_pmc5(void)
+{
+ unsigned long pmc5;
+ unsigned long mmcr;
+
+ reset_mmcr0();
+ mmcr = mfspr(SPR_MMCR0);
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mmcr & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 20 ; nop ; .endr" ::: "memory");
+ mtspr(SPR_MMCR0, mmcr);
+ pmc5 = mfspr(SPR_PMC5);
+
+ report_kfail(true, pmc5 == 21, "PMC5 counts instructions exactly %ld", pmc5);
+}
+
+static void test_pmc5_with_branch(void)
+{
+ unsigned long pmc5;
+ unsigned long mmcr;
+
+ reset_mmcr0();
+ mmcr = mfspr(SPR_MMCR0);
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mmcr & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 20 ; b $+4 ; .endr" ::: "memory");
+ mtspr(SPR_MMCR0, mmcr);
+ pmc5 = mfspr(SPR_PMC5);
+
+ /* TCG and POWER9 do not count instructions around faults correctly */
+ report_kfail(true, pmc5 == 21, "PMC5 counts instructions with branch %ld", pmc5);
+}
+
+static void test_pmc5_with_cond_branch(void)
+{
+ unsigned long pmc5;
+ unsigned long mmcr;
+
+ reset_mmcr0();
+ mmcr = mfspr(SPR_MMCR0);
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mmcr & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 10 ; nop ; .endr ; cmpdi %0,1 ; beq 1f ; .rep 10 ; nop ; .endr ; 1:" : : "r"(0) : "memory", "cr0");
+ mtspr(SPR_MMCR0, mmcr);
+ pmc5 = mfspr(SPR_PMC5);
+
+ /* TCG and POWER9 do not count instructions around faults correctly */
+ report_kfail(true, pmc5 == 24,
+ "PMC5 counts instructions wth conditional branch %ld", pmc5);
+}
+
+static void test_pmc5_with_ill(void)
+{
+ unsigned long pmc5_1, pmc5_2;
+
+ handle_exception(0x700, &illegal_handler, NULL);
+ handle_exception(0xe40, &illegal_handler, NULL);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".long 0x0" ::: "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_1 = mfspr(SPR_PMC5);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 10 ; nop ; .endr ; .long 0x0 ; .rep 10 ; nop ; .endr " ::: "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_2 = mfspr(SPR_PMC5);
+
+ /* TCG and POWER9 do not count instructions around faults correctly */
+ report_kfail(true, pmc5_1 + 20 == pmc5_2,
+ "PMC5 counts instructions with illegal instruction");
+
+ handle_exception(0x700, NULL, NULL);
+ handle_exception(0xe40, NULL, NULL);
+}
+
+static void test_pmc5_with_fault(void)
+{
+ unsigned long pmc5_1, pmc5_2;
+ unsigned long tmp;
+
+ setup_vm();
+
+ handle_exception(0x300, &fault_handler, NULL);
+ handle_exception(0x380, &fault_handler, NULL);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile("ld %0,0(%1)" : "=r"(tmp) : "r"(NULL) : "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_1 = mfspr(SPR_PMC5);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 10 ; nop ; .endr ; ld %0,0(%1) ; .rep 10 ; nop ; .endr " : "=r"(tmp) : "r"(NULL) : "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_2 = mfspr(SPR_PMC5);
+
+ /* TCG and POWER9 do not count instructions around faults correctly */
+ report_kfail(true, pmc5_1 + 20 == pmc5_2, "PMC5 counts instructions with fault");
+
+ handle_exception(0x300, NULL, NULL);
+ handle_exception(0x380, NULL, NULL);
+}
+
+static void test_pmc5_with_sc(void)
+{
+ unsigned long pmc5_1, pmc5_2;
+
+ handle_exception(0xc00, &sc_handler, NULL);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile("sc 0" ::: "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_1 = mfspr(SPR_PMC5);
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 10 ; nop ; .endr ; sc 0 ; .rep 10 ; nop ; .endr" ::: "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ assert(got_interrupt);
+ got_interrupt = false;
+ pmc5_2 = mfspr(SPR_PMC5);
+
+ /* TCG does not count instructions around syscalls correctly */
+ report_kfail(host_is_tcg, pmc5_1 + 20 == pmc5_2,
+ "PMC5 counts instructions with syscall");
+
+ handle_exception(0xc00, NULL, NULL);
+}
+
+extern char next_insn[];
+
+static void test_pmc5_with_rfid(void)
+{
+ unsigned long pmc5;
+ unsigned long mmcr;
+
+ mtspr(SPR_SRR0, (unsigned long)next_insn);
+ mtspr(SPR_SRR1, mfmsr());
+ reset_mmcr0();
+ mmcr = mfspr(SPR_MMCR0);
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mmcr & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile("rfid ; trap ; .global next_insn ; next_insn: " ::: "memory");
+ mtspr(SPR_MMCR0, mmcr);
+ pmc5 = mfspr(SPR_PMC5);
+
+ /* TCG does not count instructions around syscalls correctly */
+ report_kfail(host_is_tcg, pmc5 == 2,
+ "PMC5 counts instructions with rfid %ld", pmc5);
+}
+
+static void test_pmc5_with_ldat(void)
+{
+ unsigned long pmc5_1, pmc5_2;
+ register unsigned long r4 asm("r4");
+ register unsigned long r5 asm("r5");
+ register unsigned long r6 asm("r6");
+ uint64_t val;
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 20 ; nop ; .endr" ::: "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ pmc5_1 = mfspr(SPR_PMC5);
+
+ val = 0xdeadbeef;
+ r4 = 0;
+ r5 = 0xdeadbeef;
+ r6 = 100;
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
+ asm volatile(".rep 10 ; nop ; .endr ; ldat %0,%3,0x10 ; .rep 10 ; nop ; .endr" : "=r"(r4), "+r"(r5), "+r"(r6) : "r"(&val) : "memory");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ pmc5_2 = mfspr(SPR_PMC5);
+ assert(r4 == 0xdeadbeef);
+ assert(val == 0xdeadbeef);
+
+ /* TCG does not count instructions around syscalls correctly */
+ report_kfail(host_is_tcg, pmc5_1 != pmc5_2 + 1,
+ "PMC5 counts instructions with ldat");
+}
+
+static void test_pmc56(void)
+{
+ unsigned long tmp;
+
+ report_prefix_push("pmc56");
+
+ reset_mmcr0();
+ mtspr(SPR_PMC5, 0);
+ mtspr(SPR_PMC6, 0);
+ report(mfspr(SPR_PMC5) == 0, "PMC5 zeroed");
+ report(mfspr(SPR_PMC6) == 0, "PMC6 zeroed");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_FC);
+ msleep(100);
+ report(mfspr(SPR_PMC5) == 0, "PMC5 frozen");
+ report(mfspr(SPR_PMC6) == 0, "PMC6 frozen");
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_FC56);
+ mdelay(100);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
+ report(mfspr(SPR_PMC5) != 0, "PMC5 counting");
+ report(mfspr(SPR_PMC6) != 0, "PMC6 counting");
+
+ /* Dynamic frequency scaling could cause to be out, so don't fail. */
+ tmp = mfspr(SPR_PMC6);
+ report(true, "PMC6 ratio to reported clock frequency is %ld%%",
+ tmp * 1000 / cpu_hz);
+
+ tmp = pmc5_count_nr_insns(100);
+ tmp = pmc5_count_nr_insns(1000) - tmp;
+ report(tmp == 900, "PMC5 counts instructions precisely %ld", tmp);
+
+ test_pmc5();
+ test_pmc5_with_branch();
+ test_pmc5_with_cond_branch();
+ test_pmc5_with_ill();
+ test_pmc5_with_fault();
+ test_pmc5_with_sc();
+ test_pmc5_with_rfid();
+ test_pmc5_with_ldat();
+
+ report_prefix_pop();
+}
+
+static void dec_ignore_handler(struct pt_regs *regs, void *data)
+{
+ mtspr(SPR_DEC, 0x7fffffff);
+}
+
+static void pmi_handler(struct pt_regs *regs, void *data)
+{
+ got_interrupt = true;
+ memcpy((void *)&recorded_regs, regs, sizeof(struct pt_regs));
+ recorded_mmcr0 = mfspr(SPR_MMCR0);
+ if (mfspr(SPR_MMCR0) & MMCR0_PMAO) {
+ /* This may cause infinite interrupts, so clear it. */
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_PMAO);
+ }
+}
+
+static void test_pmi(void)
+{
+ report_prefix_push("pmi");
+ handle_exception(0x900, &dec_ignore_handler, NULL);
+ handle_exception(0xf00, &pmi_handler, NULL);
+ reset_mmcr0();
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | MMCR0_PMAO);
+ mtmsr(mfmsr() | MSR_EE);
+ mtmsr(mfmsr() & ~MSR_EE);
+ report(got_interrupt, "PMAO caused interrupt");
+ got_interrupt = false;
+ handle_exception(0xf00, NULL, NULL);
+ handle_exception(0x900, NULL, NULL);
+ report_prefix_pop();
+}
+
+static void clrbhrb(void)
+{
+ asm volatile("clrbhrb" ::: "memory");
+}
+
+static inline unsigned long mfbhrbe(int nr)
+{
+ unsigned long e;
+
+ asm volatile("mfbhrbe %0,%1" : "=r"(e) : "i"(nr) : "memory");
+
+ return e;
+}
+
+extern unsigned char dummy_branch_1[];
+extern unsigned char dummy_branch_2[];
+
+static __attribute__((__noinline__)) void bhrb_dummy(int i)
+{
+ asm volatile(
+ " cmpdi %0,1 \n\t"
+ " beq 1f \n\t"
+ ".global dummy_branch_1 \n\t"
+ "dummy_branch_1: \n\t"
+ " b 2f \n\t"
+ "1: trap \n\t"
+ ".global dummy_branch_2 \n\t"
+ "dummy_branch_2: \n\t"
+ "2: bne 3f \n\t"
+ " trap \n\t"
+ "3: nop \n\t"
+ : : "r"(i));
+}
+
+#define NR_BHRBE 16
+static unsigned long bhrbe[NR_BHRBE];
+static int nr_bhrbe;
+
+static void run_and_load_bhrb(void)
+{
+ int i;
+
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_PMAE);
+ clrbhrb();
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | MMCR0_BHRBA);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FCP | MMCR0_FCPC));
+ mtspr(SPR_MMCRA, mfspr(SPR_MMCRA) & ~(MMCRA_BHRBRD | MMCRA_IFM_MASK));
+
+ if (cpu_has_p10_bhrb) {
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | MMCR0_PMAE);
+ asm volatile("isync" ::: "memory");
+ enter_usermode();
+ bhrb_dummy(0);
+ exit_usermode();
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_PMAE);
+ asm volatile("isync" ::: "memory");
+ } else {
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | MMCR0_PMAE);
+ asm volatile("isync" ::: "memory");
+ mtmsr(mfmsr());
+ asm volatile(".rept 100 ; nop ; .endr");
+ bhrb_dummy(0);
+ mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~MMCR0_PMAE);
+ asm volatile("isync" ::: "memory");
+ }
+
+ bhrbe[0] = mfbhrbe(0);
+ bhrbe[1] = mfbhrbe(1);
+ bhrbe[2] = mfbhrbe(2);
+ bhrbe[3] = mfbhrbe(3);
+ bhrbe[4] = mfbhrbe(4);
+ bhrbe[5] = mfbhrbe(5);
+ bhrbe[6] = mfbhrbe(6);
+ bhrbe[7] = mfbhrbe(7);
+ bhrbe[8] = mfbhrbe(8);
+ bhrbe[9] = mfbhrbe(9);
+ bhrbe[10] = mfbhrbe(10);
+ bhrbe[11] = mfbhrbe(11);
+ bhrbe[12] = mfbhrbe(12);
+ bhrbe[13] = mfbhrbe(13);
+ bhrbe[14] = mfbhrbe(14);
+ bhrbe[15] = mfbhrbe(15);
+
+ for (i = 0; i < NR_BHRBE; i++) {
+ bhrbe[i] &= ~0x1UL; /* remove prediction bit */
+ if (!bhrbe[i])
+ break;
+ }
+ nr_bhrbe = i;
+}
+
+static void test_bhrb(void)
+{
+ int i;
+
+ if (cpu_has_p10_bhrb && !vm_available())
+ return;
+
+ report_prefix_push("bhrb");
+
+ /* TCG doesn't impelment BHRB yet */
+ handle_exception(0x700, &illegal_handler, NULL);
+ handle_exception(0xe40, &illegal_handler, NULL);
+ clrbhrb();
+ handle_exception(0x700, NULL, NULL);
+ handle_exception(0xe40, NULL, NULL);
+ if (got_interrupt) {
+ got_interrupt = false;
+ report_skip("BHRB support missing");
+ report_prefix_pop();
+ return;
+ }
+
+ if (vm_available()) {
+ handle_exception(0x900, &dec_ignore_handler, NULL);
+ setup_vm();
+ }
+ reset_mmcr0();
+ clrbhrb();
+ if (cpu_has_p10_bhrb) {
+ enter_usermode();
+ bhrb_dummy(0);
+ exit_usermode();
+ } else {
+ bhrb_dummy(0);
+ }
+ report(mfbhrbe(0) == 0, "BHRB is frozen");
+
+ /*
+ * BHRB may be cleared at any time (e.g., by OS or hypervisor)
+ * so this test could be occasionally incorrect. Try several
+ * times before giving up...
+ */
+
+ if (cpu_has_p10_bhrb) {
+ /*
+ * BHRB should have 8 entries:
+ * 1. enter_usermode blr
+ * 2. enter_usermode blr target
+ * 3. bl dummy
+ * 4. dummy unconditional
+ * 5. dummy conditional
+ * 6. dummy blr
+ * 7. dummy blr target
+ * 8. exit_usermode bl
+ *
+ * POWER10 often gives 4 entries, if other threads are
+ * running on the core, it seems to struggle.
+ */
+ for (i = 0; i < 200; i++) {
+ run_and_load_bhrb();
+ if (nr_bhrbe == 8)
+ break;
+ if (i > 100 && nr_bhrbe == 4)
+ break;
+ }
+ report(nr_bhrbe, "BHRB has been written");
+ report_kfail(!host_is_tcg, nr_bhrbe == 8,
+ "BHRB has written 8 entries");
+ if (nr_bhrbe == 8) {
+ report(bhrbe[4] == (unsigned long)dummy_branch_1,
+ "correct unconditional branch address");
+ report(bhrbe[3] == (unsigned long)dummy_branch_2,
+ "correct conditional branch address");
+ } else if (nr_bhrbe == 4) {
+ /* POWER10 workaround */
+ report(nr_bhrbe == 4, "BHRB has written 4 entries");
+ report(bhrbe[3] == (unsigned long)dummy_branch_2,
+ "correct conditional branch address");
+ }
+ } else {
+ /*
+ * BHRB should have 6 entries:
+ * 1. bl dummy
+ * 2. dummy unconditional
+ * 3. dummy conditional
+ * 4. dummy blr
+ * 5. dummy blr target
+ * 6. Final b loop before disabled.
+ *
+ * POWER9 often gives 4 entries, if other threads are
+ * running on the core, it seems to struggle.
+ */
+ for (i = 0; i < 200; i++) {
+ run_and_load_bhrb();
+ if (nr_bhrbe == 6)
+ break;
+ if (i > 100 && nr_bhrbe == 4)
+ break;
+ }
+ report(nr_bhrbe, "BHRB has been written");
+ report_kfail(!host_is_tcg, nr_bhrbe == 6,
+ "BHRB has written 6 entries");
+ if (nr_bhrbe == 6) {
+ report(bhrbe[4] == (unsigned long)dummy_branch_1,
+ "correct unconditional branch address");
+ report(bhrbe[3] == (unsigned long)dummy_branch_2,
+ "correct conditional branch address");
+ } else if (nr_bhrbe == 4) {
+ /* POWER9 workaround */
+ report(nr_bhrbe == 4, "BHRB has written 4 entries");
+ report(bhrbe[3] == (unsigned long)dummy_branch_2,
+ "correct conditional branch address");
+ }
+ }
+
+ handle_exception(0x900, NULL, NULL);
+
+ report_prefix_pop();
+}
+
+int main(int argc, char **argv)
+{
+ report_prefix_push("pmu");
+
+ test_pmc56();
+ test_pmi();
+ if (cpu_has_bhrb)
+ test_bhrb();
+
+ report_prefix_pop();
+
+ return report_summary();
+}
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 149f963f3..79a123e9f 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -73,6 +73,9 @@ file = interrupts.elf
file = mmu.elf
smp = 2
+[pmu]
+file = pmu.elf
+
[smp]
file = smp.elf
smp = 2
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 09/15] configure: Make arch_libdir a first-class entity
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (7 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure Nicholas Piggin
` (5 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linux-s390, Nico Böhr, Janosch Frank, kvm,
David Hildenbrand, linuxppc-dev, Nicholas Piggin, Andrew Jones,
Eric Auger, kvm-riscv, kvmarm, Paolo Bonzini, Claudio Imbrenda,
Alexandru Elisei
arch_libdir was brought in to improve the heuristic determination of
the lib/ directory based on arch and testdir names, but it did not
entirely clean that mess up.
Remove the arch_libdir->arch->testdir heuristic and just require
everybody sets arch_libdir correctly. Fail if the lib/arch or
lib/arch/asm directories can not be found.
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Claudio Imbrenda <imbrenda@linux.ibm.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Eric Auger <eric.auger@redhat.com>
Cc: Janosch Frank <frankja@linux.ibm.com>
Cc: Laurent Vivier <lvivier@redhat.com>
Cc: Nico Böhr <nrb@linux.ibm.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>
Cc: kvm@vger.kernel.org
Cc: linux-s390@vger.kernel.org
Cc: kvmarm@lists.linux.dev
Cc: kvm-riscv@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Reviewed-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
Makefile | 2 +-
configure | 18 +++++++++++++-----
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index 5b7998b79..7fe93dfd8 100644
--- a/Makefile
+++ b/Makefile
@@ -10,7 +10,7 @@ include config.mak
VPATH = $(SRCDIR)
libdirs-get = $(shell [ -d "lib/$(1)" ] && echo "lib/$(1) lib/$(1)/asm")
-ARCH_LIBDIRS := $(call libdirs-get,$(ARCH_LIBDIR)) $(call libdirs-get,$(TEST_DIR))
+ARCH_LIBDIRS := $(call libdirs-get,$(ARCH_LIBDIR))
OBJDIRS := $(ARCH_LIBDIRS)
DESTDIR := $(PREFIX)/share/kvm-unit-tests/
diff --git a/configure b/configure
index db15e85d6..b93723142 100755
--- a/configure
+++ b/configure
@@ -217,7 +217,6 @@ fi
arch_name=$arch
[ "$arch" = "aarch64" ] && arch="arm64"
[ "$arch_name" = "arm64" ] && arch_name="aarch64"
-arch_libdir=$arch
if [ "$arch" = "riscv" ]; then
echo "riscv32 or riscv64 must be specified"
@@ -285,8 +284,10 @@ fi
if [ "$arch" = "i386" ] || [ "$arch" = "x86_64" ]; then
testdir=x86
+ arch_libdir=x86
elif [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
testdir=arm
+ arch_libdir=$arch
if [ "$target" = "qemu" ]; then
arm_uart_early_addr=0x09000000
elif [ "$target" = "kvmtool" ]; then
@@ -335,6 +336,7 @@ elif [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
fi
elif [ "$arch" = "ppc64" ]; then
testdir=powerpc
+ arch_libdir=ppc64
firmware="$testdir/boot_rom.bin"
if [ "$endian" != "little" ] && [ "$endian" != "big" ]; then
echo "You must provide endianness (big or little)!"
@@ -345,6 +347,7 @@ elif [ "$arch" = "riscv32" ] || [ "$arch" = "riscv64" ]; then
arch_libdir=riscv
elif [ "$arch" = "s390x" ]; then
testdir=s390x
+ arch_libdir=s390x
else
echo "arch $arch is not supported!"
arch=
@@ -354,6 +357,10 @@ if [ ! -d "$srcdir/$testdir" ]; then
echo "$srcdir/$testdir does not exist!"
exit 1
fi
+if [ ! -d "$srcdir/lib/$arch_libdir" ]; then
+ echo "$srcdir/lib/$arch_libdir does not exist!"
+ exit 1
+fi
if [ "$efi" = "y" ] && [ -f "$srcdir/$testdir/efi/run" ]; then
ln -fs "$srcdir/$testdir/efi/run" $testdir-run
@@ -416,10 +423,11 @@ fi
# link lib/asm for the architecture
rm -f lib/asm
asm="asm-generic"
-if [ -d "$srcdir/lib/$arch/asm" ]; then
- asm="$srcdir/lib/$arch/asm"
-elif [ -d "$srcdir/lib/$testdir/asm" ]; then
- asm="$srcdir/lib/$testdir/asm"
+if [ -d "$srcdir/lib/$arch_libdir/asm" ]; then
+ asm="$srcdir/lib/$arch_libdir/asm"
+else
+ echo "$srcdir/lib/$arch_libdir/asm does not exist"
+ exit 1
fi
mkdir -p lib
ln -sf "$asm" lib/asm
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (8 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 09/15] configure: Make arch_libdir a first-class entity Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-19 7:36 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 11/15] powerpc: gitlab CI update Nicholas Piggin
` (4 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
This moves merges ppc64 directories and files into powerpc, and
merges the 3 makefiles into one.
The configure --arch=powerpc option is aliased to ppc64 for
good measure.
Acked-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
MAINTAINERS | 1 -
configure | 3 +-
lib/{ppc64 => powerpc}/asm-offsets.c | 0
lib/{ppc64 => powerpc}/asm/asm-offsets.h | 0
lib/{ppc64 => powerpc}/asm/atomic.h | 0
lib/{ppc64 => powerpc}/asm/barrier.h | 4 +-
lib/{ppc64 => powerpc}/asm/bitops.h | 4 +-
lib/{ppc64 => powerpc}/asm/io.h | 4 +-
lib/{ppc64 => powerpc}/asm/mmu.h | 0
lib/{ppc64 => powerpc}/asm/opal.h | 4 +-
lib/{ppc64 => powerpc}/asm/page.h | 6 +-
lib/{ppc64 => powerpc}/asm/pgtable-hwdef.h | 6 +-
lib/{ppc64 => powerpc}/asm/pgtable.h | 2 +-
lib/{ppc64 => powerpc}/asm/ptrace.h | 6 +-
lib/powerpc/asm/spinlock.h | 6 ++
lib/powerpc/asm/stack.h | 3 +
lib/{ppc64 => powerpc}/asm/vpa.h | 0
lib/{ppc64 => powerpc}/mmu.c | 0
lib/{ppc64 => powerpc}/opal-calls.S | 0
lib/{ppc64 => powerpc}/opal.c | 0
lib/{ppc64 => powerpc}/stack.c | 0
lib/ppc64/.gitignore | 1 -
lib/ppc64/asm/handlers.h | 1 -
lib/ppc64/asm/hcall.h | 1 -
lib/ppc64/asm/memory_areas.h | 6 --
lib/ppc64/asm/ppc_asm.h | 1 -
lib/ppc64/asm/processor.h | 1 -
lib/ppc64/asm/reg.h | 1 -
lib/ppc64/asm/rtas.h | 1 -
lib/ppc64/asm/setup.h | 1 -
lib/ppc64/asm/smp.h | 1 -
lib/ppc64/asm/spinlock.h | 6 --
lib/ppc64/asm/stack.h | 11 --
powerpc/Makefile | 111 ++++++++++++++++++++-
powerpc/Makefile.common | 95 ------------------
powerpc/Makefile.ppc64 | 31 ------
36 files changed, 139 insertions(+), 179 deletions(-)
rename lib/{ppc64 => powerpc}/asm-offsets.c (100%)
rename lib/{ppc64 => powerpc}/asm/asm-offsets.h (100%)
rename lib/{ppc64 => powerpc}/asm/atomic.h (100%)
rename lib/{ppc64 => powerpc}/asm/barrier.h (83%)
rename lib/{ppc64 => powerpc}/asm/bitops.h (69%)
rename lib/{ppc64 => powerpc}/asm/io.h (50%)
rename lib/{ppc64 => powerpc}/asm/mmu.h (100%)
rename lib/{ppc64 => powerpc}/asm/opal.h (90%)
rename lib/{ppc64 => powerpc}/asm/page.h (94%)
rename lib/{ppc64 => powerpc}/asm/pgtable-hwdef.h (93%)
rename lib/{ppc64 => powerpc}/asm/pgtable.h (99%)
rename lib/{ppc64 => powerpc}/asm/ptrace.h (89%)
create mode 100644 lib/powerpc/asm/spinlock.h
rename lib/{ppc64 => powerpc}/asm/vpa.h (100%)
rename lib/{ppc64 => powerpc}/mmu.c (100%)
rename lib/{ppc64 => powerpc}/opal-calls.S (100%)
rename lib/{ppc64 => powerpc}/opal.c (100%)
rename lib/{ppc64 => powerpc}/stack.c (100%)
delete mode 100644 lib/ppc64/.gitignore
delete mode 100644 lib/ppc64/asm/handlers.h
delete mode 100644 lib/ppc64/asm/hcall.h
delete mode 100644 lib/ppc64/asm/memory_areas.h
delete mode 100644 lib/ppc64/asm/ppc_asm.h
delete mode 100644 lib/ppc64/asm/processor.h
delete mode 100644 lib/ppc64/asm/reg.h
delete mode 100644 lib/ppc64/asm/rtas.h
delete mode 100644 lib/ppc64/asm/setup.h
delete mode 100644 lib/ppc64/asm/smp.h
delete mode 100644 lib/ppc64/asm/spinlock.h
delete mode 100644 lib/ppc64/asm/stack.h
delete mode 100644 powerpc/Makefile.common
delete mode 100644 powerpc/Makefile.ppc64
diff --git a/MAINTAINERS b/MAINTAINERS
index 6ceea991a..1b4aea258 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -92,7 +92,6 @@ S: Maintained
L: linuxppc-dev@lists.ozlabs.org
F: powerpc/
F: lib/powerpc/
-F: lib/ppc64/
RISCV
M: Andrew Jones <andrew.jones@linux.dev>
diff --git a/configure b/configure
index b93723142..5b7e7aee4 100755
--- a/configure
+++ b/configure
@@ -216,6 +216,7 @@ fi
arch_name=$arch
[ "$arch" = "aarch64" ] && arch="arm64"
+[ "$arch" = "powerpc" ] && arch="ppc64"
[ "$arch_name" = "arm64" ] && arch_name="aarch64"
if [ "$arch" = "riscv" ]; then
@@ -336,7 +337,7 @@ elif [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
fi
elif [ "$arch" = "ppc64" ]; then
testdir=powerpc
- arch_libdir=ppc64
+ arch_libdir=powerpc
firmware="$testdir/boot_rom.bin"
if [ "$endian" != "little" ] && [ "$endian" != "big" ]; then
echo "You must provide endianness (big or little)!"
diff --git a/lib/ppc64/asm-offsets.c b/lib/powerpc/asm-offsets.c
similarity index 100%
rename from lib/ppc64/asm-offsets.c
rename to lib/powerpc/asm-offsets.c
diff --git a/lib/ppc64/asm/asm-offsets.h b/lib/powerpc/asm/asm-offsets.h
similarity index 100%
rename from lib/ppc64/asm/asm-offsets.h
rename to lib/powerpc/asm/asm-offsets.h
diff --git a/lib/ppc64/asm/atomic.h b/lib/powerpc/asm/atomic.h
similarity index 100%
rename from lib/ppc64/asm/atomic.h
rename to lib/powerpc/asm/atomic.h
diff --git a/lib/ppc64/asm/barrier.h b/lib/powerpc/asm/barrier.h
similarity index 83%
rename from lib/ppc64/asm/barrier.h
rename to lib/powerpc/asm/barrier.h
index 475434b6a..22349d691 100644
--- a/lib/ppc64/asm/barrier.h
+++ b/lib/powerpc/asm/barrier.h
@@ -1,5 +1,5 @@
-#ifndef _ASMPPC64_BARRIER_H_
-#define _ASMPPC64_BARRIER_H_
+#ifndef _ASMPOWERPC_BARRIER_H_
+#define _ASMPOWERPC_BARRIER_H_
#define cpu_relax() asm volatile("or 1,1,1 ; or 2,2,2" ::: "memory")
#define pause_short() asm volatile(".long 0x7c40003c" ::: "memory")
diff --git a/lib/ppc64/asm/bitops.h b/lib/powerpc/asm/bitops.h
similarity index 69%
rename from lib/ppc64/asm/bitops.h
rename to lib/powerpc/asm/bitops.h
index c93d64bb9..dc1b8cd3f 100644
--- a/lib/ppc64/asm/bitops.h
+++ b/lib/powerpc/asm/bitops.h
@@ -1,5 +1,5 @@
-#ifndef _ASMPPC64_BITOPS_H_
-#define _ASMPPC64_BITOPS_H_
+#ifndef _ASMPOWERPC_BITOPS_H_
+#define _ASMPOWERPC_BITOPS_H_
#ifndef _BITOPS_H_
#error only <bitops.h> can be included directly
diff --git a/lib/ppc64/asm/io.h b/lib/powerpc/asm/io.h
similarity index 50%
rename from lib/ppc64/asm/io.h
rename to lib/powerpc/asm/io.h
index 08d7297c3..cfe099f01 100644
--- a/lib/ppc64/asm/io.h
+++ b/lib/powerpc/asm/io.h
@@ -1,5 +1,5 @@
-#ifndef _ASMPPC64_IO_H_
-#define _ASMPPC64_IO_H_
+#ifndef _ASMPOWERPC_IO_H_
+#define _ASMPOWERPC_IO_H_
#define __iomem
diff --git a/lib/ppc64/asm/mmu.h b/lib/powerpc/asm/mmu.h
similarity index 100%
rename from lib/ppc64/asm/mmu.h
rename to lib/powerpc/asm/mmu.h
diff --git a/lib/ppc64/asm/opal.h b/lib/powerpc/asm/opal.h
similarity index 90%
rename from lib/ppc64/asm/opal.h
rename to lib/powerpc/asm/opal.h
index 6c3e9ffe2..44e62d80d 100644
--- a/lib/ppc64/asm/opal.h
+++ b/lib/powerpc/asm/opal.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-#ifndef _ASMPPC64_OPAL_H_
-#define _ASMPPC64_OPAL_H_
+#ifndef _ASMPOWERPC_OPAL_H_
+#define _ASMPOWERPC_OPAL_H_
#include <stdint.h>
diff --git a/lib/ppc64/asm/page.h b/lib/powerpc/asm/page.h
similarity index 94%
rename from lib/ppc64/asm/page.h
rename to lib/powerpc/asm/page.h
index c497d86b9..19bf9c677 100644
--- a/lib/ppc64/asm/page.h
+++ b/lib/powerpc/asm/page.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef _ASMPPC64_PAGE_H_
-#define _ASMPPC64_PAGE_H_
+#ifndef _ASMPOWERPC_PAGE_H_
+#define _ASMPOWERPC_PAGE_H_
/*
* Adapted from
* lib/arm64/asm/page.h and Linux kernel defines.
@@ -62,4 +62,4 @@ extern unsigned long __phys_to_virt(phys_addr_t addr);
extern void *__ioremap(phys_addr_t phys_addr, size_t size);
#endif /* !__ASSEMBLY__ */
-#endif /* _ASMPPC64_PAGE_H_ */
+#endif /* _ASMPOWERPC_PAGE_H_ */
diff --git a/lib/ppc64/asm/pgtable-hwdef.h b/lib/powerpc/asm/pgtable-hwdef.h
similarity index 93%
rename from lib/ppc64/asm/pgtable-hwdef.h
rename to lib/powerpc/asm/pgtable-hwdef.h
index 0f4b1068a..3f8c6fe34 100644
--- a/lib/ppc64/asm/pgtable-hwdef.h
+++ b/lib/powerpc/asm/pgtable-hwdef.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef _ASMPPC64_PGTABLE_HWDEF_H_
-#define _ASMPPC64_PGTABLE_HWDEF_H_
+#ifndef _ASMPOWERPC_PGTABLE_HWDEF_H_
+#define _ASMPOWERPC_PGTABLE_HWDEF_H_
/*
* Copyright (C) 2024, IBM Inc, Nicholas Piggin <npiggin@gmail.com>
*
@@ -63,4 +63,4 @@
#define PHYS_MASK_SHIFT (48)
#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1)
-#endif /* _ASMPPC64_PGTABLE_HWDEF_H_ */
+#endif /* _ASMPOWERPC_PGTABLE_HWDEF_H_ */
diff --git a/lib/ppc64/asm/pgtable.h b/lib/powerpc/asm/pgtable.h
similarity index 99%
rename from lib/ppc64/asm/pgtable.h
rename to lib/powerpc/asm/pgtable.h
index a6ee0d4cd..d4f2c826a 100644
--- a/lib/ppc64/asm/pgtable.h
+++ b/lib/powerpc/asm/pgtable.h
@@ -122,4 +122,4 @@ static inline pte_t *pte_alloc(pmd_t *pmd, unsigned long addr)
return pte_offset(pmd, addr);
}
-#endif /* _ASMPPC64_PGTABLE_H_ */
+#endif /* _ASMPOWERPC_PGTABLE_H_ */
diff --git a/lib/ppc64/asm/ptrace.h b/lib/powerpc/asm/ptrace.h
similarity index 89%
rename from lib/ppc64/asm/ptrace.h
rename to lib/powerpc/asm/ptrace.h
index db263a59e..39ea950e7 100644
--- a/lib/ppc64/asm/ptrace.h
+++ b/lib/powerpc/asm/ptrace.h
@@ -1,5 +1,5 @@
-#ifndef _ASMPPC64_PTRACE_H_
-#define _ASMPPC64_PTRACE_H_
+#ifndef _ASMPOWERPC_PTRACE_H_
+#define _ASMPOWERPC_PTRACE_H_
#define KERNEL_REDZONE_SIZE 288
#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
@@ -38,4 +38,4 @@ static inline void regs_advance_insn(struct pt_regs *regs)
#endif /* __ASSEMBLY__ */
-#endif /* _ASMPPC64_PTRACE_H_ */
+#endif /* _ASMPOWERPC_PTRACE_H_ */
diff --git a/lib/powerpc/asm/spinlock.h b/lib/powerpc/asm/spinlock.h
new file mode 100644
index 000000000..da259ff4b
--- /dev/null
+++ b/lib/powerpc/asm/spinlock.h
@@ -0,0 +1,6 @@
+#ifndef _ASMPOWERPC_SPINLOCK_H_
+#define _ASMPOWERPC_SPINLOCK_H_
+
+#include <asm-generic/spinlock.h>
+
+#endif /* _ASMPOWERPC_SPINLOCK_H_ */
diff --git a/lib/powerpc/asm/stack.h b/lib/powerpc/asm/stack.h
index e1c46ee09..eea139a45 100644
--- a/lib/powerpc/asm/stack.h
+++ b/lib/powerpc/asm/stack.h
@@ -5,4 +5,7 @@
#error Do not directly include <asm/stack.h>. Just use <stack.h>.
#endif
+#define HAVE_ARCH_BACKTRACE
+#define HAVE_ARCH_BACKTRACE_FRAME
+
#endif
diff --git a/lib/ppc64/asm/vpa.h b/lib/powerpc/asm/vpa.h
similarity index 100%
rename from lib/ppc64/asm/vpa.h
rename to lib/powerpc/asm/vpa.h
diff --git a/lib/ppc64/mmu.c b/lib/powerpc/mmu.c
similarity index 100%
rename from lib/ppc64/mmu.c
rename to lib/powerpc/mmu.c
diff --git a/lib/ppc64/opal-calls.S b/lib/powerpc/opal-calls.S
similarity index 100%
rename from lib/ppc64/opal-calls.S
rename to lib/powerpc/opal-calls.S
diff --git a/lib/ppc64/opal.c b/lib/powerpc/opal.c
similarity index 100%
rename from lib/ppc64/opal.c
rename to lib/powerpc/opal.c
diff --git a/lib/ppc64/stack.c b/lib/powerpc/stack.c
similarity index 100%
rename from lib/ppc64/stack.c
rename to lib/powerpc/stack.c
diff --git a/lib/ppc64/.gitignore b/lib/ppc64/.gitignore
deleted file mode 100644
index 84872bf19..000000000
--- a/lib/ppc64/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-asm-offsets.[hs]
diff --git a/lib/ppc64/asm/handlers.h b/lib/ppc64/asm/handlers.h
deleted file mode 100644
index 92e6fb247..000000000
--- a/lib/ppc64/asm/handlers.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/handlers.h"
diff --git a/lib/ppc64/asm/hcall.h b/lib/ppc64/asm/hcall.h
deleted file mode 100644
index daabaca51..000000000
--- a/lib/ppc64/asm/hcall.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/hcall.h"
diff --git a/lib/ppc64/asm/memory_areas.h b/lib/ppc64/asm/memory_areas.h
deleted file mode 100644
index b9fd46b9e..000000000
--- a/lib/ppc64/asm/memory_areas.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASMPPC64_MEMORY_AREAS_H_
-#define _ASMPPC64_MEMORY_AREAS_H_
-
-#include <asm-generic/memory_areas.h>
-
-#endif
diff --git a/lib/ppc64/asm/ppc_asm.h b/lib/ppc64/asm/ppc_asm.h
deleted file mode 100644
index e3929eeee..000000000
--- a/lib/ppc64/asm/ppc_asm.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/ppc_asm.h"
diff --git a/lib/ppc64/asm/processor.h b/lib/ppc64/asm/processor.h
deleted file mode 100644
index 066a51a00..000000000
--- a/lib/ppc64/asm/processor.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/processor.h"
diff --git a/lib/ppc64/asm/reg.h b/lib/ppc64/asm/reg.h
deleted file mode 100644
index bc407b555..000000000
--- a/lib/ppc64/asm/reg.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/reg.h"
diff --git a/lib/ppc64/asm/rtas.h b/lib/ppc64/asm/rtas.h
deleted file mode 100644
index fe77f635c..000000000
--- a/lib/ppc64/asm/rtas.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/rtas.h"
diff --git a/lib/ppc64/asm/setup.h b/lib/ppc64/asm/setup.h
deleted file mode 100644
index 201929859..000000000
--- a/lib/ppc64/asm/setup.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/setup.h"
diff --git a/lib/ppc64/asm/smp.h b/lib/ppc64/asm/smp.h
deleted file mode 100644
index 67ced7567..000000000
--- a/lib/ppc64/asm/smp.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../powerpc/asm/smp.h"
diff --git a/lib/ppc64/asm/spinlock.h b/lib/ppc64/asm/spinlock.h
deleted file mode 100644
index f59eed191..000000000
--- a/lib/ppc64/asm/spinlock.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASMPPC64_SPINLOCK_H_
-#define _ASMPPC64_SPINLOCK_H_
-
-#include <asm-generic/spinlock.h>
-
-#endif /* _ASMPPC64_SPINLOCK_H_ */
diff --git a/lib/ppc64/asm/stack.h b/lib/ppc64/asm/stack.h
deleted file mode 100644
index 94fd1021c..000000000
--- a/lib/ppc64/asm/stack.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _ASMPPC64_STACK_H_
-#define _ASMPPC64_STACK_H_
-
-#ifndef _STACK_H_
-#error Do not directly include <asm/stack.h>. Just use <stack.h>.
-#endif
-
-#define HAVE_ARCH_BACKTRACE
-#define HAVE_ARCH_BACKTRACE_FRAME
-
-#endif
diff --git a/powerpc/Makefile b/powerpc/Makefile
index 8a007ab54..41e752b07 100644
--- a/powerpc/Makefile
+++ b/powerpc/Makefile
@@ -1 +1,110 @@
-include $(SRCDIR)/$(TEST_DIR)/Makefile.$(ARCH)
+#
+# powerpc makefile
+#
+# Authors: Andrew Jones <drjones@redhat.com>
+#
+tests = \
+ $(TEST_DIR)/selftest.elf \
+ $(TEST_DIR)/selftest-migration.elf \
+ $(TEST_DIR)/memory-verify.elf \
+ $(TEST_DIR)/sieve.elf \
+ $(TEST_DIR)/spapr_vpa.elf \
+ $(TEST_DIR)/spapr_hcall.elf \
+ $(TEST_DIR)/rtas.elf \
+ $(TEST_DIR)/emulator.elf \
+ $(TEST_DIR)/atomics.elf \
+ $(TEST_DIR)/tm.elf \
+ $(TEST_DIR)/smp.elf \
+ $(TEST_DIR)/sprs.elf \
+ $(TEST_DIR)/timebase.elf \
+ $(TEST_DIR)/interrupts.elf \
+ $(TEST_DIR)/mmu.elf \
+ $(TEST_DIR)/pmu.elf
+
+all: directories $(TEST_DIR)/boot_rom.bin $(tests)
+
+cstart.o = $(TEST_DIR)/cstart64.o
+reloc.o = $(TEST_DIR)/reloc64.o
+
+OBJDIRS += lib/powerpc
+cflatobjs += lib/powerpc/stack.o
+cflatobjs += lib/powerpc/mmu.o
+cflatobjs += lib/powerpc/opal.o
+cflatobjs += lib/powerpc/opal-calls.o
+cflatobjs += lib/util.o
+cflatobjs += lib/getchar.o
+cflatobjs += lib/alloc_phys.o
+cflatobjs += lib/alloc.o
+cflatobjs += lib/alloc_page.o
+cflatobjs += lib/vmalloc.o
+cflatobjs += lib/devicetree.o
+cflatobjs += lib/migrate.o
+cflatobjs += lib/powerpc/io.o
+cflatobjs += lib/powerpc/hcall.o
+cflatobjs += lib/powerpc/setup.o
+cflatobjs += lib/powerpc/rtas.o
+cflatobjs += lib/powerpc/processor.o
+cflatobjs += lib/powerpc/handlers.o
+cflatobjs += lib/powerpc/smp.o
+
+##################################################################
+
+bits = 64
+
+ifeq ($(ENDIAN),little)
+ arch_CFLAGS = -mlittle-endian
+ arch_LDFLAGS = -EL
+else
+ arch_CFLAGS = -mbig-endian
+ arch_LDFLAGS = -EB
+endif
+
+mabi_no_altivec := $(call cc-option,-mabi=no-altivec,"")
+
+CFLAGS += -std=gnu99
+CFLAGS += -ffreestanding
+CFLAGS += -O2 -msoft-float -mno-altivec $(mabi_no_altivec)
+CFLAGS += -I $(SRCDIR)/lib -I $(SRCDIR)/lib/libfdt -I lib
+CFLAGS += -Wa,-mregnames
+
+# We want to keep intermediate files
+.PRECIOUS: %.o
+
+asm-offsets = lib/powerpc/asm-offsets.h
+include $(SRCDIR)/scripts/asm-offsets.mak
+
+%.aux.o: $(SRCDIR)/lib/auxinfo.c
+ $(CC) $(CFLAGS) -c -o $@ $< -DPROGNAME=\"$(@:.aux.o=.elf)\"
+
+FLATLIBS = $(libcflat) $(LIBFDT_archive)
+%.elf: CFLAGS += $(arch_CFLAGS)
+%.elf: LDFLAGS += $(arch_LDFLAGS) -pie -n
+%.elf: %.o $(FLATLIBS) $(SRCDIR)/powerpc/flat.lds $(cstart.o) $(reloc.o) %.aux.o
+ $(LD) $(LDFLAGS) -o $@ \
+ -T $(SRCDIR)/powerpc/flat.lds --build-id=none \
+ $(filter %.o, $^) $(FLATLIBS)
+ @chmod a-x $@
+ @echo -n Checking $@ for unsupported reloc types...
+ @if $(OBJDUMP) -R $@ | grep R_ | grep -v R_PPC64_RELATIVE; then \
+ false; \
+ else \
+ echo " looks good."; \
+ fi
+
+$(TEST_DIR)/boot_rom.bin: $(TEST_DIR)/boot_rom.elf
+ dd if=/dev/zero of=$@ bs=256 count=1
+ $(OBJCOPY) -O binary $^ $@.tmp
+ cat $@.tmp >> $@
+ $(RM) $@.tmp
+
+$(TEST_DIR)/boot_rom.elf: CFLAGS = -mbig-endian
+$(TEST_DIR)/boot_rom.elf: $(TEST_DIR)/boot_rom.o
+ $(LD) -EB -nostdlib -Ttext=0x100 --entry=start --build-id=none -o $@ $<
+ @chmod a-x $@
+
+arch_clean: asm_offsets_clean
+ $(RM) $(TEST_DIR)/*.{o,elf} $(TEST_DIR)/boot_rom.bin \
+ $(TEST_DIR)/.*.d lib/powerpc/.*.d
+
+generated-files = $(asm-offsets)
+$(tests:.elf=.o) $(cstart.o) $(cflatobjs): $(generated-files)
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
deleted file mode 100644
index 0d271cdb6..000000000
--- a/powerpc/Makefile.common
+++ /dev/null
@@ -1,95 +0,0 @@
-#
-# powerpc common makefile
-#
-# Authors: Andrew Jones <drjones@redhat.com>
-#
-
-tests-common = \
- $(TEST_DIR)/selftest.elf \
- $(TEST_DIR)/selftest-migration.elf \
- $(TEST_DIR)/memory-verify.elf \
- $(TEST_DIR)/sieve.elf \
- $(TEST_DIR)/spapr_hcall.elf \
- $(TEST_DIR)/rtas.elf \
- $(TEST_DIR)/emulator.elf \
- $(TEST_DIR)/atomics.elf \
- $(TEST_DIR)/tm.elf \
- $(TEST_DIR)/smp.elf \
- $(TEST_DIR)/sprs.elf \
- $(TEST_DIR)/timebase.elf \
- $(TEST_DIR)/interrupts.elf \
- $(TEST_DIR)/mmu.elf \
- $(TEST_DIR)/pmu.elf
-
-tests-all = $(tests-common) $(tests)
-all: directories $(TEST_DIR)/boot_rom.bin $(tests-all)
-
-##################################################################
-
-mabi_no_altivec := $(call cc-option,-mabi=no-altivec,"")
-
-CFLAGS += -std=gnu99
-CFLAGS += -ffreestanding
-CFLAGS += -O2 -msoft-float -mno-altivec $(mabi_no_altivec)
-CFLAGS += -I $(SRCDIR)/lib -I $(SRCDIR)/lib/libfdt -I lib
-CFLAGS += -Wa,-mregnames
-
-# We want to keep intermediate files
-.PRECIOUS: %.o %.aux.o
-
-asm-offsets = lib/$(ARCH)/asm-offsets.h
-include $(SRCDIR)/scripts/asm-offsets.mak
-
-cflatobjs += lib/util.o
-cflatobjs += lib/getchar.o
-cflatobjs += lib/alloc_phys.o
-cflatobjs += lib/alloc.o
-cflatobjs += lib/alloc_page.o
-cflatobjs += lib/vmalloc.o
-cflatobjs += lib/devicetree.o
-cflatobjs += lib/migrate.o
-cflatobjs += lib/powerpc/io.o
-cflatobjs += lib/powerpc/hcall.o
-cflatobjs += lib/powerpc/setup.o
-cflatobjs += lib/powerpc/rtas.o
-cflatobjs += lib/powerpc/processor.o
-cflatobjs += lib/powerpc/handlers.o
-cflatobjs += lib/powerpc/smp.o
-
-OBJDIRS += lib/powerpc
-
-%.aux.o: $(SRCDIR)/lib/auxinfo.c
- $(CC) $(CFLAGS) -c -o $@ $< -DPROGNAME=\"$(@:.aux.o=.elf)\"
-
-FLATLIBS = $(libcflat) $(LIBFDT_archive)
-%.elf: CFLAGS += $(arch_CFLAGS)
-%.elf: LDFLAGS += $(arch_LDFLAGS) -pie -n
-%.elf: %.o $(FLATLIBS) $(SRCDIR)/powerpc/flat.lds $(cstart.o) $(reloc.o) %.aux.o
- $(LD) $(LDFLAGS) -o $@ \
- -T $(SRCDIR)/powerpc/flat.lds --build-id=none \
- $(filter %.o, $^) $(FLATLIBS)
- @chmod a-x $@
- @echo -n Checking $@ for unsupported reloc types...
- @if $(OBJDUMP) -R $@ | grep R_ | grep -v R_PPC64_RELATIVE; then \
- false; \
- else \
- echo " looks good."; \
- fi
-
-$(TEST_DIR)/boot_rom.bin: $(TEST_DIR)/boot_rom.elf
- dd if=/dev/zero of=$@ bs=256 count=1
- $(OBJCOPY) -O binary $^ $@.tmp
- cat $@.tmp >> $@
- $(RM) $@.tmp
-
-$(TEST_DIR)/boot_rom.elf: CFLAGS = -mbig-endian
-$(TEST_DIR)/boot_rom.elf: $(TEST_DIR)/boot_rom.o
- $(LD) -EB -nostdlib -Ttext=0x100 --entry=start --build-id=none -o $@ $<
- @chmod a-x $@
-
-powerpc_clean: asm_offsets_clean
- $(RM) $(TEST_DIR)/*.{o,elf} $(TEST_DIR)/boot_rom.bin \
- $(TEST_DIR)/.*.d lib/powerpc/.*.d
-
-generated-files = $(asm-offsets)
-$(tests-all:.elf=.o) $(cstart.o) $(cflatobjs): $(generated-files)
diff --git a/powerpc/Makefile.ppc64 b/powerpc/Makefile.ppc64
deleted file mode 100644
index 2466471f9..000000000
--- a/powerpc/Makefile.ppc64
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# ppc64 makefile
-#
-# Authors: Andrew Jones <drjones@redhat.com>
-#
-bits = 64
-
-ifeq ($(ENDIAN),little)
- arch_CFLAGS = -mlittle-endian
- arch_LDFLAGS = -EL
-else
- arch_CFLAGS = -mbig-endian
- arch_LDFLAGS = -EB
-endif
-
-cstart.o = $(TEST_DIR)/cstart64.o
-reloc.o = $(TEST_DIR)/reloc64.o
-
-OBJDIRS += lib/ppc64
-cflatobjs += lib/ppc64/stack.o
-cflatobjs += lib/ppc64/mmu.o
-cflatobjs += lib/ppc64/opal.o
-cflatobjs += lib/ppc64/opal-calls.o
-
-# ppc64 specific tests
-tests = $(TEST_DIR)/spapr_vpa.elf
-
-include $(SRCDIR)/$(TEST_DIR)/Makefile.common
-
-arch_clean: powerpc_clean
- $(RM) lib/ppc64/.*.d
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 11/15] powerpc: gitlab CI update
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (9 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status Nicholas Piggin
` (3 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
This adds testing for the powernv machine. To control overhead, ppc64be
is used to test powernv and 64k page size, ppc64le is used to test
pseries and 4k page size.
Change to using a gitlab-ci test group instead of specifying all
tests in .gitlab-ci.yml, and adds a few additional tests (smp, atomics)
that are known to work in CI.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
.gitlab-ci.yml | 32 ++++++++------------------------
powerpc/unittests.cfg | 34 +++++++++++++++++++++++++++-------
2 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 0e4d6205f..b5fc0cb7d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -96,22 +96,14 @@ build-arm:
build-ppc64be:
extends: .outoftree_template
script:
- - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat
+ - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu
- mkdir build
- cd build
- - ../configure --arch=ppc64 --endian=big --cross-prefix=powerpc64-linux-gnu-
+ - ../configure --arch=ppc64 --endian=big --page-size=64k --cross-prefix=powerpc64-linux-gnu-
- make -j2
- - ACCEL=tcg ./run_tests.sh
- selftest-setup
- selftest-migration
- selftest-migration-skip
- spapr_hcall
- rtas-get-time-of-day
- rtas-get-time-of-day-base
- rtas-set-time-of-day
- emulator
- | tee results.txt
- - if grep -q FAIL results.txt ; then exit 1 ; fi
+ - ACCEL=tcg MAX_SMP=8 MACHINE=powernv ./run_tests.sh -g gitlab-ci
+ | tee results.txt
+ - grep -q PASS results.txt && ! grep -q FAIL results.txt
build-ppc64le:
extends: .intree_template
@@ -119,17 +111,9 @@ build-ppc64le:
- dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat
- ./configure --arch=ppc64 --endian=little --cross-prefix=powerpc64-linux-gnu-
- make -j2
- - ACCEL=tcg ./run_tests.sh
- selftest-setup
- selftest-migration
- selftest-migration-skip
- spapr_hcall
- rtas-get-time-of-day
- rtas-get-time-of-day-base
- rtas-set-time-of-day
- emulator
- | tee results.txt
- - if grep -q FAIL results.txt ; then exit 1 ; fi
+ - ACCEL=tcg MAX_SMP=8 ./run_tests.sh -g gitlab-ci
+ | tee results.txt
+ - grep -q PASS results.txt && ! grep -q FAIL results.txt
# build-riscv32:
# Fedora doesn't package a riscv32 compiler for QEMU. Oh, well.
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 79a123e9f..89455b618 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -16,17 +16,25 @@
file = selftest.elf
smp = 2
extra_params = -m 1g -append 'setup smp=2 mem=1024'
-groups = selftest
+groups = selftest gitlab-ci
[selftest-migration]
file = selftest-migration.elf
machine = pseries
groups = selftest migration
+# QEMU 7.0 (Fedora 37) in gitlab CI has known migration bugs in TCG, so
+# make a kvm-only version for CI
+[selftest-migration-ci]
+file = selftest-migration.elf
+machine = pseries
+groups = nodefault selftest migration gitlab-ci
+accel = kvm
+
[selftest-migration-skip]
file = selftest-migration.elf
machine = pseries
-groups = selftest migration
+groups = selftest migration gitlab-ci
extra_params = -append "skip"
[migration-memory]
@@ -37,6 +45,7 @@ groups = migration
[spapr_hcall]
file = spapr_hcall.elf
machine = pseries
+groups = gitlab-ci
[spapr_vpa]
file = spapr_vpa.elf
@@ -47,38 +56,43 @@ file = rtas.elf
machine = pseries
timeout = 5
extra_params = -append "get-time-of-day date=$(date +%s)"
-groups = rtas
+groups = rtas gitlab-ci
[rtas-get-time-of-day-base]
file = rtas.elf
machine = pseries
timeout = 5
extra_params = -rtc base="2006-06-17" -append "get-time-of-day date=$(date --date="2006-06-17 UTC" +%s)"
-groups = rtas
+groups = rtas gitlab-ci
[rtas-set-time-of-day]
file = rtas.elf
machine = pseries
extra_params = -append "set-time-of-day"
timeout = 5
-groups = rtas
+groups = rtas gitlab-ci
[emulator]
file = emulator.elf
+groups = gitlab-ci
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[interrupts]
file = interrupts.elf
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[mmu]
file = mmu.elf
smp = 2
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[pmu]
file = pmu.elf
[smp]
file = smp.elf
smp = 2
+groups = gitlab-ci
[smp-smt]
file = smp.elf
@@ -90,19 +104,22 @@ file = smp.elf
smp = 8,threads=4
accel = tcg,thread=single
+# QEMU 7.0 (Fedora 37) in gitlab CI does not do well with SMP atomics
[atomics]
file = atomics.elf
-smp = 2
+groups = gitlab-ci
[atomics-migration]
file = atomics.elf
machine = pseries
extra_params = -append "migration -m"
-groups = migration
+groups = migration gitlab-ci
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[timebase]
file = timebase.elf
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[timebase-icount]
file = timebase.elf
accel = tcg
@@ -116,14 +133,17 @@ smp = 2,threads=2
extra_params = -machine cap-htm=on -append "h_cede_tm"
groups = h_cede_tm
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[sprs]
file = sprs.elf
+# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[sprs-migration]
file = sprs.elf
machine = pseries
extra_params = -append '-w'
groups = migration
+# Too costly to run in CI
[sieve]
file = sieve.elf
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (10 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 11/15] powerpc: gitlab CI update Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-12 7:26 ` Andrew Jones
2024-06-17 14:13 ` Andrew Jones
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test Nicholas Piggin
` (2 subsequent siblings)
14 siblings, 2 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
run_qemu_status() looks for "EXIT: STATUS=%d" if the harness command
returned 1, to determine the final status of the test. In the case of
panic tests, QEMU should terminate before successful exit status is
known, so the run_panic() command must produce the "EXIT: STATUS" line.
With this change, running a panic test returns 0 on success (panic),
and the run_test.sh unit test correctly displays it as PASS rather than
FAIL.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
scripts/arch-run.bash | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index 8643bab3b..9bf2f0bbd 100644
--- a/scripts/arch-run.bash
+++ b/scripts/arch-run.bash
@@ -378,6 +378,7 @@ run_panic ()
else
# some QEMU versions report multiple panic events
echo "PASS: guest panicked"
+ echo "EXIT: STATUS=1"
ret=1
fi
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (11 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-19 7:42 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40 Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with " Nicholas Piggin
14 siblings, 1 reply; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
This adds a simple panic test for pseries and powernv that works with
TCG (unlike the s390x panic tests), making it easier to test this part
of the harness code.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
lib/powerpc/asm/rtas.h | 1 +
lib/powerpc/rtas.c | 16 ++++++++++++++++
powerpc/run | 2 +-
powerpc/selftest.c | 18 ++++++++++++++++--
powerpc/unittests.cfg | 5 +++++
5 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/lib/powerpc/asm/rtas.h b/lib/powerpc/asm/rtas.h
index 364bf9355..2dcb2f1b3 100644
--- a/lib/powerpc/asm/rtas.h
+++ b/lib/powerpc/asm/rtas.h
@@ -26,6 +26,7 @@ extern int rtas_call(int token, int nargs, int nret, int *outputs, ...);
extern int rtas_call_unlocked(struct rtas_args *args, int token, int nargs, int nret, int *outputs, ...);
extern void rtas_power_off(void);
+extern void rtas_os_panic(void);
extern void rtas_stop_self(void);
#endif /* __ASSEMBLY__ */
diff --git a/lib/powerpc/rtas.c b/lib/powerpc/rtas.c
index 9c1e0affc..98eee24f4 100644
--- a/lib/powerpc/rtas.c
+++ b/lib/powerpc/rtas.c
@@ -182,3 +182,19 @@ void rtas_power_off(void)
ret = rtas_call_unlocked(&args, token, 2, 1, NULL, -1, -1);
printf("RTAS power-off returned %d\n", ret);
}
+
+void rtas_os_panic(void)
+{
+ struct rtas_args args;
+ uint32_t token;
+ int ret;
+
+ ret = rtas_token("ibm,os-term", &token);
+ if (ret) {
+ puts("RTAS ibm,os-term not available\n");
+ return;
+ }
+
+ ret = rtas_call_unlocked(&args, token, 1, 1, NULL, "rtas_os_panic");
+ printf("RTAS ibm,os-term returned %d\n", ret);
+}
diff --git a/powerpc/run b/powerpc/run
index 27abf1ef6..4cdc7d16c 100755
--- a/powerpc/run
+++ b/powerpc/run
@@ -56,7 +56,7 @@ fi
command="$qemu -nodefaults $A $M $B $D"
command+=" -display none -serial stdio -kernel"
-command="$(migration_cmd) $(timeout_cmd) $command"
+command="$(panic_cmd) $(migration_cmd) $(timeout_cmd) $command"
# powerpc tests currently exit with rtas-poweroff, which exits with 0.
# run_qemu treats that as a failure exit and returns 1, so we need
diff --git a/powerpc/selftest.c b/powerpc/selftest.c
index 8d1a2c767..101cfcdef 100644
--- a/powerpc/selftest.c
+++ b/powerpc/selftest.c
@@ -7,6 +7,7 @@
*/
#include <libcflat.h>
#include <util.h>
+#include <asm/rtas.h>
#include <asm/setup.h>
#include <asm/smp.h>
@@ -47,6 +48,17 @@ static void check_setup(int argc, char **argv)
report_abort("missing input");
}
+static void do_panic(void)
+{
+ if (machine_is_pseries()) {
+ rtas_os_panic();
+ } else {
+ /* Cause a checkstop with MSR[ME] disabled */
+ *((char *)0x10000000000) = 0;
+ }
+ report_fail("survived panic");
+}
+
int main(int argc, char **argv)
{
report_prefix_push("selftest");
@@ -57,9 +69,11 @@ int main(int argc, char **argv)
report_prefix_push(argv[1]);
if (strcmp(argv[1], "setup") == 0) {
-
check_setup(argc-2, &argv[2]);
-
+ } else if (strcmp(argv[1], "panic") == 0) {
+ do_panic();
+ } else {
+ report_abort("unknown test %s", argv[1]);
}
return report_summary();
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 89455b618..9e7df22f4 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -18,6 +18,11 @@ smp = 2
extra_params = -m 1g -append 'setup smp=2 mem=1024'
groups = selftest gitlab-ci
+[selftest-panic]
+file = selftest.elf
+extra_params = -append 'panic'
+groups = selftest panic gitlab-ci
+
[selftest-migration]
file = selftest-migration.elf
machine = pseries
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (12 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-19 7:35 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with " Nicholas Piggin
14 siblings, 1 reply; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
QEMU has fixed a number of powerpc test fails in Fedora 40, so upgrade
to that image.
Other architectures seem to be okay with Fedora 40 except for x86-64,
which fails some xsave and realmode tests, so only change powerpc to
start with.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
.gitlab-ci.yml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b5fc0cb7d..ffb3767ec 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -95,6 +95,7 @@ build-arm:
build-ppc64be:
extends: .outoftree_template
+ image: fedora:40
script:
- dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu
- mkdir build
@@ -107,6 +108,7 @@ build-ppc64be:
build-ppc64le:
extends: .intree_template
+ image: fedora:40
script:
- dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat
- ./configure --arch=ppc64 --endian=little --cross-prefix=powerpc64-linux-gnu-
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with Fedora 40
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
` (13 preceding siblings ...)
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40 Nicholas Piggin
@ 2024-06-12 5:23 ` Nicholas Piggin
2024-06-19 7:44 ` Thomas Huth
14 siblings, 1 reply; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-12 5:23 UTC (permalink / raw)
To: Thomas Huth
Cc: Laurent Vivier, linuxppc-dev, kvm, Nicholas Piggin, Andrew Jones
With Fedora 40 (QEMU 8.2), more tests can be enabled.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
.gitlab-ci.yml | 2 +-
powerpc/unittests.cfg | 17 ++++++++---------
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index ffb3767ec..ee14330a3 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -110,7 +110,7 @@ build-ppc64le:
extends: .intree_template
image: fedora:40
script:
- - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat
+ - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat jq
- ./configure --arch=ppc64 --endian=little --cross-prefix=powerpc64-linux-gnu-
- make -j2
- ACCEL=tcg MAX_SMP=8 ./run_tests.sh -g gitlab-ci
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index 9e7df22f4..27092b185 100644
--- a/powerpc/unittests.cfg
+++ b/powerpc/unittests.cfg
@@ -28,7 +28,7 @@ file = selftest-migration.elf
machine = pseries
groups = selftest migration
-# QEMU 7.0 (Fedora 37) in gitlab CI has known migration bugs in TCG, so
+# QEMU 8.2 (Fedora 40) in gitlab CI has known migration bugs in TCG, so
# make a kvm-only version for CI
[selftest-migration-ci]
file = selftest-migration.elf
@@ -81,18 +81,18 @@ groups = rtas gitlab-ci
file = emulator.elf
groups = gitlab-ci
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
+# QEMU 8.2 in Fedora 40 fails because it allows supervisor to change MSR[ME]
[interrupts]
file = interrupts.elf
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[mmu]
file = mmu.elf
smp = 2
+groups = gitlab-ci
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[pmu]
file = pmu.elf
+groups = gitlab-ci
[smp]
file = smp.elf
@@ -120,15 +120,15 @@ machine = pseries
extra_params = -append "migration -m"
groups = migration gitlab-ci
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[timebase]
file = timebase.elf
+groups = gitlab-ci
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[timebase-icount]
file = timebase.elf
accel = tcg
extra_params = -icount shift=5
+groups = gitlab-ci
[h_cede_tm]
file = tm.elf
@@ -138,16 +138,15 @@ smp = 2,threads=2
extra_params = -machine cap-htm=on -append "h_cede_tm"
groups = h_cede_tm
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[sprs]
file = sprs.elf
+groups = gitlab-ci
-# QEMU 7.0 (Fedora 37) in gitlab CI fails this
[sprs-migration]
file = sprs.elf
machine = pseries
extra_params = -append '-w'
-groups = migration
+groups = migration gitlab-ci
# Too costly to run in CI
[sieve]
--
2.45.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status Nicholas Piggin
@ 2024-06-12 7:26 ` Andrew Jones
2024-06-14 0:56 ` Nicholas Piggin
2024-06-17 14:13 ` Andrew Jones
1 sibling, 1 reply; 27+ messages in thread
From: Andrew Jones @ 2024-06-12 7:26 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, Thomas Huth, linuxppc-dev, kvm
On Wed, Jun 12, 2024 at 03:23:17PM GMT, Nicholas Piggin wrote:
> run_qemu_status() looks for "EXIT: STATUS=%d" if the harness command
> returned 1, to determine the final status of the test. In the case of
> panic tests, QEMU should terminate before successful exit status is
> known, so the run_panic() command must produce the "EXIT: STATUS" line.
>
> With this change, running a panic test returns 0 on success (panic),
> and the run_test.sh unit test correctly displays it as PASS rather than
> FAIL.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> scripts/arch-run.bash | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
> index 8643bab3b..9bf2f0bbd 100644
> --- a/scripts/arch-run.bash
> +++ b/scripts/arch-run.bash
> @@ -378,6 +378,7 @@ run_panic ()
> else
> # some QEMU versions report multiple panic events
> echo "PASS: guest panicked"
> + echo "EXIT: STATUS=1"
> ret=1
> fi
>
> --
> 2.45.1
>
Do we also need an 'echo "EXIT: STATUS=3"' in the if-arm of this if-else?
Thanks,
drew
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status
2024-06-12 7:26 ` Andrew Jones
@ 2024-06-14 0:56 ` Nicholas Piggin
2024-06-17 14:12 ` Andrew Jones
0 siblings, 1 reply; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-14 0:56 UTC (permalink / raw)
To: Andrew Jones; +Cc: Laurent Vivier, Thomas Huth, linuxppc-dev, kvm
On Wed Jun 12, 2024 at 5:26 PM AEST, Andrew Jones wrote:
> On Wed, Jun 12, 2024 at 03:23:17PM GMT, Nicholas Piggin wrote:
> > run_qemu_status() looks for "EXIT: STATUS=%d" if the harness command
> > returned 1, to determine the final status of the test. In the case of
> > panic tests, QEMU should terminate before successful exit status is
> > known, so the run_panic() command must produce the "EXIT: STATUS" line.
> >
> > With this change, running a panic test returns 0 on success (panic),
> > and the run_test.sh unit test correctly displays it as PASS rather than
> > FAIL.
> >
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> > scripts/arch-run.bash | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
> > index 8643bab3b..9bf2f0bbd 100644
> > --- a/scripts/arch-run.bash
> > +++ b/scripts/arch-run.bash
> > @@ -378,6 +378,7 @@ run_panic ()
> > else
> > # some QEMU versions report multiple panic events
> > echo "PASS: guest panicked"
> > + echo "EXIT: STATUS=1"
> > ret=1
> > fi
> >
> > --
> > 2.45.1
> >
>
> Do we also need an 'echo "EXIT: STATUS=3"' in the if-arm of this if-else?
In that case we don't need it because run_panic() returns 3 in that
case. run_qemu_status() only checks guest status if harness said
QEMU ran successfully.
Arguably this is a bit hacky because "EXIT: STATUS" should really be
a guest-printed status, and we would have a different success code
for expected-QEMU-crash type of tests where guest can't provide status.
I can do that incrementally after this if you like, but it's a bit
more code.
Thanks,
Nick
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status
2024-06-14 0:56 ` Nicholas Piggin
@ 2024-06-17 14:12 ` Andrew Jones
0 siblings, 0 replies; 27+ messages in thread
From: Andrew Jones @ 2024-06-17 14:12 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, Thomas Huth, linuxppc-dev, kvm
On Fri, Jun 14, 2024 at 10:56:02AM GMT, Nicholas Piggin wrote:
> On Wed Jun 12, 2024 at 5:26 PM AEST, Andrew Jones wrote:
> > On Wed, Jun 12, 2024 at 03:23:17PM GMT, Nicholas Piggin wrote:
> > > run_qemu_status() looks for "EXIT: STATUS=%d" if the harness command
> > > returned 1, to determine the final status of the test. In the case of
> > > panic tests, QEMU should terminate before successful exit status is
> > > known, so the run_panic() command must produce the "EXIT: STATUS" line.
> > >
> > > With this change, running a panic test returns 0 on success (panic),
> > > and the run_test.sh unit test correctly displays it as PASS rather than
> > > FAIL.
> > >
> > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > > ---
> > > scripts/arch-run.bash | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
> > > index 8643bab3b..9bf2f0bbd 100644
> > > --- a/scripts/arch-run.bash
> > > +++ b/scripts/arch-run.bash
> > > @@ -378,6 +378,7 @@ run_panic ()
> > > else
> > > # some QEMU versions report multiple panic events
> > > echo "PASS: guest panicked"
> > > + echo "EXIT: STATUS=1"
> > > ret=1
> > > fi
> > >
> > > --
> > > 2.45.1
> > >
> >
> > Do we also need an 'echo "EXIT: STATUS=3"' in the if-arm of this if-else?
>
> In that case we don't need it because run_panic() returns 3 in that
> case. run_qemu_status() only checks guest status if harness said
> QEMU ran successfully.
Ah, yes.
>
> Arguably this is a bit hacky because "EXIT: STATUS" should really be
> a guest-printed status, and we would have a different success code
> for expected-QEMU-crash type of tests where guest can't provide status.
> I can do that incrementally after this if you like, but it's a bit
> more code.
Just this patch for now works for me.
Thanks,
drew
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status Nicholas Piggin
2024-06-12 7:26 ` Andrew Jones
@ 2024-06-17 14:13 ` Andrew Jones
1 sibling, 0 replies; 27+ messages in thread
From: Andrew Jones @ 2024-06-17 14:13 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, Thomas Huth, linuxppc-dev, kvm
On Wed, Jun 12, 2024 at 03:23:17PM GMT, Nicholas Piggin wrote:
> run_qemu_status() looks for "EXIT: STATUS=%d" if the harness command
> returned 1, to determine the final status of the test. In the case of
> panic tests, QEMU should terminate before successful exit status is
> known, so the run_panic() command must produce the "EXIT: STATUS" line.
>
> With this change, running a panic test returns 0 on success (panic),
> and the run_test.sh unit test correctly displays it as PASS rather than
> FAIL.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> scripts/arch-run.bash | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
> index 8643bab3b..9bf2f0bbd 100644
> --- a/scripts/arch-run.bash
> +++ b/scripts/arch-run.bash
> @@ -378,6 +378,7 @@ run_panic ()
> else
> # some QEMU versions report multiple panic events
> echo "PASS: guest panicked"
> + echo "EXIT: STATUS=1"
> ret=1
> fi
>
> --
> 2.45.1
>
Acked-by: Andrew Jones <andrew.jones@linux.dev>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests Nicholas Piggin
@ 2024-06-18 15:20 ` Thomas Huth
2024-06-18 18:39 ` Thomas Huth
1 sibling, 0 replies; 27+ messages in thread
From: Thomas Huth @ 2024-06-18 15:20 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> Add some initial PMU testing.
>
> - PMC5/6 tests
> - PMAE / PMI test
> - BHRB basic tests
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> lib/powerpc/asm/processor.h | 2 +
> lib/powerpc/asm/reg.h | 9 +
> lib/powerpc/asm/setup.h | 1 +
> lib/powerpc/setup.c | 20 ++
> powerpc/Makefile.common | 3 +-
> powerpc/pmu.c | 562 ++++++++++++++++++++++++++++++++++++
> powerpc/unittests.cfg | 3 +
> 7 files changed, 599 insertions(+), 1 deletion(-)
> create mode 100644 powerpc/pmu.c
Hi Nicholas!
Something in this patch breaks compiling with Clang in the Travis-CI:
https://app.travis-ci.com/github/huth/kvm-unit-tests/builds/271013764
Not sure what exactly it is, the log is not very helpful. Do you have a
ppc64 host where you could test your patches with Clang?
Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests Nicholas Piggin
2024-06-18 15:20 ` Thomas Huth
@ 2024-06-18 18:39 ` Thomas Huth
2024-06-25 1:56 ` Nicholas Piggin
1 sibling, 1 reply; 27+ messages in thread
From: Thomas Huth @ 2024-06-18 18:39 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> Add some initial PMU testing.
>
> - PMC5/6 tests
> - PMAE / PMI test
> - BHRB basic tests
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
...
> diff --git a/powerpc/pmu.c b/powerpc/pmu.c
> new file mode 100644
> index 000000000..bdc45e167
> --- /dev/null
> +++ b/powerpc/pmu.c
> @@ -0,0 +1,562 @@
...
> +static void test_pmc5_with_ldat(void)
> +{
> + unsigned long pmc5_1, pmc5_2;
> + register unsigned long r4 asm("r4");
> + register unsigned long r5 asm("r5");
> + register unsigned long r6 asm("r6");
> + uint64_t val;
> +
> + reset_mmcr0();
> + mtspr(SPR_PMC5, 0);
> + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> + asm volatile(".rep 20 ; nop ; .endr" ::: "memory");
> + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> + pmc5_1 = mfspr(SPR_PMC5);
> +
> + val = 0xdeadbeef;
> + r4 = 0;
> + r5 = 0xdeadbeef;
> + r6 = 100;
> + reset_mmcr0();
> + mtspr(SPR_PMC5, 0);
> + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> + asm volatile(".rep 10 ; nop ; .endr ; ldat %0,%3,0x10 ; .rep 10 ; nop ; .endr" : "=r"(r4), "+r"(r5), "+r"(r6) : "r"(&val) :"memory");
Looks like older versions of Clang do not like this instruction:
/tmp/pmu-4fda98.s: Assembler messages:
/tmp/pmu-4fda98.s:1685: Error: unrecognized opcode: `ldat'
clang-13: error: assembler command failed with exit code 1 (use -v to see
invocation)
Could you please work-around that issue?
Also, please break the very long line here. Thanks!
> + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> + pmc5_2 = mfspr(SPR_PMC5);
> + assert(r4 == 0xdeadbeef);
> + assert(val == 0xdeadbeef);
> +
> + /* TCG does not count instructions around syscalls correctly */
> + report_kfail(host_is_tcg, pmc5_1 != pmc5_2 + 1,
> + "PMC5 counts instructions with ldat");
> +}
Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40 Nicholas Piggin
@ 2024-06-19 7:35 ` Thomas Huth
0 siblings, 0 replies; 27+ messages in thread
From: Thomas Huth @ 2024-06-19 7:35 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> QEMU has fixed a number of powerpc test fails in Fedora 40, so upgrade
> to that image.
>
> Other architectures seem to be okay with Fedora 40 except for x86-64,
> which fails some xsave and realmode tests, so only change powerpc to
> start with.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> .gitlab-ci.yml | 2 ++
> 1 file changed, 2 insertions(+)
FYI, I've pushed now the generic patch to bump all jobs to F40, so I think
you can drop this one here from your queue now.
Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure Nicholas Piggin
@ 2024-06-19 7:36 ` Thomas Huth
0 siblings, 0 replies; 27+ messages in thread
From: Thomas Huth @ 2024-06-19 7:36 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> This moves merges ppc64 directories and files into powerpc, and
> merges the 3 makefiles into one.
>
> The configure --arch=powerpc option is aliased to ppc64 for
> good measure.
>
> Acked-by: Thomas Huth <thuth@redhat.com>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
Seems like this patch does not apply cleanly anymore, could you please rebase?
Thanks,
Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test Nicholas Piggin
@ 2024-06-19 7:42 ` Thomas Huth
0 siblings, 0 replies; 27+ messages in thread
From: Thomas Huth @ 2024-06-19 7:42 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> This adds a simple panic test for pseries and powernv that works with
> TCG (unlike the s390x panic tests), making it easier to test this part
> of the harness code.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> lib/powerpc/asm/rtas.h | 1 +
> lib/powerpc/rtas.c | 16 ++++++++++++++++
> powerpc/run | 2 +-
> powerpc/selftest.c | 18 ++++++++++++++++--
> powerpc/unittests.cfg | 5 +++++
> 5 files changed, 39 insertions(+), 3 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with Fedora 40
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with " Nicholas Piggin
@ 2024-06-19 7:44 ` Thomas Huth
0 siblings, 0 replies; 27+ messages in thread
From: Thomas Huth @ 2024-06-19 7:44 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On 12/06/2024 07.23, Nicholas Piggin wrote:
> With Fedora 40 (QEMU 8.2), more tests can be enabled.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> .gitlab-ci.yml | 2 +-
> powerpc/unittests.cfg | 17 ++++++++---------
> 2 files changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index ffb3767ec..ee14330a3 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -110,7 +110,7 @@ build-ppc64le:
> extends: .intree_template
> image: fedora:40
> script:
> - - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat
> + - dnf install -y qemu-system-ppc gcc-powerpc64-linux-gnu nmap-ncat jq
Please mention the addition of jq in the patch description (why it is needed).
Thanks,
Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests
2024-06-18 18:39 ` Thomas Huth
@ 2024-06-25 1:56 ` Nicholas Piggin
0 siblings, 0 replies; 27+ messages in thread
From: Nicholas Piggin @ 2024-06-25 1:56 UTC (permalink / raw)
To: Thomas Huth; +Cc: Laurent Vivier, linuxppc-dev, kvm, Andrew Jones
On Wed Jun 19, 2024 at 4:39 AM AEST, Thomas Huth wrote:
> On 12/06/2024 07.23, Nicholas Piggin wrote:
> > Add some initial PMU testing.
> >
> > - PMC5/6 tests
> > - PMAE / PMI test
> > - BHRB basic tests
> >
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> ...
> > diff --git a/powerpc/pmu.c b/powerpc/pmu.c
> > new file mode 100644
> > index 000000000..bdc45e167
> > --- /dev/null
> > +++ b/powerpc/pmu.c
> > @@ -0,0 +1,562 @@
> ...
> > +static void test_pmc5_with_ldat(void)
> > +{
> > + unsigned long pmc5_1, pmc5_2;
> > + register unsigned long r4 asm("r4");
> > + register unsigned long r5 asm("r5");
> > + register unsigned long r6 asm("r6");
> > + uint64_t val;
> > +
> > + reset_mmcr0();
> > + mtspr(SPR_PMC5, 0);
> > + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > + asm volatile(".rep 20 ; nop ; .endr" ::: "memory");
> > + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > + pmc5_1 = mfspr(SPR_PMC5);
> > +
> > + val = 0xdeadbeef;
> > + r4 = 0;
> > + r5 = 0xdeadbeef;
> > + r6 = 100;
> > + reset_mmcr0();
> > + mtspr(SPR_PMC5, 0);
> > + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) & ~(MMCR0_FC | MMCR0_FC56));
> > + asm volatile(".rep 10 ; nop ; .endr ; ldat %0,%3,0x10 ; .rep 10 ; nop ; .endr" : "=r"(r4), "+r"(r5), "+r"(r6) : "r"(&val) :"memory");
>
> Looks like older versions of Clang do not like this instruction:
>
> /tmp/pmu-4fda98.s: Assembler messages:
> /tmp/pmu-4fda98.s:1685: Error: unrecognized opcode: `ldat'
> clang-13: error: assembler command failed with exit code 1 (use -v to see
> invocation)
>
> Could you please work-around that issue?
Ah, just catching up with this -- thanks for working it out.
I will fix.
>
> Also, please break the very long line here. Thanks!
Sure.
Thanks,
Nick
>
> > + mtspr(SPR_MMCR0, mfspr(SPR_MMCR0) | (MMCR0_FC | MMCR0_FC56));
> > + pmc5_2 = mfspr(SPR_PMC5);
> > + assert(r4 == 0xdeadbeef);
> > + assert(val == 0xdeadbeef);
> > +
> > + /* TCG does not count instructions around syscalls correctly */
> > + report_kfail(host_is_tcg, pmc5_1 != pmc5_2 + 1,
> > + "PMC5 counts instructions with ldat");
> > +}
>
> Thomas
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2024-06-25 1:57 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-06-12 5:23 [kvm-unit-tests PATCH v10 00/15] powerpc improvements Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 01/15] powerpc: Add facility to query TCG or KVM host Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 02/15] powerpc: Add atomics tests Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 03/15] powerpc: Add timebase tests Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 04/15] powerpc: Add MMU support Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 05/15] common/sieve: Support machines without MMU Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 06/15] powerpc: Add sieve.c common test Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 07/15] powerpc: add usermode support Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 08/15] powerpc: add pmu tests Nicholas Piggin
2024-06-18 15:20 ` Thomas Huth
2024-06-18 18:39 ` Thomas Huth
2024-06-25 1:56 ` Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 09/15] configure: Make arch_libdir a first-class entity Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 10/15] powerpc: Remove remnants of ppc64 directory and build structure Nicholas Piggin
2024-06-19 7:36 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 11/15] powerpc: gitlab CI update Nicholas Piggin
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 12/15] scripts/arch-run.bash: Fix run_panic() success exit status Nicholas Piggin
2024-06-12 7:26 ` Andrew Jones
2024-06-14 0:56 ` Nicholas Piggin
2024-06-17 14:12 ` Andrew Jones
2024-06-17 14:13 ` Andrew Jones
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 13/15] powerpc: Add a panic test Nicholas Piggin
2024-06-19 7:42 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 14/15] powerpc/gitlab-ci: Upgrade powerpc to Fedora 40 Nicholas Piggin
2024-06-19 7:35 ` Thomas Huth
2024-06-12 5:23 ` [kvm-unit-tests PATCH v10 15/15] powerpc/gitlab-ci: Enable more tests with " Nicholas Piggin
2024-06-19 7:44 ` Thomas Huth
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