From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id AAC1DB708F for ; Tue, 14 Jul 2009 02:07:13 +1000 (EST) MIME-Version: 1.0 In-Reply-To: References: <6213bc560907130016n2f2d5066t3dc88032200da8ef@mail.gmail.com> <6213bc560907130839t36e28d5fr34191ccb290c9cf8@mail.gmail.com> Date: Mon, 13 Jul 2009 21:37:11 +0530 Message-ID: <6213bc560907130907s72a5396cqa843e53ed21d19cf@mail.gmail.com> Subject: Re: Soft Reset for PPC44x Virtex 5 hangs saying Restarting System From: srikanth krishnakar To: Grant Likely Content-Type: multipart/alternative; boundary=000e0cd20ddcc34198046e9883c6 Cc: Linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --000e0cd20ddcc34198046e9883c6 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit On Mon, Jul 13, 2009 at 9:31 PM, Grant Likely wrote: > On Mon, Jul 13, 2009 at 9:39 AM, srikanth > krishnakar wrote: > > > > > > On Mon, Jul 13, 2009 at 8:32 PM, Grant Likely > > > wrote: > >> > >> On Mon, Jul 13, 2009 at 1:16 AM, srikanth > >> krishnakar wrote: > >> > Hi all, > >> > > >> > Kernel : Linux-2.6.29 > >> > Arch: Powerpc (ppc44x) > >> > Target: Xilinx ML507 Virtex5 > >> > > >> > I have an issue in "Reset System" of Xilinx ML507 target board. I am > >> > using > >> > Compact Flash to boot the target ( using system ACE file to boot the > >> > target), during the process reset or reboot command on the target, I > am > >> > not > >> > able to reboot the target completely, here is the snapshot: > >> > >> Where is your boot code located? In BRAM? or SDRAM? > > > > It is located in BRAM. > > > > Then most likely the process of booting modifies the initial data in > BRAM such that it will not be able to reboot the system. > > > How can I reboot the system, while resetting the FPGA core completely ? > > To reset and reconfigure the FPGA, you need to modify the systemace > driver to provide a system reset routine. See the systemace user > manual for details on how to do this. > > g. > > -- > Grant Likely, B.Sc., P.Eng. > Secret Lab Technologies Ltd. > Thank You very much. Will look into it. Regards Srikanth Krishnakar ********************** --000e0cd20ddcc34198046e9883c6 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable

On Mon, Jul 13, 2009 at 9:31 PM, Grant L= ikely <gr= ant.likely@secretlab.ca> wrote:
On Mon, Jul 13, 2009 at 9:39 AM, srikanth
krishnakar<sk= rishnakar@gmail.com> wrote:
>
>
> On Mon, Jul 13, 2009 at 8:32 PM, Grant Likely <grant.likely@secretlab.ca>
> wrote:
>>
>> On Mon, Jul 13, 2009 at 1:16 AM, srikanth
>> krishnakar<skrishnakar= @gmail.com> wrote:
>> > Hi all,
>> >
>> > Kernel : Linux-2.6.29
>> > Arch: Powerpc (ppc44x)
>> > Target: Xilinx ML507 Virtex5
>> >
>> > I have an issue in "Reset System" of Xilinx ML507 t= arget board. I am
>> > using
>> > Compact Flash to boot the target ( using system ACE file to b= oot the
>> > target), during the process reset or reboot command on the ta= rget, I am
>> > not
>> > able to reboot the target completely, here is the snapshot: >>
>> Where is your boot code located? =A0In BRAM? =A0or SDRAM?
>
> It is located in BRAM.
>

Then most likely the process of booting modifies the initial data in<= br> BRAM such that it will not be able to reboot the system.

> How can I reboot the system, while resetting the FPGA core completely = ?

To reset and reconfigure the FPGA, you need to modify the systemace driver to provide a system reset routine. =A0See the systemace user
manual for details on how to do this.

g.

--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Thank You very much.

Will look in= to it.

Regards
Srikanth Krishnakar
*************= *********
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