From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C4477DDF6B for ; Wed, 25 Mar 2009 07:54:34 +1100 (EST) Message-Id: <651BE815-4BF6-4AA3-AA43-C0B7C98A0FCC@kernel.crashing.org> From: Kumar Gala To: Johns Daniel In-Reply-To: Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Mime-Version: 1.0 (Apple Message framework v930.3) Subject: Re: PCIe interrupts in the device tree Date: Tue, 24 Mar 2009 15:54:26 -0500 References: Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Mar 24, 2009, at 3:24 PM, Johns Daniel wrote: > Could somebody please explain the declaration of the PCIe interrupts > in the device tree? > > I was under the impression that PCIe interrupts in the PowerPC Linux > kernel default to using INTx signaling (vs. external IRQ pin assertion > and MSI signaling). Am I right? > > If so, then do the interrupt-map lines in the DTS refer to the > internal IRQ used by Freescale processors to implement INTx virtual > wire interrupts? > > For example, in the mpc8536ds.dts file, under "pci1: pcie@ffe09000" > we have: > interrupt-map = < > /* IDSEL 0x0 */ > 0000 0 0 1 &mpic 4 1 > 0000 0 0 2 &mpic 5 1 > 0000 0 0 3 &mpic 6 1 > 0000 0 0 4 &mpic 7 1 > >; > Are the 4, 5, 6, and 7 internal or external IRQs? The .dts and linux make no distinction between internal & external IRQs. This is a silly artifact of Freescale UMs. IRQ 0 starts at offset 0x50000 and each 0x20 offset is another IRQ. So typically External 0 == IRQ0, Internal 0 == IRQ16. So this says that Ext 4, 5, 6, 7 and wired to INTA, INTB, INTC, INTD for this particular PCIe controller. > And the "msi@41600" section in the same mpc8536ds.dts file does NOT > affect PCIe interrupts unless a driver calls pci_enable_msi()? correct. - k