misaligned load/store in ppc32 memcpy

misaligned load/store in ppc32 memcpy

[Kumar Gala]

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Re: misaligned load/store in ppc32 memcpy

[Mark Nelson]

Hi Kumar,

On Wednesday 01 July 2009 07:56:31 Kumar Gala wrote:
> Mark,
> 
> Ben pointed me to you regarding my question if we should be expecting misaligned load/store operations in the ppc32 mempcy that exists in copy_32.S.
> 
> (To be more specific, I'm seeing this behavior and wondering if we really should have memcpy avoid doing word size ld/st if the addresses aren't also aligned)
> 

That's a good question; but because I don't really know very much about the
ppc32 cores that this memcpy routine was written and tested with (let alone
the newer embedded variations) I'll CC Paul and hopefully he can let us know :)

Thanks!
Mark

Re: misaligned load/store in ppc32 memcpy

[Paul Mackerras]

Kumar Gala writes:

>    Ben pointed me to you regarding my question if we should be expecting
>    misaligned load/store operations in the ppc32 mempcy that exists in
>    copy_32.S.
>    (To be more specific, I'm seeing this behavior and wondering if we
>    really should have memcpy avoid doing word size ld/st if the addresses
>    aren't also aligned)

We align the destination to a word boundary using byte-by-byte copies,
then copy words using word loads and stores.  The loads may be
misaligned, but they are still faster than doing aligned loads and
shuffling the bits around - or at least they were when measured the
speed 10 years or so ago, which would have been on 750 or 74xx cpus.

If the penalty for unaligned loads on Freescale embedded cores is high
enough that it's faster to shuffle the bits or to copy byte-by-byte
then we can have an alternative version for them.

Paul.