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From: Kumar Gala <kumar.gala@freescale.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Subject: Re: [PATCH 0/9] powerpc: Preliminary work to enable SMP BookE
Date: Tue, 9 Dec 2008 07:17:33 -0600
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On Dec 7, 2008, at 11:39 PM, Benjamin Herrenschmidt wrote:

> This series of patches is aimed at supporting SMP on non-hash
> based processors. It consists of a rework of the MMU context
> management and TLB management, clearly splitting hash32, hash64
> and nohash in both cases, adding SMP safe context handling and
> some basic SMP TLB management.
>
> There is room for improvements, such as implementing lazy TLB
> flushing on processors without invalidate-by-PID support HW,
> some better IPI mechanism, support for variable sizes PID,
> lock less fast path in the MMU context switch, etc...
> but it should basically work.
>
> There are some semingly unrelated patches in the pile as they
> are dependencies of the main ones so I'm including them in.

You'll be happy to know these patches at least boot on real 85xx SMP HW.

- k