m8260_map_io

m8260_map_io

[aldo lab]

Hi all,

I've seen a region of 256MB starting from 0xe0000000 that is io
blocking with a BAT filled with Inhibit cache and guarded.
do you know which is the reason of this mapping because is not so
clear from the code.

201 static void __init
202 m8260_map_io(void)
203 {
204         uint addr;
205
206         /* Map IMMR region to a 256MB BAT */
207         addr = (cpm2_immr != NULL) ? (uint)cpm2_immr : CPM_MAP_ADDR;
208         io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);
209
210         /* Map I/O region to a 256MB BAT */
211         io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO);
212 }
213



Thank you
Aldo

Re: m8260_map_io

[Sergei Shtylyov]

Hello.

aldo lab wrote:

> I've seen a region of 256MB starting from 0xe0000000 that is io
> blocking with a BAT filled with Inhibit cache and guarded.
> do you know which is the reason of this mapping because is not so
> clear from the code.
> 
> 201 static void __init
> 202 m8260_map_io(void)
> 203 {
> 204         uint addr;
> 205
> 206         /* Map IMMR region to a 256MB BAT */
> 207         addr = (cpm2_immr != NULL) ? (uint)cpm2_immr : CPM_MAP_ADDR;
> 208         io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);
> 209
> 210         /* Map I/O region to a 256MB BAT */
> 211         io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO);
> 212 }
> 213

    MPC82xx SoC registers are mapped there.

> Thank you
> Aldo

WBR, Sergei

Re: m8260_map_io

[aldo lab]

Hi Sergei,

There are several option that you can set for internal register of mpc8280 =
:

13=9615 ISB Initial internal space base select. Defines the initial
value of IMMR[0=9614] and determines the
base address of the internal memory space.
000 0x0000_0000
001 0x00F0_0000
010 0x0F00_0000
011 0x0FF0_0000
100 0xF000_0000
101 0xF0F0_0000
110 0xFF00_0000
111 0xFFF0_0000
See Section 4.3.2.7, "Internal Memory Map Register (IMMR)."

and 0xe0000000 is not mentioned so I'm not sure that you said is correct.
Infact the line of code that map internal register is :

/* Map IMMR region to a 256MB BAT */
> > 207         addr =3D (cpm2_immr !=3D NULL) ? (uint)cpm2_immr : CPM_MAP_=
ADDR;
> > 208         io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);

and for ADS the value is 0xf000000
instead what I was referring is:


    /* Map I/O region to a 256MB BAT */
> > 211         io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _P=
AGE_IO);

where IO_VIRT_ADDR is equal to 0xe0000000, you can find it in
include/asm-ppc/mpc8260.h

59
60 /* Map 256MB I/O region
61  */
62 #ifndef IO_PHYS_ADDR
63 #define IO_PHYS_ADDR    0xe0000000
64 #endif
65 #ifndef IO_VIRT_ADDR
66 #define IO_VIRT_ADDR    IO_PHYS_ADDR
67 #endif
68

Reading manual of pq2fads-zu and other manual like mpc8272ads the
0xe0000000 region is marked as empty.

Regards
AS


On 3/16/07, Sergei Shtylyov <sshtylyov@ru.mvista.com> wrote:
> Hello.
>
> aldo lab wrote:
>
> > I've seen a region of 256MB starting from 0xe0000000 that is io
> > blocking with a BAT filled with Inhibit cache and guarded.
> > do you know which is the reason of this mapping because is not so
> > clear from the code.
> >
> > 201 static void __init
> > 202 m8260_map_io(void)
> > 203 {
> > 204         uint addr;
> > 205
> > 206         /* Map IMMR region to a 256MB BAT */
> > 207         addr =3D (cpm2_immr !=3D NULL) ? (uint)cpm2_immr : CPM_MAP_=
ADDR;
> > 208         io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);
> > 209
> > 210         /* Map I/O region to a 256MB BAT */
> > 211         io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _P=
AGE_IO);
> > 212 }
> > 213
>
>    MPC82xx SoC registers are mapped there.
>
> > Thank you
> > Aldo
>
> WBR, Sergei
>