From: Christian Borntraeger <borntraeger@linux.ibm.com>
To: Gerald Schaefer <gerald.schaefer@linux.ibm.com>,
David Hildenbrand <david@redhat.com>
Cc: x86@kernel.org, Jan Kara <jack@suse.cz>,
Catalin Marinas <catalin.marinas@arm.com>,
Yang Shi <shy828301@gmail.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Xu <peterx@redhat.com>, Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, Donald Dutile <ddutile@redhat.com>,
Liang Zhang <zhangliang5@huawei.com>,
Borislav Petkov <bp@alien8.de>,
Alexander Gordeev <agordeev@linux.ibm.com>,
Will Deacon <will@kernel.org>, Christoph Hellwig <hch@lst.de>,
Paul Mackerras <paulus@samba.org>,
Andrea Arcangeli <aarcange@redhat.com>,
linux-s390@vger.kernel.org, Vasily Gorbik <gor@linux.ibm.com>,
Rik van Riel <riel@surriel.com>, Hugh Dickins <hughd@google.com>,
Matthew Wilcox <willy@infradead.org>,
Mike Rapoport <rppt@linux.ibm.com>,
Ingo Molnar <mingo@redhat.com>,
linux-arm-kernel@lists.infradead.org,
Jason Gunthorpe <jgg@nvidia.com>,
David Rientjes <rientjes@google.com>,
Pedro Gomes <pedrodemargomes@gmail.com>,
Jann Horn <jannh@google.com>, John Hubbard <jhubbard@nvidia.com>,
Heiko Carstens <hca@linux.ibm.com>,
Shakeel Butt <shakeelb@google.com>,
Oleg Nesterov <oleg@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Vlastimil Babka <vbabka@suse.cz>,
Oded Gabbay <oded.gabbay@gmail.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Nadav Amit <namit@vmware.com>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Roman Gushchin <guro@fb.com>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
Mike Kravetz <mike.kravetz@oracle.com>
Subject: Re: [PATCH v1 5/7] s390/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE
Date: Wed, 16 Mar 2022 14:01:07 +0100 [thread overview]
Message-ID: <6f7b208b-ec38-571d-cd24-b9bfa79d1f40@linux.ibm.com> (raw)
In-Reply-To: <20220316115654.12823b78@thinkpad>
Am 16.03.22 um 11:56 schrieb Gerald Schaefer:
> On Tue, 15 Mar 2022 18:12:16 +0100
> David Hildenbrand <david@redhat.com> wrote:
>
>> On 15.03.22 17:58, David Hildenbrand wrote:
>>>
>>>>> This would mean that it is not OK to have bit 52 not zero for swap PTEs.
>>>>> But if I read the POP correctly, all bits except for the DAT-protection
>>>>> would be ignored for invalid PTEs, so maybe this comment needs some update
>>>>> (for both bits 52 and also 55).
>>>>>
>>>>> Heiko might also have some more insight.
>>>>
>>>> Indeed, I wonder why we should get a specification exception when the
>>>> PTE is invalid. I'll dig a bit into the PoP.
>>>
>>> SA22-7832-12 6-46 ("Translation-Specification Exception") is clearer
>>>
>>> "The page-table entry used for the translation is
>>> valid, and bit position 52 does not contain zero."
>>>
>>> "The page-table entry used for the translation is
>>> valid, EDAT-1 does not apply, the instruction-exe-
>>> cution-protection facility is not installed, and bit
>>> position 55 does not contain zero. It is model
>>> dependent whether this condition is recognized."
>>>
>>
>> I wonder if the following matches reality:
>>
>> diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
>> index 008a6c856fa4..6a227a8c3712 100644
>> --- a/arch/s390/include/asm/pgtable.h
>> +++ b/arch/s390/include/asm/pgtable.h
>> @@ -1669,18 +1669,16 @@ static inline int has_transparent_hugepage(void)
>> /*
>> * 64 bit swap entry format:
>> * A page-table entry has some bits we have to treat in a special way.
>> - * Bits 52 and bit 55 have to be zero, otherwise a specification
>> - * exception will occur instead of a page translation exception. The
>> - * specification exception has the bad habit not to store necessary
>> - * information in the lowcore.
>> * Bits 54 and 63 are used to indicate the page type.
>> * A swap pte is indicated by bit pattern (pte & 0x201) == 0x200
>> - * This leaves the bits 0-51 and bits 56-62 to store type and offset.
>> - * We use the 5 bits from 57-61 for the type and the 52 bits from 0-51
>> - * for the offset.
>> - * | offset |01100|type |00|
>> + * | offset |XX1XX|type |S0|
>> * |0000000000111111111122222222223333333333444444444455|55555|55566|66|
>> * |0123456789012345678901234567890123456789012345678901|23456|78901|23|
>> + *
>> + * Bits 0-51 store the offset.
>> + * Bits 57-62 store the type.
>> + * Bit 62 (S) is used for softdirty tracking.
>> + * Bits 52, 53, 55 and 56 (X) are unused.
>> */
>>
>> #define __SWP_OFFSET_MASK ((1UL << 52) - 1)
>>
>>
>> I'm not sure why bit 53 was indicated as "1" and bit 55 was indicated as
>> "0". At least for 52 and 55 there was a clear description.
>
> Bit 53 is the invalid bit, and that is always 1 for swap ptes, in addition
> to protection bit 54. Bit 55, along with bit 52, has to be zero according
> to the (potentially deprecated) comment.
>
> It is interesting that bit 56 seems to be unused, at least according
> to the comment, but that would also mention bit 62 as unused, so that
> clearly needs some update.
>
> If bit 56 could be used for _PAGE_SWP_EXCLUSIVE, that would be better
> than stealing a bit from the offset, or using potentially dangerous
> bit 52. It is defined as _PAGE_UNUSED and only used for kvm, not sure
> if this is also relevant for swap ptes, similar to bit 62.
>
> Adding Christian on cc, maybe he has some insight on _PAGE_UNUSED
> bit 56 and swap ptes.
I think _PAGE_UNUSED is not used for swap ptes. It is used _before_ swapping
to decide whether we swap or discard the page.
Regarding bit 52, the POP says in chapter 3 for the page table entry
[..]
Page-Invalid Bit (I): Bit 53 controls whether the
page associated with the page-table entry is avail-
able. When the bit is zero, address translation pro-
ceeds by using the page-table entry. When the bit is
one, the page-table entry cannot be used for transla-
tion.
-->When the page-invalid bit is one, all other bits in the
-->page-table entry are available for use by program-
-->ming.
this was added with the z14 POP, but I guess it was just a clarification
and should be valid for older machines as well.
So 52 and 56 should be ok, with 52 probably the better choice.
PS: the page protect bit is special and should not be used (bit54) for
KVM related reasons
next prev parent reply other threads:[~2022-03-16 13:03 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-15 14:18 [PATCH v1 0/7] mm: COW fixes part 3: reliable GUP R/W FOLL_GET of anonymous pages David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 1/7] mm/swap: remember PG_anon_exclusive via a swp pte bit David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 2/7] mm/debug_vm_pgtable: add tests for __HAVE_ARCH_PTE_SWP_EXCLUSIVE David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 3/7] x86/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 4/7] arm64/pgtable: " David Hildenbrand
2022-03-16 18:27 ` Catalin Marinas
2022-03-17 10:04 ` David Hildenbrand
2022-03-17 17:58 ` Catalin Marinas
2022-03-18 9:59 ` David Hildenbrand
2022-03-18 11:33 ` Catalin Marinas
2022-03-18 14:14 ` David Hildenbrand
2022-03-21 14:38 ` Will Deacon
2022-03-21 14:39 ` Will Deacon
2022-03-21 15:07 ` David Hildenbrand
2022-03-21 17:44 ` Will Deacon
2022-03-21 18:27 ` Catalin Marinas
2022-03-22 9:46 ` David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 5/7] s390/pgtable: " David Hildenbrand
2022-03-15 16:21 ` Gerald Schaefer
2022-03-15 16:37 ` David Hildenbrand
2022-03-15 16:58 ` David Hildenbrand
2022-03-15 17:12 ` David Hildenbrand
2022-03-15 17:14 ` David Hildenbrand
2022-03-16 10:56 ` Gerald Schaefer
2022-03-16 11:06 ` David Hildenbrand
2022-03-16 13:01 ` Christian Borntraeger [this message]
2022-03-16 13:27 ` Gerald Schaefer
2022-03-16 14:00 ` David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 6/7] powerpc/pgtable: remove _PAGE_BIT_SWAP_TYPE for book3s David Hildenbrand
2022-03-15 14:18 ` [PATCH v1 7/7] powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE " David Hildenbrand
2022-03-18 23:48 ` [PATCH v1 0/7] mm: COW fixes part 3: reliable GUP R/W FOLL_GET of anonymous pages Jason Gunthorpe
2022-03-19 11:17 ` David Hildenbrand
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