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* Problems with access to PCI on MVME3100
@ 2007-05-23  6:48 Johan Borkhuis
  2007-05-23 20:12 ` Bhupender Saharan
  0 siblings, 1 reply; 2+ messages in thread
From: Johan Borkhuis @ 2007-05-23  6:48 UTC (permalink / raw)
  To: linuxppc-embedded

Hello,

I am working on porting a PCI driver from I386-Linux to PPC (MVME-3100). 
The device is a Reflective Memory card (VMIC 5565), and we use a driver 
based on the standard Linux driver, provided by the supplier.

I try to start a DMA transfer (using the DMA engine on the PCI card) 
from user space, but then I get a PCI Error. The following data is 
displayed:
PCI Error!
PCI ERROR DETECT REG 0x00000042
PCI ERROR ADDRESS REG 0x00fffa00
PCI ERROR EXT ADDRESS REG 0x00000000
PCI ERROR ATTRIBUTES REG 0x0000c001
PCI ERROR DATA HIGH REG 0x60010004
PCI ERROR DATA LOW REG 0x10060020
PCI STATUS REG 0x0000
PCI GASKET TIMER REG 0x00003fff
PCI PCIX TIMER REG 0x01ffffff

Access to the registers from kernel mode is no problem. I did an mmap to 
map the registers into user space, and then access the registers as an 
array of chars or ints. Is there a limitation in access to PCI registers 
from user space on PPC?

When I try to do this in kernel mode I don't get any errors, but the 
transfer is not started. I am not sure if this is a SW problem, or that 
it might be caused by the PCI-PCI bridge.

The code runs perfectly on a I386 platform, and I use read[bwl] and 
write[bwl] to access the registers, so this should fix the endianess 
problems that exist.

Below is the PCI information from the card:
01:00.0 Network controller: VMIC: Unknown device 5565 (rev 01)
       Subsystem: PLX Technology, Inc.: Unknown device 9656
       Flags: 66Mhz, medium devsel, IRQ 52
       Memory at 00000000dfeffe00 (32-bit, non-prefetchable) [size=512]
       I/O ports at e0ffff00 [size=256]
       Memory at 00000000dfeffdc0 (32-bit, non-prefetchable) [size=64]
       Memory at 00000000d8000000 (32-bit, non-prefetchable) [size=64M]
       Capabilities: [40] Power Management version 2
       Capabilities: [48] #00 [0080]

Kind regards,
    Johan Borkhuis

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: Problems with access to PCI on MVME3100
  2007-05-23  6:48 Problems with access to PCI on MVME3100 Johan Borkhuis
@ 2007-05-23 20:12 ` Bhupender Saharan
  0 siblings, 0 replies; 2+ messages in thread
From: Bhupender Saharan @ 2007-05-23 20:12 UTC (permalink / raw)
  To: Johan Borkhuis; +Cc: linuxppc-embedded

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Hi Johan,

>From the pci log it looks like that BAR registers are not mapped properly by
the BIOS/U-boot. Looks like you have 3 BARS which are asking for memory, But
that are not spaced apart propoerly. Mean physical address difference
between BAR0 and BAR2 shall be 512 Megabyte, but that is not what it is
programmed.

Need to fix up the memory allocation first. then we need to see if the DMA
descriptor are defimed propoerly. As you are saying you are porting the
driver from X-86 to PPC. SO endian coversion is required.....

Regards
Bhupi









On 5/22/07, Johan Borkhuis <j.borkhuis@dutchspace.nl> wrote:
>
> Hello,
>
> I am working on porting a PCI driver from I386-Linux to PPC (MVME-3100).
> The device is a Reflective Memory card (VMIC 5565), and we use a driver
> based on the standard Linux driver, provided by the supplier.
>
> I try to start a DMA transfer (using the DMA engine on the PCI card)
> from user space, but then I get a PCI Error. The following data is
> displayed:
> PCI Error!
> PCI ERROR DETECT REG 0x00000042
> PCI ERROR ADDRESS REG 0x00fffa00
> PCI ERROR EXT ADDRESS REG 0x00000000
> PCI ERROR ATTRIBUTES REG 0x0000c001
> PCI ERROR DATA HIGH REG 0x60010004
> PCI ERROR DATA LOW REG 0x10060020
> PCI STATUS REG 0x0000
> PCI GASKET TIMER REG 0x00003fff
> PCI PCIX TIMER REG 0x01ffffff
>
> Access to the registers from kernel mode is no problem. I did an mmap to
> map the registers into user space, and then access the registers as an
> array of chars or ints. Is there a limitation in access to PCI registers
> from user space on PPC?
>
> When I try to do this in kernel mode I don't get any errors, but the
> transfer is not started. I am not sure if this is a SW problem, or that
> it might be caused by the PCI-PCI bridge.
>
> The code runs perfectly on a I386 platform, and I use read[bwl] and
> write[bwl] to access the registers, so this should fix the endianess
> problems that exist.
>
> Below is the PCI information from the card:
> 01:00.0 Network controller: VMIC: Unknown device 5565 (rev 01)
>        Subsystem: PLX Technology, Inc.: Unknown device 9656
>        Flags: 66Mhz, medium devsel, IRQ 52
>        Memory at 00000000dfeffe00 (32-bit, non-prefetchable) [size=512]
>        I/O ports at e0ffff00 [size=256]
>        Memory at 00000000dfeffdc0 (32-bit, non-prefetchable) [size=64]
>        Memory at 00000000d8000000 (32-bit, non-prefetchable) [size=64M]
>        Capabilities: [40] Power Management version 2
>        Capabilities: [48] #00 [0080]
>
> Kind regards,
>     Johan Borkhuis
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>

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^ permalink raw reply	[flat|nested] 2+ messages in thread

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2007-05-23  6:48 Problems with access to PCI on MVME3100 Johan Borkhuis
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