linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, Jon Pan-Doh <pandoh@google.com>,
	 Karolina Stolarek <karolina.stolarek@oracle.com>,
	 Martin Petersen <martin.petersen@oracle.com>,
	 Ben Fuller <ben.fuller@oracle.com>,
	Drew Walton <drewwalton@microsoft.com>,
	 Anil Agrawal <anilagrawal@meta.com>,
	Tony Luck <tony.luck@intel.com>,
	 Sathyanarayanan Kuppuswamy
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	 Lukas Wunner <lukas@wunner.de>,
	 Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	 Sargun Dhillon <sargun@meta.com>,
	"Paul E . McKenney" <paulmck@kernel.org>,
	 Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	 Oliver O'Halloran <oohall@gmail.com>,
	Kai-Heng Feng <kaihengf@nvidia.com>,
	 Keith Busch <kbusch@kernel.org>,
	Robert Richter <rrichter@amd.com>,
	 Terry Bowman <terry.bowman@amd.com>,
	Shiju Jose <shiju.jose@huawei.com>,
	 Dave Jiang <dave.jiang@intel.com>,
	LKML <linux-kernel@vger.kernel.org>,
	 linuxppc-dev@lists.ozlabs.org,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v6 14/16] PCI/AER: Introduce ratelimit for error logs
Date: Wed, 21 May 2025 12:57:12 +0300 (EEST)	[thread overview]
Message-ID: <741055cc-42bd-2e84-20eb-a4345753fcbc@linux.intel.com> (raw)
In-Reply-To: <20250520193819.GA1318016@bhelgaas>

[-- Attachment #1: Type: text/plain, Size: 5678 bytes --]

On Tue, 20 May 2025, Bjorn Helgaas wrote:

> On Tue, May 20, 2025 at 02:55:32PM +0300, Ilpo Järvinen wrote:
> > On Mon, 19 May 2025, Bjorn Helgaas wrote:
> > 
> > > From: Jon Pan-Doh <pandoh@google.com>
> > > 
> > > Spammy devices can flood kernel logs with AER errors and slow/stall
> > > execution. Add per-device ratelimits for AER correctable and uncorrectable
> > > errors that use the kernel defaults (10 per 5s).
> > > 
> > > There are two AER logging entry points:
> > > 
> > >   - aer_print_error() is used by DPC and native AER
> > > 
> > >   - pci_print_aer() is used by GHES and CXL
> > > 
> > > The native AER aer_print_error() case includes a loop that may log details
> > > from multiple devices.  This is ratelimited by the union of ratelimits for
> > > these devices, set by add_error_device(), which collects the devices.  If
> > > no such device is found, the Error Source message is ratelimited by the
> > > Root Port or RCEC that received the ERR_* message.
> > > 
> > > The DPC aer_print_error() case is currently not ratelimited.
> > > 
> > > The GHES and CXL pci_print_aer() cases are ratelimited by the Error Source
> > > device.
> 
> > >  static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
> > >  {
> > > +	/*
> > > +	 * Ratelimit AER log messages.  Generally we add the Error Source
> > > +	 * device, but there are is_error_source() cases that can result in
> > > +	 * multiple devices being added here, so we OR them all together.
> > 
> > I can see the code uses OR ;-) but I wasn't helpful because this comment 
> > didn't explain why at all. As this ratelimit thing is using reverse logic 
> > to begin with, this is a very tricky bit.
> > 
> > Perhaps something less vague like:
> > 
> > ... we ratelimit if all devices have reached their ratelimit.
> > 
> > Assuming that was the intention here? (I'm not sure.)
> 
> My intention was that if there's any downstream device that has an
> unmasked error logged and it has not reached its ratelimit, we should
> log messages for all devices with errors logged.  Does something like
> this help?
> 
>   /*
>    * Ratelimit AER log messages.  "dev" is either the source
>    * identified by the root's Error Source ID or it has an unmasked
>    * error logged in its own AER Capability.  If any of these devices
>    * has not reached its ratelimit, log messages for all of them.
>    * Messages are emitted when e_info->ratelimit is non-zero.
>    *
>    * Note that e_info->ratelimit was already initialized to 1 for the
>    * ERR_FATAL case.
>    */

Yes, this is much clearer of intent, thanks.

> The ERR_FATAL case is from this post-v6 change that I haven't posted
> yet:
> 
>   aer_isr_one_error(...)
>   {
>     ...
>     if (status & PCI_ERR_ROOT_UNCOR_RCV) {
>       int fatal = status & PCI_ERR_ROOT_FATAL_RCV;
>       struct aer_err_info e_info = {
>         ...
>  +      .ratelimit = fatal ? 1 : 0;
> 
> 
> > > +	 */
> > >  	if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
> > >  		e_info->dev[e_info->error_dev_num] = pci_dev_get(dev);
> > > +		e_info->ratelimit |= aer_ratelimit(dev, e_info->severity);
> > >  		e_info->error_dev_num++;
> > >  		return 0;
> > >  	}
> 
> > > @@ -1147,9 +1183,10 @@ static void aer_recover_work_func(struct work_struct *work)
> > >  		pdev = pci_get_domain_bus_and_slot(entry.domain, entry.bus,
> > >  						   entry.devfn);
> > >  		if (!pdev) {
> > > -			pr_err("no pci_dev for %04x:%02x:%02x.%x\n",
> > > -			       entry.domain, entry.bus,
> > > -			       PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn));
> > > +			pr_err_ratelimited("%04x:%02x:%02x.%x: no pci_dev found\n",
> > 
> > This case was not mentioned in the changelog.
> 
> Sharp eyes!  What do you think of this commit log text?
> 
>   The CXL pci_print_aer() case is ratelimited by the Error Source device.
> 
>   The GHES pci_print_aer() case is via aer_recover_work_func(), which
>   searches for the Error Source device.  If the device is not found, there's
>   no per-device ratelimit, so we use a system-wide ratelimit that covers all
>   error types (correctable, non-fatal, and fatal).

Works for me as long as it is mentioned.

> This isn't really ideal because in pci_print_aer(), the struct
> aer_capability_regs has already been filled by firmware and the
> logging doesn't read any registers from the device at all.
> 
> However, pci_print_aer() *does* want the pci_dev for statistics and
> tracing (pci_dev_aer_stats_incr()) and, of course, for the aer_printks
> themselves.

While not a perfect solution, this looks yet another case where it would 
help to create a dummy pci_dev struct with minimal setup which allows 
calling functions that input a pci_dev.

That solution is not perfect because it arms a trap. Downstream 
functions could get changed and if the developer assumes they have a full 
pci_dev at hand, it could cause issues with the dummy pci_dev. How likely
it happens is debatable but for many cases where the call-chain isn't 
overly complex such as here, dummy pci_dev seems helpful.

> We could leave this pr_err() completely alone; hopefully it's a rare
> case.  I think the CXL path just silently skips pci_print_aer() if
> this happens.
> 
> Eventually I would really like the native AER path to start by doing
> whatever firmware is doing, e.g., fill in struct aer_capability_regs,
> so the core of the AER handling could be identical between native AER
> and GHES/CXL.  If we could do that, maybe we could figure out a
> cleaner way to handle this corner case.


-- 
 i.

  reply	other threads:[~2025-05-21 10:05 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-19 21:35 [PATCH v6 00/16] Rate limit AER logs Bjorn Helgaas
2025-05-19 21:35 ` [PATCH v6 01/16] PCI/DPC: Initialize aer_err_info before using it Bjorn Helgaas
2025-05-19 22:41   ` Sathyanarayanan Kuppuswamy
2025-05-20 13:53     ` Bjorn Helgaas
2025-05-20  9:39   ` Ilpo Järvinen
2025-05-20 13:54     ` Bjorn Helgaas
2025-05-19 21:35 ` [PATCH v6 02/16] PCI/DPC: Log Error Source ID only when valid Bjorn Helgaas
2025-05-19 23:15   ` Sathyanarayanan Kuppuswamy
2025-05-20 14:00     ` Bjorn Helgaas
2025-05-20 14:20       ` Ilpo Järvinen
2025-05-20 10:28   ` Ilpo Järvinen
2025-05-20 14:05     ` Bjorn Helgaas
2025-05-19 21:35 ` [PATCH v6 03/16] PCI/AER: Consolidate Error Source ID logging in aer_print_port_info() Bjorn Helgaas
2025-05-19 23:39   ` Sathyanarayanan Kuppuswamy
2025-05-20 14:21     ` Bjorn Helgaas
2025-05-20 10:31   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 04/16] PCI/AER: Extract bus/dev/fn in aer_print_port_info() with PCI_BUS_NUM(), etc Bjorn Helgaas
2025-05-19 23:47   ` Sathyanarayanan Kuppuswamy
2025-05-20 10:32   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 05/16] PCI/AER: Rename aer_print_port_info() to aer_print_source() Bjorn Helgaas
2025-05-19 23:48   ` Sathyanarayanan Kuppuswamy
2025-05-20 10:33   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 06/16] PCI/AER: Move aer_print_source() earlier in file Bjorn Helgaas
2025-05-19 23:49   ` Sathyanarayanan Kuppuswamy
2025-05-20 10:34   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 07/16] PCI/AER: Initialize aer_err_info before using it Bjorn Helgaas
2025-05-19 23:50   ` Sathyanarayanan Kuppuswamy
2025-05-20 10:39   ` Ilpo Järvinen
2025-05-20 14:27     ` Bjorn Helgaas
2025-05-19 21:35 ` [PATCH v6 08/16] PCI/AER: Simplify pci_print_aer() Bjorn Helgaas
2025-05-20  0:02   ` Sathyanarayanan Kuppuswamy
2025-05-20 14:38     ` Bjorn Helgaas
2025-05-20 10:42   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 09/16] PCI/AER: Update statistics early in logging Bjorn Helgaas
2025-05-20  1:32   ` Sathyanarayanan Kuppuswamy
2025-05-20 11:04   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 10/16] PCI/AER: Combine trace_aer_event() with statistics updates Bjorn Helgaas
2025-05-20  1:49   ` Sathyanarayanan Kuppuswamy
2025-05-20 11:08   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 11/16] PCI/AER: Check log level once and remember it Bjorn Helgaas
2025-05-19 23:17   ` Weinan Liu
2025-05-20 14:46     ` Bjorn Helgaas
2025-05-20  2:49   ` Sathyanarayanan Kuppuswamy
2025-05-20 11:26   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 12/16] PCI/AER: Make all pci_print_aer() log levels depend on error type Bjorn Helgaas
2025-05-20  3:23   ` Sathyanarayanan Kuppuswamy
2025-05-20 11:37   ` Ilpo Järvinen
2025-05-20 15:04     ` Bjorn Helgaas
2025-05-19 21:35 ` [PATCH v6 13/16] PCI/AER: Rename struct aer_stats to aer_report Bjorn Helgaas
2025-05-20  3:30   ` Sathyanarayanan Kuppuswamy
2025-05-20 21:25     ` Bjorn Helgaas
2025-05-20 11:38   ` Ilpo Järvinen
2025-05-19 21:35 ` [PATCH v6 14/16] PCI/AER: Introduce ratelimit for error logs Bjorn Helgaas
2025-05-20  4:59   ` Sathyanarayanan Kuppuswamy
2025-05-20 18:31     ` Bjorn Helgaas
2025-05-20 18:42       ` Sathyanarayanan Kuppuswamy
2025-05-20 11:55   ` Ilpo Järvinen
2025-05-20 19:38     ` Bjorn Helgaas
2025-05-21  9:57       ` Ilpo Järvinen [this message]
2025-05-19 21:35 ` [PATCH v6 15/16] PCI/AER: Add ratelimits to PCI AER Documentation Bjorn Helgaas
2025-05-20  5:01   ` Sathyanarayanan Kuppuswamy
2025-05-20 19:48     ` Bjorn Helgaas
2025-05-20 20:36       ` Sathyanarayanan Kuppuswamy
2025-05-19 21:35 ` [PATCH v6 16/16] PCI/AER: Add sysfs attributes for log ratelimits Bjorn Helgaas
2025-05-20  5:05   ` Sathyanarayanan Kuppuswamy
2025-05-20 12:02   ` Ilpo Järvinen
2025-05-20 16:31     ` Bjorn Helgaas
2025-05-20  9:05 ` [PATCH v6 00/16] Rate limit AER logs Krzysztof Wilczyński

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=741055cc-42bd-2e84-20eb-a4345753fcbc@linux.intel.com \
    --to=ilpo.jarvinen@linux.intel.com \
    --cc=Jonathan.Cameron@huawei.com \
    --cc=anilagrawal@meta.com \
    --cc=ben.fuller@oracle.com \
    --cc=bhelgaas@google.com \
    --cc=dave.jiang@intel.com \
    --cc=drewwalton@microsoft.com \
    --cc=helgaas@kernel.org \
    --cc=kaihengf@nvidia.com \
    --cc=karolina.stolarek@oracle.com \
    --cc=kbusch@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=lukas@wunner.de \
    --cc=mahesh@linux.ibm.com \
    --cc=martin.petersen@oracle.com \
    --cc=oohall@gmail.com \
    --cc=pandoh@google.com \
    --cc=paulmck@kernel.org \
    --cc=rrichter@amd.com \
    --cc=sargun@meta.com \
    --cc=sathyanarayanan.kuppuswamy@linux.intel.com \
    --cc=shiju.jose@huawei.com \
    --cc=terry.bowman@amd.com \
    --cc=tony.luck@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).