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Thu, 28 May 2026 11:28:01 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 64SBRwMT60490138 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 May 2026 11:27:58 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F87D2004B; Thu, 28 May 2026 11:27:58 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9909220040; Thu, 28 May 2026 11:27:55 +0000 (GMT) Received: from [9.39.18.196] (unknown [9.39.18.196]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 28 May 2026 11:27:55 +0000 (GMT) Message-ID: <74a61427-b5d8-41ad-bc5b-508ee246d510@linux.ibm.com> Date: Thu, 28 May 2026 16:57:54 +0530 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [BUG] sched/cache: "Make LLC id continuous" causes NULL cpumask dereference in build_sched_domains on POWER9 To: Venkat Rao Bagalkote , K Prateek Nayak , "Chen, Yu C" , Srikar Dronamraju , Ritesh Harjani Cc: Madhavan Srinivasan , "Christophe Leroy (CS GROUP)" , LKML , linuxppc-dev , Peter Zijlstra , tim.c.chen@linux.intel.com References: <51154de7-3700-4cb4-82f2-1b3a8fa427f7@linux.ibm.com> Content-Language: en-US From: Shrikanth Hegde In-Reply-To: <51154de7-3700-4cb4-82f2-1b3a8fa427f7@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 3wc5bkbx0KI16kpu_oiDGRHXTg2P4YtW X-Proofpoint-GUID: 3wc5bkbx0KI16kpu_oiDGRHXTg2P4YtW X-Authority-Analysis: v=2.4 cv=XqfK/1F9 c=1 sm=1 tr=0 ts=6a1826c2 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=QyXUC8HyAAAA:8 a=sVCs8T_WoIwSPI0JDxcA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI4MDExMyBTYWx0ZWRfXwLghwKHTmwWd zX1fHuXGuCp6tcWaXw8p0cEL0OSifodoRiwlD2fER0hjGWP5BoPOdYpqh5VWnMFSLuCynO7H07q CbpBT6ww8IlpB3wNj90OdHVwHkaADo6oM9mHCz2f8XL+dMVOzmFk0TAM7vjpJ3/Lwwivu41vZB0 WKUY6YQ+9Ew0ZWoRCld/quTMKVHs2kKFvp7LH2DFdwPpRO/gKkyENCHMJ7XEkEb7pYL3iqkpNHJ Z5idTf2jLkhFyLVcVjZl8pOA7PPMUFrmlPgXJZiaGTJs8Ci9qYytkSLwC6b64wWkquKpjOX+crv uQ1prRMUMhAafKE/bqFJnavfHXZs7T2sFRiNY2zgMwIHvRKSxpH48kXYO0xBDLPF1VPu+GvDQTb Vt9vCoaTGWGtzWmjlFRqLN7hJNUiMltIb8v+Y6/cWzf0JVqZSKFYVSmiula7+kU8YPZ5tS9WmF9 W8qNUqjRQqRuoKwNd/Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-28_03,2026-05-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2605280113 On 5/25/26 7:37 PM, Venkat Rao Bagalkote wrote: > Greetings!!! > > I am seeing an early boot kernel panic due to NULL pointer dereference > on a POWER9 (pSeries) system when testing linux-next (next-20260522). > Hi Venkat, Ritesh, Could you please try the below diff and see if it helps. This helps to fix boot problem for SPLPAR for me. Hi Chenyu, Let me know if I have to send the patch. Or if you want to add more comments or change it feel free to pick it up and send it. Either way is fine. Let me know. Hi Prateek, Srikar, I hope the below diff makes sense. Please check. nit: llc_mask is still under CONFIG_SCHED_MC, for ppc it is set to true always for SMP systems, and for others it is LLC domain. So not a concern i guess. --- From 10e9413cef063446d67dc02c2b44e1ea582e5d53 Mon Sep 17 00:00:00 2001 From: Shrikanth Hegde Date: Thu, 28 May 2026 06:16:44 -0400 Subject: [PATCH] topology: Provide arch_llc_mask for cache aware scheduling Venkat Reported a boot kernel panic next-20260522. Git bisect pointed to b5ea300a17e3 ("sched/cache: Make LLC id continuous") Stacktrace points to llc_mask being null. NIP [c000000000e58504] _find_first_bit+0x44/0x130 LR [c000000000e58500] _find_first_bit+0x40/0x130 Call Trace: build_sched_domains+0xad8/0xe50 sched_init_smp+0xa8/0x164 kernel_init_freeable+0x250/0x370 ret_from_kernel_user_thread+0x14/0x1c On powerpc, cpu_coregroup_mask is available only when the underlying hardware support coregroup. In shared LPAR, QEMU guest or power9 etc coregroup isn;t supported. In such cases llc_mask was being referrenced when it was null leading to panic. on powerpc, LLC is at SMT core level. So assumption that coregroup(MC) domain point to LLC is wrong. Provide a way for archs to say where its LLC is if it not at MC domain. Fixes: b5ea300a17e3 ("sched/cache: Make LLC id continuous") Reported-by: Venkat Rao Bagalkote Closes: https://lore.kernel.org/all/51154de7-3700-4cb4-82f2-1b3a8fa427f7@linux.ibm.com/ Suggested-by: Chen, Yu C Signed-off-by: Shrikanth Hegde --- arch/powerpc/include/asm/topology.h | 3 +++ arch/powerpc/kernel/smp.c | 10 ++++++++++ kernel/sched/topology.c | 9 +++++++++ 3 files changed, 22 insertions(+) diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h index 66ed5fe1b718..bd1db3b1dbb0 100644 --- a/arch/powerpc/include/asm/topology.h +++ b/arch/powerpc/include/asm/topology.h @@ -131,6 +131,9 @@ static inline int cpu_to_coregroup_id(int cpu) #ifdef CONFIG_SMP #include +const struct cpumask *arch_llc_mask(int cpu); +#define arch_llc_mask arch_llc_mask + struct cpumask *cpu_coregroup_mask(int cpu); const struct cpumask *cpu_die_mask(int cpu); int cpu_die_id(int cpu); diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 3467f86fd78f..cc8e87d6cae9 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1101,6 +1101,16 @@ const struct cpumask *cpu_die_mask(int cpu) } EXPORT_SYMBOL_GPL(cpu_die_mask); +const struct cpumask *arch_llc_mask(int cpu) +{ + /* Power9, CACHE domain is the LLC*/ + if (shared_caches) + return cpu_l2_cache_mask(cpu); + + /* For others, SMT domain is the LLC*/ + return cpu_smt_mask(cpu); +} + int cpu_die_id(int cpu) { if (has_coregroup_support()) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index df2ceb54c970..01af3d8f9eb9 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -2063,7 +2063,16 @@ const struct cpumask *tl_mc_mask(struct sched_domain_topology_level *tl, int cpu return cpu_coregroup_mask(cpu); } +/* + * Majority of architectures have LLC at MC domain level with exception + * such as powerpc. Provide a way for arch to specify where its LLC is + * if it falls in exception category + */ +# ifndef arch_llc_mask #define llc_mask(cpu) cpu_coregroup_mask(cpu) +# else +#define llc_mask(cpu) arch_llc_mask(cpu) +# endif #else #define llc_mask(cpu) cpumask_of(cpu) -- 2.47.3