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Subject: Re: [PATCH] powerpc/book3e: Fix CPU feature handling on 64-bit e5500
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From: Kumar Gala <galak@kernel.crashing.org>
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Date: Thu, 7 Apr 2011 14:38:57 -0500
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	<20110406130257.2d31beaa@schlenkerla.am.freescale.net>
To: Scott Wood <scottwood@freescale.com>
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On Apr 6, 2011, at 1:02 PM, Scott Wood wrote:

> On Wed, 6 Apr 2011 07:29:03 -0500
> Kumar Gala <galak@kernel.crashing.org> wrote:
>=20
>> diff --git a/arch/powerpc/include/asm/cputable.h =
b/arch/powerpc/include/asm/cputable.h
>> index be3cdf9..9028a9e 100644
>> --- a/arch/powerpc/include/asm/cputable.h
>> +++ b/arch/powerpc/include/asm/cputable.h
>> @@ -386,6 +386,10 @@ extern const char *powerpc_base_platform;
>> 	    CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
>> 	    CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
>> 	    CPU_FTR_DBELL)
>> +#define CPU_FTRS_E5500	(CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB =
| \
>> +	    CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
>=20
> E5500 cannot doze or nap in the way meant by existing code (MSR[WE]).

Should I drop them for e500mc as well?

- k=