From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B18EFC31E45 for ; Thu, 13 Jun 2019 08:32:17 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3AD2520851 for ; Thu, 13 Jun 2019 08:32:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3AD2520851 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45PcRf3KcyzDqx4 for ; Thu, 13 Jun 2019 18:32:14 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=huawei.com (client-ip=45.249.212.35; helo=huawei.com; envelope-from=thunder.leizhen@huawei.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=huawei.com Received: from huawei.com (szxga07-in.huawei.com [45.249.212.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45PcPb0XZdzDqx4 for ; Thu, 13 Jun 2019 18:30:24 +1000 (AEST) Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 2AE1F7854A4A77E18E06; Thu, 13 Jun 2019 16:30:18 +0800 (CST) Received: from [127.0.0.1] (10.133.215.186) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Thu, 13 Jun 2019 16:30:11 +0800 Subject: Re: [PATCH v8 1/7] iommu: enhance IOMMU default DMA mode build options To: John Garry , Jean-Philippe Brucker , Robin Murphy , "Will Deacon" , Joerg Roedel , Jonathan Corbet , linux-doc , Sebastian Ott , Gerald Schaefer , "Martin Schwidefsky" , Heiko Carstens , Benjamin Herrenschmidt , Paul Mackerras , "Michael Ellerman" , Tony Luck , Fenghua Yu , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , David Woodhouse , iommu , linux-kernel , linux-s390 , linuxppc-dev , x86 , linux-ia64 References: <20190530034831.4184-1-thunder.leizhen@huawei.com> <20190530034831.4184-2-thunder.leizhen@huawei.com> <645bd526-4eb0-4a36-2dda-023f009247ab@huawei.com> <030bafab-58f5-8bb1-0533-2977d6e138b2@huawei.com> <55d0e30c-5bca-41fc-5bf0-4366dc387afd@huawei.com> From: "Leizhen (ThunderTown)" Message-ID: <7d3727e3-a455-3a26-1104-5b85c196bbdf@huawei.com> Date: Thu, 13 Jun 2019 16:30:08 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <55d0e30c-5bca-41fc-5bf0-4366dc387afd@huawei.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.133.215.186] X-CFilter-Loop: Reflected X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linuxarm , Hanjun Guo Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 2019/5/31 18:42, John Garry wrote: > >>>> -config IOMMU_DEFAULT_PASSTHROUGH >>>> -    bool "IOMMU passthrough by default" >>>> +choice >>>> +    prompt "IOMMU default DMA mode" >>>>      depends on IOMMU_API >>>> -        help >>>> -      Enable passthrough by default, removing the need to pass in >>>> -      iommu.passthrough=on or iommu=pt through command line. If this >>>> -      is enabled, you can still disable with iommu.passthrough=off >>>> -      or iommu=nopt depending on the architecture. >>>> +    default IOMMU_DEFAULT_STRICT >>>> +    help >>>> +      This option allows IOMMU DMA mode to be chose at build time, to >>> >>> As before: >>> /s/chose/chosen/, /s/allows IOMMU/allows an IOMMU/ >> I'm sorry that the previous version was not modified. >> >>> >>>> +      override the default DMA mode of each ARCHs, removing the need to >>> >>> Again, as before: >>> ARCHs should be singular >> OK >> >>> >>>> +      pass in kernel parameters through command line. You can still use >>>> +      ARCHs specific boot options to override this option again. > > * > >>>> + >>>> +config IOMMU_DEFAULT_PASSTHROUGH >>>> +    bool "passthrough" >>>> +    help >>>> +      In this mode, the DMA access through IOMMU without any addresses >>>> +      translation. That means, the wrong or illegal DMA access can not >>>> +      be caught, no error information will be reported. >>>> >>>>        If unsure, say N here. >>>> >>>> +config IOMMU_DEFAULT_LAZY >>>> +    bool "lazy" >>>> +    help >>>> +      Support lazy mode, where for every IOMMU DMA unmap operation, the >>>> +      flush operation of IOTLB and the free operation of IOVA are deferred. >>>> +      They are only guaranteed to be done before the related IOVA will be >>>> +      reused. >>> >>> why no advisory on how to set if unsure? >> Because the LAZY and STRICT have their own advantages and disadvantages. >> >> Should I say: If unsure, keep the default。 > > Maybe. So you could put this in the help for the choice, * above, and remove the advisory on IOMMU_DEFAULT_PASSTHROUGH. OK, I'll revise it according to this idea in v9. > > However the maintainer may have a different view. > > Thanks, > John > >> >>> >>>> + >>>> +config IOMMU_DEFAULT_STRICT >>>> +    bool "strict" >>>> +    help >>>> +      For every IOMMU DMA unmap operation, the flush operation of IOTLB and >>>> +      the free operation of IOVA are guaranteed to be done in the unmap >>>> +      function. >>>> + >>>> +      This mode is safer than the two above, but it maybe slower in some >>>> +      high performace scenarios. >>> >>> and here? > > > . >