From: Segher Boessenkool <segher@kernel.crashing.org>
To: Nick Piggin <npiggin@suse.de>
Cc: linuxppc-dev@ozlabs.org, paulus@samba.org
Subject: Re: [patch 2/2] powerpc: optimise smp_wmb
Date: Wed, 21 May 2008 22:12:03 +0200 [thread overview]
Message-ID: <7dc38d9080603be9c25b8f649e5df0a0@kernel.crashing.org> (raw)
In-Reply-To: <20080521160146.GI8897@wotan.suse.de>
>> From memory, I measured lwsync is 5 times faster than eieio on
> a dual G5. This was on a simple microbenchmark that made use of
> smp_wmb for store ordering, but it did not involve any IO access
> (which presumably would disadvantage eieio further).
This is very much specific to your particular benchmark.
On the 970, there are two differences between lwsync and eieio:
1) lwsync cannot issue before all previous loads are done; eieio
does not have this restriction.
Then, they both fly through the execution core, it doesn't wait
for the barrier insn to complete in the storage system. In both
cases, a barrier is inserted into both the L2 queues and the
non-cacheable queues. These barriers are both removed at the
same time, that is, when both are the oldest in their queue and
have done their thing.
2) For eieio, the non-cacheable unit waits for all previous
(non-cacheable) stores to complete, and then arbitrates for the
bus and sends an EIEIO transaction.
Your benchmark doesn't do non-cacheable stores, so it would seem
the five-time slowdown is caused by that bus arbitration (and the
bus transaction). Maybe your cacheable stores hit the bus as well,
that would make this worse. Your benchmark also doesn't see the
negative effects from 1).
In "real" code, I expect 2) to be pretty much invisible (the store
queues will never be completely filled up), but 1) shouldn't be very
bad either. So it's a wash. But only a real benchmark will tell.
> Given the G5 speedup, I'd be surprised if there is not an improvment
> on POWER4 and 5 as well,
The 970 storage subsystem and the POWER4 one are very different.
Or maybe these queues are just about the last thing that _is_
identical, I dunno, there aren't public POWER4 docs for this ;-)
> although no idea about POWER6 or cell...
No idea about POWER6; for CBE, the backend works similar to the
970 one.
Given that the architecture says to use lwsync for cases like this,
it would be very surprising if it performed (much) worse than eieio,
eh? ;-) So I think your patch is a win; just wanted to clarify on
your five-time slowdown number.
HTH,
Segher
next prev parent reply other threads:[~2008-05-21 20:12 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-21 14:10 [patch 1/2] powerpc: rmb fix Nick Piggin
2008-05-21 14:12 ` [patch 2/2] powerpc: optimise smp_wmb Nick Piggin
2008-05-21 15:26 ` Benjamin Herrenschmidt
2008-05-21 15:34 ` Nick Piggin
2008-05-21 15:43 ` Benjamin Herrenschmidt
2008-05-21 15:47 ` Nick Piggin
2008-05-21 16:02 ` Benjamin Herrenschmidt
2008-05-21 20:51 ` Segher Boessenkool
2008-05-21 16:01 ` Nick Piggin
2008-05-21 20:12 ` Segher Boessenkool [this message]
2008-05-21 20:44 ` Benjamin Herrenschmidt
2008-05-21 22:07 ` Segher Boessenkool
2008-05-22 0:30 ` Nick Piggin
2008-05-21 20:16 ` Segher Boessenkool
2008-05-21 15:27 ` [patch 1/2] powerpc: rmb fix Benjamin Herrenschmidt
2008-05-21 15:32 ` Nick Piggin
2008-05-21 15:43 ` Benjamin Herrenschmidt
2008-05-23 2:14 ` Paul Mackerras
2008-05-23 4:40 ` Nick Piggin
2008-05-23 4:53 ` Paul Mackerras
2008-05-23 5:48 ` Nick Piggin
2008-05-23 6:40 ` Paul Mackerras
2008-05-26 1:38 ` Nick Piggin
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