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From: Frederic Barrat <fbarrat@linux.ibm.com>
To: Philippe Bergheaud <felix@linux.ibm.com>, linuxppc-dev@lists.ozlabs.org
Cc: clombard@linux.ibm.com, benh@au1.ibm.com
Subject: Re: [PATCH] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode
Date: Fri, 13 Apr 2018 11:58:46 +0200	[thread overview]
Message-ID: <7dd566a4-cc8c-f42a-964a-ea134b534704@linux.ibm.com> (raw)
In-Reply-To: <20180412110642.26454-1-felix@linux.ibm.com>



Le 12/04/2018 à 13:06, Philippe Bergheaud a écrit :
> Skiboot used to set the default Tunnel BAR register value when capi mode
> was enabled. This approach was ok for the cxl driver, but prevented other
> drivers from choosing different values.
> 
> Skiboot versions > 5.11 will not set the default value any longer. This
> patch modifies the cxl driver to set/reset the Tunnel BAR register when
> entering/exiting the cxl mode, with pnv_pci_set_tunnel_bar().
> 
> Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
> ---
>   drivers/misc/cxl/pci.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
> index 83f1d08058fc..3beff9188446 100644
> --- a/drivers/misc/cxl/pci.c
> +++ b/drivers/misc/cxl/pci.c
> @@ -1742,6 +1742,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
>   	/* Required for devices using CAPP DMA mode, harmless for others */
>   	pci_set_master(dev);
>   
> +	if ((rc = pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1)))
> +		goto err;
> +


Isn't that call going to fail on older skiboot which don't support 
OPAL_PCI_SET_PBCQ_TUNNEL_BAR, i.e. on p8?

   Fred


>   	if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
>   		goto err;
>   
> @@ -1768,6 +1771,7 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
>   {
>   	struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
>   
> +	pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0);
>   	cxl_native_release_psl_err_irq(adapter);
>   	cxl_unmap_adapter_regs(adapter);
>   
> 

      reply	other threads:[~2018-04-13  9:58 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-12 11:06 [PATCH] cxl: Set the PBCQ Tunnel BAR register when enabling capi mode Philippe Bergheaud
2018-04-13  9:58 ` Frederic Barrat [this message]

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