Hi John,

I've a small question about ns16550 boot support.
I can't see any code related to either "clock-frequency" or "current-speed" key words.
Such actions are performed in of_serial.c to get appropriate baud rate (update of UART_DLL and UART_DLM).

Is it needed or is it a misunderstanding?
Personally, I have added this below debug code (dirty :)) to make it work.

diff --git a/arch/powerpc/boot/ns16550.c b/arch/powerpc/boot/ns16550.c
index f8f1b2f..850e223 100644
--- a/arch/powerpc/boot/ns16550.c
+++ b/arch/powerpc/boot/ns16550.c
@@ -26,6 +26,9 @@
#define UART_MSR    6    /* In: Modem Status Register */
#define UART_SCR    7    /* I/O: Scratch Register */

+#define UART_LCR_DLAB 0x80      /* Divisor latch access */
+#define UART_LCR_8_DATA_BITS 0x03
+
static unsigned char *reg_base;
static u32 reg_shift;

@@ -56,6 +59,10 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
{
     int n;
     unsigned long reg_phys;
+ unsigned long divisor=0;
+ unsigned long spd=0, clk=0;
+
+

     n = getprop(devp, "virtual-reg", &reg_base, sizeof(reg_base));
     if (n != sizeof(reg_base)) {
@@ -75,5 +82,23 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
     scdp->tstc = ns16550_tstc;
     scdp->close = NULL;

+    n = getprop(devp, "current-speed", &spd, sizeof(spd));
+
+
+    n = getprop(devp, "clock-frequency", &clk, sizeof(clk));
+
+
+ if(spd&&clk)
+ {
+
+     divisor = clk / (spd * 16UL);
+
+     out_8(reg_base + (UART_FCR << reg_shift), 0x06);
+     out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_8_DATA_BITS|UART_LCR_DLAB);
+     out_8(reg_base + (UART_DLL << reg_shift), divisor&0xff);
+     out_8(reg_base + (UART_DLM << reg_shift), (divisor>>8)&0xff);
+     out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_8_DATA_BITS);
+
+ }
     return 0;

Best regards,
Johann

On Wed, Apr 2, 2008 at 4:52 PM, John Linn <john.linn@xilinx.com> wrote:

The Xilinx 16550 uart core is not a standard 16550 because it uses
word-based addressing rather than byte-based adressing. With
additional properties it is compatible with the open firmware
'ns16550' compatible binding.

This code updates the ns16550 driver to use the reg-offset property
so that the Xilinx UART 16550 can be used with it. The reg-shift
was already being handled.

Signed-off-by: John Linn <john.linn@xilinx.com>
---
arch/powerpc/boot/ns16550.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/ns16550.c b/arch/powerpc/boot/ns16550.c
index f8f1b2f..da9d2c2 100644
--- a/arch/powerpc/boot/ns16550.c
+++ b/arch/powerpc/boot/ns16550.c
@@ -56,6 +56,7 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
{
int n;
unsigned long reg_phys;
+ u32 reg_offset;

n = getprop(devp, "virtual-reg", &reg_base, sizeof(reg_base));
if (n != sizeof(reg_base)) {
@@ -65,6 +66,10 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
reg_base = (void *)reg_phys;
}

+ n = getprop(devp, "reg-offset", &reg_offset, sizeof(reg_offset));
+ if (n == sizeof(reg_offset))
+ reg_base += reg_offset;
+
n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
if (n != sizeof(reg_shift))
reg_shift = 0;
--
1.5.2.1

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--
Johann Baudy
johaahn@gmail.com