interrupt handling in 7410+64260

interrupt handling in 7410+64260

[신경수]

I have a custom MPC7410 + GT64260 board and
I successfully ported linux to that board.
Now, I am trying to handle the mii interrupt.
The MII INT Line is connected to MPP 14, 15.
How to handle that interrupt or where I can find
out the example for external interrupt with MPP

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[Paul White]

Hello,

Its been a little while since I've looked at the GT64260 manual,
but I believe you configure the MPP pins as interrupt pins.  These
then are masked/seen via the GPP_INTR_CAUSE (0xf108) and
GPP_INTR_MASK (0xf10c) registers.  Then, I believe that somewhere in
the CPU's mask, you can enable/disable the GPP/MPP interrupts.

This is what I recall from memory, but hopefully it'll get you
started.

Paul White
Senior Enginer, Software
Bivio Networks, Inc.
http://www.bivio.net


On Wed, 27 Aug 2003, [ks_c_5601-1987] ½Å°æ¼ö wrote:

>
> I have a custom MPC7410 + GT64260 board and
> I successfully ported linux to that board.
> Now, I am trying to handle the mii interrupt.
> The MII INT Line is connected to MPP 14, 15.
> How to handle that interrupt or where I can find
> out the example for external interrupt with MPP
>
>


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[???]

Thank you for your response.

I use 2.4.18 kernel from montavista.
I set MPP_CNTL_x reigster as gpp,
 GPP_IO_CNTL as input, GPP_LEVEL_CNTL as active low
after that, I call request_irq(irq_num, ...); function.

when I call request_irq(), I try two type.
1. request_irq(57, ...)
   57 means bit 25 of MAIN_INTERRUPT_CAUSE register.
2. request_irq(77, ...)
   77 means bit 15 of GPP_INTERRUPT_CAUSE register.

in case of 1.
when interrupt is occurred, then kernel is dead. and no message
is printed.

in case of 2.
when interrupt is occurred, but nothing is happened and also
bit 25 of MAIN_INTERRUPT_MASK_HI is not set.
also try to set that bit, but not setted...

In Linux kernel, there is a example about handling internal
interrupt(mpsc as serial, ethernet), but I can't find the example for
about handling external interrupt with GPP.

Is there anyone who know that how to handle the external interrupt
with GPP in 7410/64260?

----- Original Message -----
From: "Paul White" <pwhite@bivio.net>
To: "???" <ksshin@essetel.com>
Cc: <linuxppc-embedded@lists.linuxppc.org>
Sent: Wednesday, August 27, 2003 12:18 PM
Subject: Re: interrupt handling in 7410+64260


>
> Hello,
>
> Its been a little while since I've looked at the GT64260 manual,
> but I believe you configure the MPP pins as interrupt pins.  These
> then are masked/seen via the GPP_INTR_CAUSE (0xf108) and
> GPP_INTR_MASK (0xf10c) registers.  Then, I believe that somewhere in
> the CPU's mask, you can enable/disable the GPP/MPP interrupts.
>
> This is what I recall from memory, but hopefully it'll get you
> started.
>
> Paul White
> Senior Enginer, Software
> Bivio Networks, Inc.
> http://www.bivio.net
>
>
> On Wed, 27 Aug 2003, [ks_c_5601-1987] ½Å°æ¼ö wrote:
>
> >
> > I have a custom MPC7410 + GT64260 board and
> > I successfully ported linux to that board.
> > Now, I am trying to handle the mii interrupt.
> > The MII INT Line is connected to MPP 14, 15.
> > How to handle that interrupt or where I can find
> > out the example for external interrupt with MPP
> >
> >
>
>
>

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[ghannon]

> 2. request_irq(77, ...)
>    77 means bit 15 of GPP_INTERRUPT_CAUSE register.

There is an offset of 64, try 79 vs 77 to get bit 15.

"???" <ksshin@essetel.com> on 08/27/2003 12:23:55 AM

I use 2.4.18 kernel from montavista.
I set MPP_CNTL_x reigster as gpp,
 GPP_IO_CNTL as input, GPP_LEVEL_CNTL as active low
after that, I call request_irq(irq_num, ...); function.

when I call request_irq(), I try two type.
1. request_irq(57, ...)
   57 means bit 25 of MAIN_INTERRUPT_CAUSE register.
2. request_irq(77, ...)
   77 means bit 15 of GPP_INTERRUPT_CAUSE register.

in case of 1.
when interrupt is occurred, then kernel is dead. and no message
is printed.

in case of 2.
when interrupt is occurred, but nothing is happened and also
bit 25 of MAIN_INTERRUPT_MASK_HI is not set.
also try to set that bit, but not setted...

In Linux kernel, there is a example about handling internal
interrupt(mpsc as serial, ethernet), but I can't find the example for
about handling external interrupt with GPP.

Is there anyone who know that how to handle the external interrupt
with GPP in 7410/64260?

----- Original Message -----
From: "Paul White" <pwhite@bivio.net>
Sent: Wednesday, August 27, 2003 12:18 PM
Subject: Re: interrupt handling in 7410+64260

> Its been a little while since I've looked at the GT64260 manual, but I
> believe you configure the MPP pins as interrupt pins. These then are
> masked/seen via the GPP_INTR_CAUSE (0xf108) and GPP_INTR_MASK (0xf10c)
> registers. Then, I believe that somewhere in the CPU's mask, you can
> enable/disable the GPP/MPP interrupts.
>
> This is what I recall from memory, but hopefully it'll get you
> started.

> On Wed, 27 Aug 2003, [ks_c_5601-1987]
> >
> > I have a custom MPC7410 + GT64260 board and I successfully ported
> > linux to that board. Now, I am trying to handle the mii interrupt.
> > The MII INT Line is connected to MPP 14, 15. How to handle that
> > interrupt or where I can find out the example for external interrupt
> > with MPP

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[Mark A. Greer]

ksshin@essetel.com wrote:

>In Linux kernel, there is a example about handling internal
>interrupt(mpsc as serial, ethernet), but I can't find the example for
>about handling external interrupt with GPP.
>
There are plenty of examples including DUART & PCI interrupts in ev64260.c.

>Is there anyone who know that how to handle the external interrupt
>with GPP in 7410/64260?
>
>
Just look at ev64260.c, cpci690.c, hxeb100.c, ...

Mark


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[Mark A. Greer]

ghannon@cspi.com wrote:

>>2. request_irq(77, ...)
>>   77 means bit 15 of GPP_INTERRUPT_CAUSE register.
>>
>>
>
>There is an offset of 64, try 79 vs 77 to get bit 15.
>
>
Yep, 79 sounds right, if its GPP 15.

Mark


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[???]

Thank you for your response.

according to your message, I try to find example source in
my linux kernel(my Linux kernel is 2.4.18 from montavista)
but I cannot find sources like cpci690.c, hxeb100.c and ev64260.c

I also try to handle an external interrupt from MPP in various way.
But I Failed until now.

please help me...

----- Original Message -----
From: "Mark A. Greer" <mgreer@mvista.com>
To: "???" <ksshin@essetel.com>
Cc: "Paul White" <pwhite@bivio.net>; <linuxppc-embedded@lists.linuxppc.org>
Sent: Thursday, August 28, 2003 2:21 AM
Subject: Re: interrupt handling in 7410+64260


>
> ksshin@essetel.com wrote:
>
> >In Linux kernel, there is a example about handling internal
> >interrupt(mpsc as serial, ethernet), but I can't find the example for
> >about handling external interrupt with GPP.
> >
> There are plenty of examples including DUART & PCI interrupts in ev64260.c.
>
> >Is there anyone who know that how to handle the external interrupt
> >with GPP in 7410/64260?
> >
> >
> Just look at ev64260.c, cpci690.c, hxeb100.c, ...
>
> Mark
>
>
>

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: interrupt handling in 7410+64260

[Dan Kegel]

??? wrote:
> according to your message, I try to find example source in
> my linux kernel(my Linux kernel is 2.4.18 from montavista)
> but I cannot find sources like cpci690.c, hxeb100.c and ev64260.c

Search http://marc.theaimsgroup.com/?l=linux-ppc for cpci690.c
You'll find a patch that refers to the arch/ppc/platforms/cpci690.c
in the linuxppc_2_4_devel tree.  This tree can be found at
http://www.penguinppc.org/dev/kernel.shtml

Maybe those files are in other trees, but hey, at least you know
where one example of them is now.
- Dan


--
Dan Kegel
http://www.kegel.com
http://counter.li.org/cgi-bin/runscript/display-person.cgi?user=78045


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/