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Thu, 9 Jul 2020 11:07:54 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44040A4054; Thu, 9 Jul 2020 11:07:53 +0000 (GMT) Received: from [9.85.108.151] (unknown [9.85.108.151]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Thu, 9 Jul 2020 11:07:53 +0000 (GMT) From: Athira Rajeev Message-Id: <8686D3D2-6AE6-479D-BD7F-36EBFBA0BEEA@linux.vnet.ibm.com> Content-Type: multipart/alternative; boundary="Apple-Mail=_74D9808A-91F2-4E58-9A98-12BDA6ED9102" Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.80.23.2.2\)) Subject: Re: [PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs Date: Thu, 9 Jul 2020 16:37:50 +0530 In-Reply-To: <87y2nu2r7f.fsf@mpe.ellerman.id.au> To: Michael Ellerman References: <1593595262-1433-1-git-send-email-atrajeev@linux.vnet.ibm.com> <1593595262-1433-5-git-send-email-atrajeev@linux.vnet.ibm.com> <87y2nu2r7f.fsf@mpe.ellerman.id.au> X-Mailer: Apple Mail (2.3608.80.23.2.2) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-09_05:2020-07-09, 2020-07-09 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 malwarescore=0 mlxscore=0 priorityscore=1501 impostorscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2007090084 X-Mailman-Approved-At: Thu, 09 Jul 2020 22:23:07 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Neuling , maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" --Apple-Mail=_74D9808A-91F2-4E58-9A98-12BDA6ED9102 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=utf-8 > On 08-Jul-2020, at 4:45 PM, Michael Ellerman = wrote: >=20 > Athira Rajeev > writes: >> From: Madhavan Srinivasan >>=20 >> Add power10 feature function to dt_cpu_ftrs.c along >> with a power10 specific init() to initialize pmu sprs. >>=20 >> Signed-off-by: Madhavan Srinivasan >> --- >> arch/powerpc/include/asm/reg.h | 3 +++ >> arch/powerpc/kernel/cpu_setup_power.S | 7 +++++++ >> arch/powerpc/kernel/dt_cpu_ftrs.c | 26 ++++++++++++++++++++++++++ >> 3 files changed, 36 insertions(+) >>=20 >> diff --git a/arch/powerpc/include/asm/reg.h = b/arch/powerpc/include/asm/reg.h >> index 21a1b2d..900ada1 100644 >> --- a/arch/powerpc/include/asm/reg.h >> +++ b/arch/powerpc/include/asm/reg.h >> @@ -1068,6 +1068,9 @@ >> #define MMCR0_PMC2_LOADMISSTIME 0x5 >> #endif >>=20 >> +/* BHRB disable bit for PowerISA v3.10 */ >> +#define MMCRA_BHRB_DISABLE 0x0000002000000000 >> + >> /* >> * SPRG usage: >> * >> diff --git a/arch/powerpc/kernel/cpu_setup_power.S = b/arch/powerpc/kernel/cpu_setup_power.S >> index efdcfa7..e8b3370c 100644 >> --- a/arch/powerpc/kernel/cpu_setup_power.S >> +++ b/arch/powerpc/kernel/cpu_setup_power.S >> @@ -233,3 +233,10 @@ __init_PMU_ISA207: >> li r5,0 >> mtspr SPRN_MMCRS,r5 >> blr >> + >> +__init_PMU_ISA31: >> + li r5,0 >> + mtspr SPRN_MMCR3,r5 >> + LOAD_REG_IMMEDIATE(r5, MMCRA_BHRB_DISABLE) >> + mtspr SPRN_MMCRA,r5 >> + blr >=20 > This doesn't seem like it belongs in this patch. It's not called? Yes, you are right, this needs to be called from `__setup_cpu_power10`. Since we didn=E2=80=99t had setup part for power10 in the tree = initially, missed it. I will include this update in V3=20 Thanks Athira >=20 > cheers --Apple-Mail=_74D9808A-91F2-4E58-9A98-12BDA6ED9102 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=utf-8

On 08-Jul-2020, at 4:45 PM, Michael Ellerman <mpe@ellerman.id.au> = wrote:

Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes:
From: Madhavan Srinivasan <maddy@linux.ibm.com>

Add = power10 feature function to dt_cpu_ftrs.c along
with a = power10 specific init() to initialize pmu sprs.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
arch/powerpc/include/asm/reg.h =        |  3 +++
arch/powerpc/kernel/cpu_setup_power.S |  7 +++++++
arch/powerpc/kernel/dt_cpu_ftrs.c     | = 26 ++++++++++++++++++++++++++
3 files changed, 36 = insertions(+)

diff --git = a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 21a1b2d..900ada1 100644
--- = a/arch/powerpc/include/asm/reg.h
+++ = b/arch/powerpc/include/asm/reg.h
@@ -1068,6 +1068,9 @@
#define MMCR0_PMC2_LOADMISSTIME 0x5
#endif

+/* BHRB disable bit for PowerISA v3.10 */
+#define MMCRA_BHRB_DISABLE 0x0000002000000000
+
/*
 * SPRG usage:
 *
diff --git = a/arch/powerpc/kernel/cpu_setup_power.S = b/arch/powerpc/kernel/cpu_setup_power.S
index = efdcfa7..e8b3370c 100644
--- = a/arch/powerpc/kernel/cpu_setup_power.S
+++ = b/arch/powerpc/kernel/cpu_setup_power.S
@@ -233,3 +233,10 = @@ __init_PMU_ISA207:
li r5,0
= mtspr = SPRN_MMCRS,r5
blr
+
+__init_PMU_ISA31:
+ li r5,0
+ = mtspr = SPRN_MMCR3,r5
+ LOAD_REG_IMMEDIATE(r5, = MMCRA_BHRB_DISABLE)
+ mtspr SPRN_MMCRA,r5
+ blr

This doesn't seem like it belongs in this patch. It's not = called?

Yes, you = are right, this needs to be called from = `__setup_cpu_power10`.
Since we didn=E2=80=99t had setup part = for power10 in the tree initially, missed it.
I will include = this update in V3 

Thanks
Athira

cheers

= --Apple-Mail=_74D9808A-91F2-4E58-9A98-12BDA6ED9102--