From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: Christophe Lombard <clombard@linux.vnet.ibm.com>,
linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com,
andrew.donnellan@au1.ibm.com
Subject: Re: [PATCH] cxl: Add support for POWER9 DD2
Date: Thu, 24 Aug 2017 12:39:28 +0530 [thread overview]
Message-ID: <87378hv3vb.fsf@vajain21.in.ibm.com> (raw)
In-Reply-To: <1503500286-1684-1-git-send-email-clombard@linux.vnet.ibm.com>
Hi Christophe,
Christophe Lombard <clombard@linux.vnet.ibm.com> writes:
> + /* For debugging with trace arrays */
> + /* Configure RX trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200000000000000ULL);
> + /* Configure RX trace 1 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0xAA00000000000001ULL);
> + /* Configure CT trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0xA2B8000000000003ULL);
> + /* Configure LA0 trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x83FFC00000000005ULL);
> + /* Configure JM0 trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200000000000007ULL);
> + /* Configure DMA trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200000000000008ULL);
> + /* Configure DMA trace 1 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200000000000009ULL);
Please wrap this block that configures the trace arrays in #ifdef
DEBUG. Or it will be better if we remove it from here as the register is
already accessible via debugfs.
---
Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Linux Technology Center, IBM India Pvt. Ltd.
next prev parent reply other threads:[~2017-08-24 7:09 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-23 14:58 [PATCH] cxl: Add support for POWER9 DD2 Christophe Lombard
2017-08-24 5:24 ` Andrew Donnellan
2017-08-24 7:23 ` christophe lombard
2017-08-24 7:09 ` Vaibhav Jain [this message]
2017-08-24 7:20 ` christophe lombard
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