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From: Dave <dave.jiang@gmail.com>
To: linuxppc-dev@ozlabs.org
Subject: EDAC platform devices for fsl_soc
Date: Tue, 16 Jan 2007 13:46:28 -0700	[thread overview]
Message-ID: <8746466a0701161246wbe4268esab51bc07a7efb2a3@mail.gmail.com> (raw)

I'm trying to write an EDAC driver for the mpc8560 board. I will need
to access the DDR error management registers, the L2 error management
registers, the PCI management registers, and also the related IRQs
(internal 0, 2, and 8). So I would like to insert some entries into
the 8560 fdt in order to parse them and map the hw irq to virq in
order to setup the platform device resources.

Below is what I was thinking the fdt should look like. Is that reasonable?

     soc8560@e0000000 {
        #address-cells = <1>;
        #size-cells = <1>;
        #interrupt-cells = <2>;
        device_type = "soc";
        ranges = <0 e0000000 00100000>;
        reg = <e0000000 00000200>;
        bus-frequency = <13ab6680>;

        dram_control@2000 {
            device_type = "edac";
            compatible = "85xx";
            reg = <2000 e5c>;
            linux,phandle = <2000>;
            interrupt-parent = <40000>;
            interrupts = <2 1>;
        };

        l2_error@20e00 {
            device_type = "edac";
            compatible = "85xx";
            reg = <20e00 5c>;
            linux,phandle = <20e00>;
            interrupt-parent = <40000>;
            interrupts = <0 1>;
        };

        pci_error@8e00 {
            device_type = "edac";
            compatible = "85xx";
            reg = <8e00 20>;
            linux,phandle = <8e00>;
            interrupt-parent = <40000>;
            interrupts = <8 0>;
        };
.....

-- 
-= Dave =-

             reply	other threads:[~2007-01-16 20:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-01-16 20:46 Dave [this message]
2007-01-16 21:17 ` EDAC platform devices for fsl_soc Kumar Gala
2007-01-20  3:22   ` David Gibson

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