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a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1761057743; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=c27Kz3PCpHpOUA2hxoFAn/lgFIxKWu9eCciI5q0PFVA=; b=1/g8k/vY5UCh/boWPJmgNdB7ubbYE/A/fsOkfq3wSrNQGzQ5valPHvmdpxXGZqcnRroQ58 Bejn39YCg/SlHMeJklk2aBag1ZZ/ZkJkTivx6X2k6zFCy9QlKITW6ujrMH0xoF2co7FakR /dutCEVT+SfKWOjjeaJTqJRMh89jW+zebxPrs6Ff9MEqAR4Jz/7LUbv+E7A5ITdaxbZChA LQsIRW35kAAcwrybohHORnbCHtCEJbOoM88Ok56KpnArXwbr5s8s3yRrxzfqZOWUQSPOoj HHlLFLvQYsl/+KPI+DNPkp5iCy3GtuWwAiSjCg7LL/RU6tt4yt9gYNWiE4WiKA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1761057743; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=c27Kz3PCpHpOUA2hxoFAn/lgFIxKWu9eCciI5q0PFVA=; b=v+qP/IJ72B74NWtVCOdsRXgUn8qUa/Jvf+CPgpV7YyvANjj4e/t31Aew02eNWfxowW2zLI +slcDYUqT+9nxODg== To: David Laight Cc: LKML , Christophe Leroy , Mathieu Desnoyers , Andrew Cooper , Linus Torvalds , kernel test robot , Russell King , linux-arm-kernel@lists.infradead.org, x86@kernel.org, Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , linuxppc-dev@lists.ozlabs.org, Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, Heiko Carstens , Christian Borntraeger , Sven Schnelle , linux-s390@vger.kernel.org, Julia Lawall , Nicolas Palix , Peter Zijlstra , Darren Hart , Davidlohr Bueso , =?utf-8?Q?Andr=C3=A9?= Almeida , Alexander Viro , Christian Brauner , Jan Kara , linux-fsdevel@vger.kernel.org Subject: Re: [patch V3 07/12] uaccess: Provide scoped masked user access regions In-Reply-To: <877bwoz5sp.ffs@tglx> References: <20251017085938.150569636@linutronix.de> <20251017093030.253004391@linutronix.de> <20251020192859.640d7f0a@pumpkin> <877bwoz5sp.ffs@tglx> Date: Tue, 21 Oct 2025 16:42:22 +0200 Message-ID: <874irsz581.ffs@tglx> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain On Tue, Oct 21 2025 at 16:29, Thomas Gleixner wrote: > On Mon, Oct 20 2025 at 19:28, David Laight wrote: >> There is no requirement to do the accesses in strict memory order >> (or to access the lowest address first). >> The only constraint is that gaps must be significantly less than 4k. > > The requirement is that the access is not spilling over into the kernel > address space, which means: > > USR_PTR_MAX <= address < (1U << 63) > > USR_PTR_MAX on x86 is either > (1U << 47) - PAGE_SIZE (4-level page tables) > or (1U << 57) - PAGE_SIZE (5-level page tables) > > Which means at least ~8 EiB of unmapped space in both cases. > > The access order does not matter at all. I just noticed that LAM reduces that gap to one page, but then the kernel has a 8EiB gap right at the kernel/user boundary, which means even in the LAM case an access with less than 8EiB offset from USR_PTR_MAX is guaranteed to fault and not to be able to speculatively access actual kernel memory. Thanks, tglx