From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH 2/2] powerpc/64s/hash: add torture_hpt kernel boot option to increase hash faults
Date: Mon, 04 May 2020 13:06:25 +0530 [thread overview]
Message-ID: <874kswm9s6.fsf@linux.ibm.com> (raw)
In-Reply-To: <20200503082236.17991-2-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> This option increases the number of hash misses by limiting the number of
> kernel HPT entries. This helps stress test difficult to hit paths in the
> kernel.
>
It would nice if we can explain in commit message how we are limiting
the number of HPT entries.
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> .../admin-guide/kernel-parameters.txt | 9 +++
> arch/powerpc/include/asm/book3s/64/mmu-hash.h | 10 +++
> arch/powerpc/mm/book3s64/hash_4k.c | 3 +
> arch/powerpc/mm/book3s64/hash_64k.c | 8 +++
> arch/powerpc/mm/book3s64/hash_utils.c | 66 ++++++++++++++++++-
> 5 files changed, 95 insertions(+), 1 deletion(-)
....
> +void hpt_do_torture(unsigned long ea, unsigned long access,
> + unsigned long rflags, unsigned long hpte_group)
> +{
> + unsigned long last_group;
> + int cpu = raw_smp_processor_id();
> +
> + last_group = torture_hpt_last_group[cpu];
> + if (last_group != -1UL) {
> + while (mmu_hash_ops.hpte_remove(last_group) != -1)
> + ;
> + torture_hpt_last_group[cpu] = -1UL;
> + }
> +
> +#define QEMU_WORKAROUND 0
> +
> + if (ea >= PAGE_OFFSET) {
> + if (!QEMU_WORKAROUND && (access & (_PAGE_READ|_PAGE_WRITE)) &&
> + !(rflags & (HPTE_R_I|HPTE_R_G))) {
> + /* prefetch / prefetchw does not seem to set up a TLB
> + * entry with the powerpc systemsim (mambo) emulator,
> + * though it works with real hardware. An alternative
> + * approach that would work more reliably on quirky
> + * emulators like QEMU may be to remember the last
> + * insertion and remove that, rather than removing the
> + * current insertion. Then no prefetch is required.
> + */
> + if ((access & _PAGE_WRITE) && (access & _PAGE_READ))
> + atomic_add(0, (atomic_t *)(ea & ~0x3));
> + else if (access & _PAGE_READ)
> + *(volatile char *)ea;
> +
> + mb();
> +
> + while (mmu_hash_ops.hpte_remove(hpte_group) != -1)
> + ;
Do we get similar hpte faults rate, if we remove everything except the
current inserted entry?. If so that would largely simplify the code.
> + } else {
> + /* Can't prefetch cache-inhibited so clear next time. */
> + torture_hpt_last_group[cpu] = hpte_group;
> + }
> + }
> +}
> +
> +
> #ifdef CONFIG_DEBUG_PAGEALLOC
> static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
> {
> --
> 2.23.0
-aneesh
next prev parent reply other threads:[~2020-05-04 7:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-03 8:22 [PATCH 1/2] powerpc/64s/hash: add torture_slb kernel boot option to increase SLB faults Nicholas Piggin
2020-05-03 8:22 ` [PATCH 2/2] powerpc/64s/hash: add torture_hpt kernel boot option to increase hash faults Nicholas Piggin
2020-05-04 7:36 ` Aneesh Kumar K.V [this message]
2020-05-04 8:06 ` Nicholas Piggin
2020-05-04 7:27 ` [PATCH 1/2] powerpc/64s/hash: add torture_slb kernel boot option to increase SLB faults Aneesh Kumar K.V
2020-05-04 8:19 ` Nicholas Piggin
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