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[64.90.62.162]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.18.5); Wed, 29 Jan 2020 15:51:55 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: dreamhost|x-authsender|tuliom@ascii.art.br X-MailChannels-Auth-Id: dreamhost X-Inform-Hook: 3c633eae4f9ee326_1580313115492_3723001508 X-MC-Loop-Signature: 1580313115492:3061292462 X-MC-Ingress-Time: 1580313115492 Received: from pdx1-sub0-mail-a97.g.dreamhost.com (localhost [127.0.0.1]) by pdx1-sub0-mail-a97.g.dreamhost.com (Postfix) with ESMTP id B609D7FF9E; Wed, 29 Jan 2020 07:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=ascii.art.br; h=from:to:cc :subject:in-reply-to:references:date:message-id:mime-version :content-type; s=ascii.art.br; bh=zeqxp4o5sFQX6xdE3CoUJ+kq22o=; b= jkWI+bAc8kwiTsmUTUUEUDdPRWafZiTv2y68R7D0LBDh+su0xjfu5GXB4bN3zS/Q DwwpprCQGUiWB8niOjDX5vM82P8bSuiDzTTL1hfYWJ7gi/iCLLWFXW+LmP7B2JIT y1jwM8Toxf/LA8KiRoPE1EisuSwnsCWzsDx8zascObk= Received: from ascii.art.br (unknown [187.74.77.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: tuliom@ascii.art.br) by pdx1-sub0-mail-a97.g.dreamhost.com (Postfix) with ESMTPSA id 1FDE17FFAA; Wed, 29 Jan 2020 07:51:47 -0800 (PST) X-DH-BACKEND: pdx1-sub0-mail-a97 From: Tulio Magno Quites Machado Filho To: Nicholas Piggin , Adhemerval Zanella , linuxppc-dev@lists.ozlabs.org, Libc-alpha Mailing List Subject: Re: powerpc Linux scv support and scv system call ABI proposal In-Reply-To: <1580273424.ea818exa2c.astroid@bobo.none> References: <1580207907.c96c1lh9t0.astroid@bobo.none> <87tv4fd8wp.fsf@oldenburg2.str.redhat.com> <1580218232.2tezmthp1x.astroid@bobo.none> <1580273424.ea818exa2c.astroid@bobo.none> User-Agent: Notmuch/0.29.1 (http://notmuchmail.org) Emacs/26.3 (x86_64-redhat-linux-gnu) Date: Wed, 29 Jan 2020 12:51:44 -0300 Message-ID: <874kwe8dm7.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-VR-OUT-STATUS: OK X-VR-OUT-SCORE: -100 X-VR-OUT-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedugedrfeeigdejlecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucggtfgfnhhsuhgsshgtrhhisggvpdfftffgtefojffquffvnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhvffujghffgffkfggtgesthdtredttdertdenucfhrhhomhepvfhulhhiohcuofgrghhnohcusfhuihhtvghsucforggthhgrughoucfhihhlhhhouceothhulhhiohhmsegrshgtihhirdgrrhhtrdgsrheqnecukfhppedukeejrdejgedrjeejrdelvdenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhhouggvpehsmhhtphdphhgvlhhopegrshgtihhirdgrrhhtrdgsrhdpihhnvghtpedukeejrdejgedrjeejrdelvddprhgvthhurhhnqdhprghthhepvfhulhhiohcuofgrghhnohcusfhuihhtvghsucforggthhgrughoucfhihhlhhhouceothhulhhiohhmsegrshgtihhirdgrrhhtrdgsrheqpdhmrghilhhfrhhomhepthhulhhiohhmsegrshgtihhirdgrrhhtrdgsrhdpnhhrtghpthhtoheplhhisggtqdgrlhhphhgrsehsohhurhgtvgifrghrvgdrohhrgh X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Nicholas Piggin writes: > Adhemerval Zanella's on January 29, 2020 3:26 am: >> >> We already had to push a similar hack where glibc used to abort transactions >> prior syscalls to avoid some side-effects on kernel (commit 56cf2763819d2f). >> It was eventually removed from syscall handling by f0458cf4f9ff3d870, where >> we only enable TLE if kernel suppors PPC_FEATURE2_HTM_NOSC. >> >> The transaction syscall abort used to read a variable directly from TCB, >> so this could be an option. I would expect that we could optimize it where >> if glibc is building against a recent kernel and compiler is building >> for a ISA 3.0+ cpu we could remove the 'sc' code. >> > > We would just have to be careful of running on ISA 3.0 CPUs on older > kernels which do not support scv. Can we assume that, if a syscall is available through sc it's also available in scv 0? Because if that's true, I believe your suggestion to interpret PPC_FEATURE2_SCV as scv 0 support would be helpful to provide this support via IFUNC even when glibc is built using --with-cpu=power8, which is the most common scenario in ppc64le. In that scenario, it seems new HWCAP bits for new vectors wouldn't be too frequent, which was the only downside of this proposal. -- Tulio Magno