From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org, David Gibson <dwg@au1.ibm.com>
Subject: Re: [PATCH -V3 2/3] powerpc: Update kernel VSID range
Date: Wed, 13 Mar 2013 19:14:02 +0530 [thread overview]
Message-ID: <874ngfct3x.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <20130313034254.GC21125@iris.ozlabs.ibm.com>
Paul Mackerras <paulus@samba.org> writes:
>> BEGIN_FTR_SECTION
>> b slb_finish_load
>> END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>> @@ -91,24 +97,19 @@ _GLOBAL(slb_miss_kernel_load_vmemmap)
>> _GLOBAL(slb_miss_kernel_load_io)
>> li r11,0
>> 6:
>> - li r9,0x1
>> /*
>> - * for 1T we shift 12 bits more. slb_finish_load_1T will do
>> - * the necessary adjustment
>> + * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
>> */
>> - rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0
>> + rldicl r9,r3,4,62
>> + addis r9,r9,8
>> + subi r9,r9,4
>
> If you did the context calculation earlier, before the "bne cr7,1f",
> you could save 3 more instructions.
We use r9 later as region id in
#ifdef CONFIG_SPARSEMEM_VMEMMAP
/* Check virtual memmap region. To be patches at kernel boot */
cmpldi cr0,r9,0xf
bne 1f
hence i didn't do the above suggested change.
-aneesh
next prev parent reply other threads:[~2013-03-13 13:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-12 12:08 [PATCH -V3 1/3] powerpc: Make VSID_BITS* dependency explicit Aneesh Kumar K.V
2013-03-12 12:08 ` [PATCH -V3 2/3] powerpc: Update kernel VSID range Aneesh Kumar K.V
2013-03-13 3:42 ` Paul Mackerras
2013-03-13 9:17 ` Aneesh Kumar K.V
2013-03-13 9:49 ` Benjamin Herrenschmidt
2013-03-13 13:44 ` Aneesh Kumar K.V [this message]
2013-03-12 12:08 ` [PATCH -V3 3/3] powerpc: rename USER_ESID_BITS* to ESID_BITS* Aneesh Kumar K.V
2013-03-13 3:43 ` Paul Mackerras
2013-03-13 3:43 ` [PATCH -V3 1/3] powerpc: Make VSID_BITS* dependency explicit Paul Mackerras
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