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Mon, 8 Mar 2021 17:53:01 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B559FAE05F; Mon, 8 Mar 2021 17:53:00 +0000 (GMT) Received: from localhost (unknown [9.163.6.5]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTPS; Mon, 8 Mar 2021 17:53:00 +0000 (GMT) From: Fabiano Rosas To: Nicholas Piggin , kvm-ppc@vger.kernel.org Subject: Re: [PATCH v3 20/41] KVM: PPC: Book3S HV P9: Move setting HDEC after switching to guest LPCR In-Reply-To: <20210305150638.2675513-21-npiggin@gmail.com> References: <20210305150638.2675513-1-npiggin@gmail.com> <20210305150638.2675513-21-npiggin@gmail.com> Date: Mon, 08 Mar 2021 14:52:57 -0300 Message-ID: <875z21mt1i.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-08_14:2021-03-08, 2021-03-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 mlxscore=0 clxscore=1015 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103080093 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Nicholas Piggin writes: > LPCR[HDICE]=0 suppresses hypervisor decrementer exceptions on some > processors, so it must be enabled before HDEC is set. > > Rather than set it in the host LPCR then setting HDEC, move the HDEC > update to after the guest MMU context (including LPCR) is loaded. > There shouldn't be much concern with delaying HDEC by some 10s or 100s > of nanoseconds by setting it a bit later. > > Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas > --- > arch/powerpc/kvm/book3s_hv.c | 19 +++++++------------ > 1 file changed, 7 insertions(+), 12 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index 1f2ba8955c6a..ffde1917ab68 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -3505,20 +3505,9 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, > host_dawrx1 = mfspr(SPRN_DAWRX1); > } > > - /* > - * P8 and P9 suppress the HDEC exception when LPCR[HDICE] = 0, > - * so set HDICE before writing HDEC. > - */ > - mtspr(SPRN_LPCR, kvm->arch.host_lpcr | LPCR_HDICE); > - isync(); > - > hdec = time_limit - mftb(); > - if (hdec < 0) { > - mtspr(SPRN_LPCR, kvm->arch.host_lpcr); > - isync(); > + if (hdec < 0) > return BOOK3S_INTERRUPT_HV_DECREMENTER; > - } > - mtspr(SPRN_HDEC, hdec); > > if (vc->tb_offset) { > u64 new_tb = mftb() + vc->tb_offset; > @@ -3564,6 +3553,12 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, > > switch_mmu_to_guest_radix(kvm, vcpu, lpcr); > > + /* > + * P9 suppresses the HDEC exception when LPCR[HDICE] = 0, > + * so set guest LPCR (with HDICE) before writing HDEC. > + */ > + mtspr(SPRN_HDEC, hdec); > + > mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); > mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);