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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Simon Jeons <simon.jeons@gmail.com>
Subject: Re: [PATCH -V5 00/25] THP support for PPC64
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Date: Thu, 04 Apr 2013 14:08:15 +0530
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Simon Jeons <simon.jeons@gmail.com> writes:

> Hi Aneesh,
> On 04/04/2013 01:57 PM, Aneesh Kumar K.V wrote:
>> Hi,
>>
>> This patchset adds transparent hugepage support for PPC64.
>>
>> TODO:
>> * hash preload support in update_mmu_cache_pmd (we don't do that for hugetlb)
>>
>> Some numbers:
>>
>> The latency measurements code from Anton  found at
>> http://ozlabs.org/~anton/junkcode/latency2001.c
>>
>> THP disabled 64K page size
>> ------------------------
>> [root@llmp24l02 ~]# ./latency2001 8G
>>   8589934592    731.73 cycles    205.77 ns
>> [root@llmp24l02 ~]# ./latency2001 8G
>>   8589934592    743.39 cycles    209.05 ns
>
> Could you explain what's the meaning of result?
>

That is the total memory range, cycles taken to access an address and
time taken to access. That numbers shows the overhead of tlb miss.

you can find the source at http://ozlabs.org/~anton/junkcode/latency2001.c


-aneesh