From: Fabiano Rosas <farosas@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, kvm-ppc@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH 06/13] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM
Date: Mon, 22 Feb 2021 19:40:58 -0300 [thread overview]
Message-ID: <87eeh7ybd1.fsf@linux.ibm.com> (raw)
In-Reply-To: <20210219063542.1425130-7-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> Move the GUEST_MODE_SKIP logic into KVM code. This is quite a KVM
> internal detail that has no real need to be in common handlers.
>
> Also add a comment explaining why this this thing exists.
this this
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
> arch/powerpc/kernel/exceptions-64s.S | 60 --------------------------
> arch/powerpc/kvm/book3s_64_entry.S | 64 ++++++++++++++++++++++++----
> 2 files changed, 56 insertions(+), 68 deletions(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index a1640d6ea65d..96f22c582213 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -133,7 +133,6 @@ name:
> #define IBRANCH_TO_COMMON .L_IBRANCH_TO_COMMON_\name\() /* ENTRY branch to common */
> #define IREALMODE_COMMON .L_IREALMODE_COMMON_\name\() /* Common runs in realmode */
> #define IMASK .L_IMASK_\name\() /* IRQ soft-mask bit */
> -#define IKVM_SKIP .L_IKVM_SKIP_\name\() /* Generate KVM skip handler */
> #define IKVM_REAL .L_IKVM_REAL_\name\() /* Real entry tests KVM */
> #define __IKVM_REAL(name) .L_IKVM_REAL_ ## name
> #define IKVM_VIRT .L_IKVM_VIRT_\name\() /* Virt entry tests KVM */
> @@ -191,9 +190,6 @@ do_define_int n
> .ifndef IMASK
> IMASK=0
> .endif
> - .ifndef IKVM_SKIP
> - IKVM_SKIP=0
> - .endif
> .ifndef IKVM_REAL
> IKVM_REAL=0
> .endif
> @@ -254,15 +250,10 @@ do_define_int n
> .balign IFETCH_ALIGN_BYTES
> \name\()_kvm:
>
> - .if IKVM_SKIP
> - cmpwi r10,KVM_GUEST_MODE_SKIP
> - beq 89f
> - .else
> BEGIN_FTR_SECTION
> ld r10,IAREA+EX_CFAR(r13)
> std r10,HSTATE_CFAR(r13)
> END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
> - .endif
>
> ld r10,IAREA+EX_CTR(r13)
> mtctr r10
> @@ -289,27 +280,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
> ori r12,r12,(IVEC)
> .endif
> b kvmppc_interrupt
> -
> - .if IKVM_SKIP
> -89: mtocrf 0x80,r9
> - ld r10,IAREA+EX_CTR(r13)
> - mtctr r10
> - ld r9,IAREA+EX_R9(r13)
> - ld r10,IAREA+EX_R10(r13)
> - ld r11,IAREA+EX_R11(r13)
> - ld r12,IAREA+EX_R12(r13)
> - .if IHSRR_IF_HVMODE
> - BEGIN_FTR_SECTION
> - b kvmppc_skip_Hinterrupt
> - FTR_SECTION_ELSE
> - b kvmppc_skip_interrupt
> - ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
> - .elseif IHSRR
> - b kvmppc_skip_Hinterrupt
> - .else
> - b kvmppc_skip_interrupt
> - .endif
> - .endif
> .endm
>
> #else
> @@ -1128,7 +1098,6 @@ INT_DEFINE_BEGIN(machine_check)
> ISET_RI=0
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(machine_check)
>
> @@ -1419,7 +1388,6 @@ INT_DEFINE_BEGIN(data_access)
> IVEC=0x300
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(data_access)
>
> @@ -1465,7 +1433,6 @@ INT_DEFINE_BEGIN(data_access_slb)
> IVEC=0x380
> IRECONCILE=0
> IDAR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> INT_DEFINE_END(data_access_slb)
>
> @@ -2111,7 +2078,6 @@ INT_DEFINE_BEGIN(h_data_storage)
> IHSRR=1
> IDAR=1
> IDSISR=1
> - IKVM_SKIP=1
> IKVM_REAL=1
> IKVM_VIRT=1
> INT_DEFINE_END(h_data_storage)
> @@ -3088,32 +3054,6 @@ EXPORT_SYMBOL(do_uaccess_flush)
> MASKED_INTERRUPT
> MASKED_INTERRUPT hsrr=1
>
> -#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
> -kvmppc_skip_interrupt:
> - /*
> - * Here all GPRs are unchanged from when the interrupt happened
> - * except for r13, which is saved in SPRG_SCRATCH0.
> - */
> - mfspr r13, SPRN_SRR0
> - addi r13, r13, 4
> - mtspr SPRN_SRR0, r13
> - GET_SCRATCH0(r13)
> - RFI_TO_KERNEL
> - b .
> -
> -kvmppc_skip_Hinterrupt:
> - /*
> - * Here all GPRs are unchanged from when the interrupt happened
> - * except for r13, which is saved in SPRG_SCRATCH0.
> - */
> - mfspr r13, SPRN_HSRR0
> - addi r13, r13, 4
> - mtspr SPRN_HSRR0, r13
> - GET_SCRATCH0(r13)
> - HRFI_TO_KERNEL
> - b .
> -#endif
> -
> /*
> * Relocation-on interrupts: A subset of the interrupts can be delivered
> * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
> diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
> index 147ebf1c3c1f..820d103e5f50 100644
> --- a/arch/powerpc/kvm/book3s_64_entry.S
> +++ b/arch/powerpc/kvm/book3s_64_entry.S
> @@ -1,9 +1,10 @@
> +#include <asm/asm-offsets.h>
> #include <asm/cache.h>
> -#include <asm/ppc_asm.h>
> +#include <asm/exception-64s.h>
> #include <asm/kvm_asm.h>
> -#include <asm/reg.h>
> -#include <asm/asm-offsets.h>
> #include <asm/kvm_book3s_asm.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/reg.h>
>
> /*
> * This is branched to from interrupt handlers in exception-64s.S which set
> @@ -19,17 +20,64 @@ kvmppc_interrupt:
> * guest R12 saved in shadow VCPU SCRATCH0
> * guest R13 saved in SPRN_SCRATCH0
> */
> + std r9,HSTATE_SCRATCH2(r13)
> + lbz r9,HSTATE_IN_GUEST(r13)
> + cmpwi r9,KVM_GUEST_MODE_SKIP
> + beq- .Lmaybe_skip
> +.Lno_skip:
> #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> - std r9, HSTATE_SCRATCH2(r13)
> - lbz r9, HSTATE_IN_GUEST(r13)
> - cmpwi r9, KVM_GUEST_MODE_HOST_HV
> + cmpwi r9,KVM_GUEST_MODE_HOST_HV
> beq kvmppc_bad_host_intr
> #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
> - cmpwi r9, KVM_GUEST_MODE_GUEST
> - ld r9, HSTATE_SCRATCH2(r13)
> + cmpwi r9,KVM_GUEST_MODE_GUEST
> + ld r9,HSTATE_SCRATCH2(r13)
> beq kvmppc_interrupt_pr
> #endif
> b kvmppc_interrupt_hv
> #else
> b kvmppc_interrupt_pr
> #endif
> +
> +/*
> + * KVM uses a trick where it is running in MSR[HV]=1 mode in real-mode with the
> + * guest MMU context loaded, and it sets KVM_GUEST_MODE_SKIP and enables
> + * MSR[DR]=1 while leaving MSR[IR]=0, so it continues to fetch HV instructions
> + * but loads and stores will access the guest context. This is used to load
> + * the faulting instruction without walking page tables.
> + *
> + * However the guest context may not be able to translate, or it may cause a
> + * machine check or other issue, which will result in a fault in the host
> + * (even with KVM-HV).
> + *
> + * These faults are caught here and if the fault was (or was likely) due to
> + * that load, then we just return with the PC advanced +4 and skip the load,
> + * which then goes via the slow path.
> + */
> +.Lmaybe_skip:
> + cmpwi r12,BOOK3S_INTERRUPT_MACHINE_CHECK
> + beq 1f
> + cmpwi r12,BOOK3S_INTERRUPT_DATA_STORAGE
> + beq 1f
> + cmpwi r12,BOOK3S_INTERRUPT_DATA_SEGMENT
> + beq 1f
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> + cmpwi r12,BOOK3S_INTERRUPT_H_DATA_STORAGE | 0x2
> + beq 2f
> +#endif
> + b .Lno_skip
> +1: mfspr r9,SPRN_SRR0
> + addi r9,r9,4
> + mtspr SPRN_SRR0,r9
> + ld r12,HSTATE_SCRATCH0(r13)
> + ld r9,HSTATE_SCRATCH2(r13)
> + GET_SCRATCH0(r13)
> + RFI_TO_KERNEL
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> +2: mfspr r9,SPRN_HSRR0
> + addi r9,r9,4
> + mtspr SPRN_HSRR0,r9
> + ld r12,HSTATE_SCRATCH0(r13)
> + ld r9,HSTATE_SCRATCH2(r13)
> + GET_SCRATCH0(r13)
> + HRFI_TO_KERNEL
> +#endif
next prev parent reply other threads:[~2021-02-22 22:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 6:35 [PATCH 00/13] KVM: PPC: Book3S: C-ify the P9 entry/exit code Nicholas Piggin
2021-02-19 6:35 ` [PATCH 01/13] powerpc/64s: Remove KVM handler support from CBE_RAS interrupts Nicholas Piggin
2021-02-22 22:22 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 02/13] powerpc/64s: remove KVM SKIP test from instruction breakpoint handler Nicholas Piggin
2021-02-22 22:22 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 03/13] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR Nicholas Piggin
2021-02-22 22:23 ` Fabiano Rosas
2021-02-19 6:35 ` [PATCH 04/13] KVM: PPC: Book3S 64: remove unused kvmppc_h_protect argument Nicholas Piggin
2021-02-19 6:35 ` [PATCH 05/13] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point Nicholas Piggin
2021-02-19 6:35 ` [PATCH 06/13] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM Nicholas Piggin
2021-02-22 22:40 ` Fabiano Rosas [this message]
2021-02-19 6:35 ` [PATCH 07/13] KVM: PPC: Book3S 64: add hcall interrupt handler Nicholas Piggin
2021-02-19 6:35 ` [PATCH 08/13] KVM: PPC: Book3S HV: Move hcall early register setup to KVM Nicholas Piggin
2021-02-19 6:35 ` [PATCH 09/13] KVM: PPC: Book3S HV: Move interrupt " Nicholas Piggin
2021-02-19 6:35 ` [PATCH 10/13] KVM: PPC: Book3S HV: move bad_host_intr check to HV handler Nicholas Piggin
2021-02-19 6:35 ` [PATCH 11/13] KVM: PPC: Book3S HV: Minimise hcall handler calling convention differences Nicholas Piggin
2021-02-19 6:35 ` [PATCH 12/13] KVM: PPC: Book3S HV: Move radix MMU switching together in the P9 path Nicholas Piggin
2021-02-24 20:36 ` Fabiano Rosas
2021-02-25 10:59 ` Nicholas Piggin
2021-02-19 6:35 ` [PATCH 13/13] KVM: PPC: Book3S HV: Implement the rest of the P9 entry/exit handling in C Nicholas Piggin
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