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From: "Björn Töpel" <bjorn@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Atish Patra <atishp@atishpatra.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	linux-serial@vger.kernel.org, kvm@vger.kernel.org,
	Atish Patra <atishp@rivosinc.com>,
	linux-kernel@vger.kernel.org, Conor Dooley <conor@kernel.org>,
	kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v2 7/8] tty: Add SBI debug console support to HVC SBI driver
Date: Thu, 12 Oct 2023 13:38:44 +0200	[thread overview]
Message-ID: <87fs2ghxyz.fsf@all.your.base.are.belong.to.us> (raw)
In-Reply-To: <20231012051509.738750-8-apatel@ventanamicro.com>

Anup Patel <apatel@ventanamicro.com> writes:

> From: Atish Patra <atishp@rivosinc.com>
>
> RISC-V SBI specification supports advanced debug console
> support via SBI DBCN extension.
>
> Extend the HVC SBI driver to support it.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  drivers/tty/hvc/Kconfig         |  2 +-
>  drivers/tty/hvc/hvc_riscv_sbi.c | 76 ++++++++++++++++++++++++++++++---
>  2 files changed, 70 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
> index 4f9264d005c0..6e05c5c7bca1 100644
> --- a/drivers/tty/hvc/Kconfig
> +++ b/drivers/tty/hvc/Kconfig
> @@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP
>  
>  config HVC_RISCV_SBI
>  	bool "RISC-V SBI console support"
> -	depends on RISCV_SBI_V01
> +	depends on RISCV_SBI
>  	select HVC_DRIVER
>  	help
>  	  This enables support for console output via RISC-V SBI calls, which
> diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
> index 31f53fa77e4a..da318d7f55c5 100644
> --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> @@ -39,21 +39,83 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count)
>  	return i;
>  }
>  
> -static const struct hv_ops hvc_sbi_ops = {
> +static const struct hv_ops hvc_sbi_v01_ops = {
>  	.get_chars = hvc_sbi_tty_get,
>  	.put_chars = hvc_sbi_tty_put,
>  };
>  
> -static int __init hvc_sbi_init(void)
> +static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
>  {
> -	return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
> +	phys_addr_t pa;
> +	struct sbiret ret;
> +
> +	if (is_vmalloc_addr(buf))
> +		pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);

What is assumed from buf here? If buf is crossing a page, you need to
adjust the count, no?

> +	else
> +		pa = __pa(buf);
> +
> +	if (IS_ENABLED(CONFIG_32BIT))
> +		ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> +				count, lower_32_bits(pa), upper_32_bits(pa),
> +				0, 0, 0);
> +	else
> +		ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
> +				count, pa, 0, 0, 0, 0);
> +	if (ret.error)
> +		return 0;
> +
> +	return count;
>  }
> -device_initcall(hvc_sbi_init);
>  
> -static int __init hvc_sbi_console_init(void)
> +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
>  {
> -	hvc_instantiate(0, 0, &hvc_sbi_ops);
> +	phys_addr_t pa;
> +	struct sbiret ret;
> +
> +	if (is_vmalloc_addr(buf))
> +		pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);

And definitely adjust count here, if we're crossing a page!


Björn

  reply	other threads:[~2023-10-12 11:39 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-12  5:15 [PATCH v2 0/8] RISC-V SBI debug console extension support Anup Patel
2023-10-12  5:15 ` [PATCH v2 1/8] RISC-V: Add defines for SBI debug console extension Anup Patel
2023-10-19  7:44   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 2/8] RISC-V: KVM: Change the SBI specification version to v2.0 Anup Patel
2023-10-19  7:46   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 3/8] RISC-V: KVM: Allow some SBI extensions to be disabled by default Anup Patel
2023-10-19  7:57   ` Andrew Jones
2023-10-20  5:26     ` Anup Patel
2023-10-12  5:15 ` [PATCH v2 4/8] RISC-V: KVM: Forward SBI DBCN extension to user-space Anup Patel
2023-10-19  8:01   ` Andrew Jones
2023-10-19  9:17   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 5/8] RISC-V: Add inline version of sbi_console_putchar/getchar() functions Anup Patel
2023-10-19  8:03   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 6/8] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
2023-10-19  8:27   ` Andrew Jones
2023-10-12  5:15 ` [PATCH v2 7/8] tty: Add SBI debug console support to HVC SBI driver Anup Patel
2023-10-12 11:38   ` Björn Töpel [this message]
2023-10-13 15:41     ` Anup Patel
2023-10-12  5:15 ` [PATCH v2 8/8] RISC-V: Enable SBI based earlycon support Anup Patel
2023-10-19  8:46   ` Andrew Jones

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