From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1BE44C4332F for ; Wed, 16 Nov 2022 22:52:52 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4NCJGp1wZNz3dvb for ; Thu, 17 Nov 2022 09:52:50 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=linutronix.de header.i=@linutronix.de header.a=rsa-sha256 header.s=2020 header.b=sZmX6Yg3; dkim=fail reason="signature verification failed" header.d=linutronix.de header.i=@linutronix.de header.a=ed25519-sha256 header.s=2020e header.b=57u6ql1e; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linutronix.de (client-ip=193.142.43.55; helo=galois.linutronix.de; envelope-from=tglx@linutronix.de; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=linutronix.de header.i=@linutronix.de header.a=rsa-sha256 header.s=2020 header.b=sZmX6Yg3; dkim=pass header.d=linutronix.de header.i=@linutronix.de header.a=ed25519-sha256 header.s=2020e header.b=57u6ql1e; dkim-atps=neutral Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4NCJFp4FmYz3cJX for ; Thu, 17 Nov 2022 09:51:58 +1100 (AEDT) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668639114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=og7VFGWgga/WDNrUO7ZE1y9YFk0rZZz1Y7SQa3rc/Bo=; b=sZmX6Yg3XezzZ2hq1tZefSPYyfecyqklALECXScfxof5PazPB2pQMWRIq3wUTu43H8z6hb WEwyl4EmYgpScWUlFaXeaT282S6rdI53Thh1Za1i6LXUb+psAzFJsG3vdZDfFLVyvw/JCw cwNu2XjbgPipQlBYCSry4kJc84H4Kg8smh1T7pMdbtgloyQJlj9sRzAx4eomTMleUHdPKo hlT3wRrONZpVSFl2GOjlxVJkbhazs1D90M/bX1BePMGs/NwN3nEx3gsHEQESH0iRS6Cpju DVXaRP9DDJutgsollRsjdoUnbJGLLBgUHHoh6qVhBUkccGZHxhG2kB4lpTMsRQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668639114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=og7VFGWgga/WDNrUO7ZE1y9YFk0rZZz1Y7SQa3rc/Bo=; b=57u6ql1eCbyCY2SupG0ktAPUYRyn+XthnjW8tkxBEfsMcHX0R/8u/XSsMZf/nZLpWEX8UW CM5vMBglNyqiNVAA== To: Jason Gunthorpe Subject: Re: [patch 13/39] PCI/MSI: Use msi_domain_info::bus_token In-Reply-To: References: <20221111120501.026511281@linutronix.de> <20221111122014.352437595@linutronix.de> Date: Wed, 16 Nov 2022 23:51:54 +0100 Message-ID: <87fseio6lx.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, Will Deacon , Marc Zyngier , Lorenzo Pieralisi , Dave Jiang , Ashok Raj , Joerg Roedel , x86@kernel.org, Allen Hubbe , Kevin Tian , "Ahmed S. Darwish" , Jon Mason , Alex Williamson , Bjorn Helgaas , Dan Williams , Reinette Chatre , linuxppc-dev@lists.ozlabs.org, LKML , Greg Kroah-Hartman , Logan Gunthorpe Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Nov 16 2022 at 13:51, Jason Gunthorpe wrote: > On Fri, Nov 11, 2022 at 02:54:35PM +0100, Thomas Gleixner wrote: >> /* PCI-MSI is oneshot-safe */ >> info->chip->flags |= IRQCHIP_ONESHOT_SAFE; >> + /* Let the core update the bus token */ >> + info->bus_token = DOMAIN_BUS_PCI_MSI; > > comment seems a bit obvious :) > Reviewed-by: Jason Gunthorpe > > Should the callers be updated to set this in their "struct > msi_domain_info" ? For PCI/MSI we can handle that in the core for all of them. :) The other msi_domain_info usage in various places needs obviously special care. Thanks, tglx