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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 9 Apr 2019 09:18:27 +0100 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x398IQmH42467398 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 9 Apr 2019 08:18:26 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B9CE0A4062; Tue, 9 Apr 2019 08:18:26 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4CF57A405C; Tue, 9 Apr 2019 08:18:25 +0000 (GMT) Received: from skywalker.linux.ibm.com (unknown [9.85.92.227]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 9 Apr 2019 08:18:25 +0000 (GMT) X-Mailer: emacs 26.1 (via feedmail 11-beta-1 I) From: "Aneesh Kumar K.V" To: Michael Ellerman , linuxppc-dev@ozlabs.org Subject: Re: [PATCH] powerpc/mm: Define MAX_PHYSMEM_BITS for all 64-bit configs In-Reply-To: <20190409060324.16941-1-mpe@ellerman.id.au> References: <20190409060324.16941-1-mpe@ellerman.id.au> Date: Tue, 09 Apr 2019 13:48:23 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 x-cbid: 19040908-0016-0000-0000-0000026CD47E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19040908-0017-0000-0000-000032C8FB9F Message-Id: <87imvnmw1c.fsf@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-09_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904090055 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: schwab@linux-m68k.org, hughd@google.com, aneesh.kumar@linux.vnet.ibm.com, ben@decadent.org.uk Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Michael Ellerman writes: > The recent commit 8bc086899816 ("powerpc/mm: Only define > MAX_PHYSMEM_BITS in SPARSEMEM configurations") removed our definition > of MAX_PHYSMEM_BITS when SPARSEMEM is disabled. > > This inadvertently broke some 64-bit FLATMEM using configs with eg: > > arch/powerpc/include/asm/book3s/64/mmu-hash.h:584:6: error: "MAX_PHYSMEM_BITS" is not defined, evaluates to 0 > #if (MAX_PHYSMEM_BITS > MAX_EA_BITS_PER_CONTEXT) > ^~~~~~~~~~~~~~~~ > > Fix it by making sure we define MAX_PHYSMEM_BITS for all 64-bit > configs regardless of SPARSEMEM. Reviewed-by: Aneesh Kumar K.V But I still like the patch I posted which move this to the correct platform header. > > Fixes: 8bc086899816 ("powerpc/mm: Only define MAX_PHYSMEM_BITS in SPARSEMEM configurations") > Reported-by: Andreas Schwab > Reported-by: Hugh Dickins > Signed-off-by: Michael Ellerman > --- > arch/powerpc/include/asm/mmu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h > index 598cdcdd1355..8ddd4a91bdc1 100644 > --- a/arch/powerpc/include/asm/mmu.h > +++ b/arch/powerpc/include/asm/mmu.h > @@ -352,7 +352,7 @@ static inline bool strict_kernel_rwx_enabled(void) > #if defined(CONFIG_SPARSEMEM_VMEMMAP) && defined(CONFIG_SPARSEMEM_EXTREME) && \ > defined (CONFIG_PPC_64K_PAGES) > #define MAX_PHYSMEM_BITS 51 > -#elif defined(CONFIG_SPARSEMEM) > +#elif defined(CONFIG_PPC64) > #define MAX_PHYSMEM_BITS 46 > #endif > > -- > 2.20.1