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 Fri, 16 Feb 2018 10:02:56 -0000
From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: Frederic Barrat <fbarrat@linux.vnet.ibm.com>,
 Christophe Lombard <clombard@linux.vnet.ibm.com>,
 linuxppc-dev@lists.ozlabs.org, andrew.donnellan@au1.ibm.com
Subject: Re: [PATCH V2] cxl: Fix timebase synchronization status on P9
In-Reply-To: <d2f3a000-267f-35cb-484d-7c65371b1ead@linux.vnet.ibm.com>
References: <1518713524-1500-1-git-send-email-clombard@linux.vnet.ibm.com>
 <d2f3a000-267f-35cb-484d-7c65371b1ead@linux.vnet.ibm.com>
Date: Fri, 16 Feb 2018 15:32:51 +0530
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Frederic Barrat <fbarrat@linux.vnet.ibm.com> writes:

> I'm also wondering if it wouldn't be simpler to always update the 
> timebase_synced flag dynamically, even on p8. That way we wouldn't need 
> to have the p8 specific code to check for synchronization in 
> cxl_setup_psl_timebase(). p8 and p9 code would be the same.

I am wondering if we can have an implementation like this:

static ssize_t psl_timebase_synced_show(struct device *device,
{
  	struct cxl *adapter = to_cxl_adapter(device);
        
        /* if not already synced than force a resync */
        if (!adapter->psl_timebase_synced)
                /* Choose appropriate PSL implementation */
                adapter->native->sl_ops->psl_sync_timebase(adapter);

   	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
}

In case of PSL9 if timebase request from PSL->CAPP fails then PSL will
send an error interrupt. This can be used to set the
'psl_timebase_synced' flag back to false if timebase ever fails.

-- 
Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Linux Technology Center, IBM India Pvt. Ltd.