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AJvYcCXIOx525KYP8y3ztRHh4OzVa8Ll7lA0XO8aUzvQNmVe6fY8rvgCK1IYmGuRVe5urCO1o0fzJySohxExGk8=@lists.ozlabs.org X-Gm-Message-State: AOJu0Yxbgc7IiycIvwe043k0ju3JxnndwoomiAUx5I5ukosf9qiTIBNY V1ZXxEh41uZC7gxZCSqMVDCrlKySxdm/vfVSJmeNybVRRqYxVEPA X-Gm-Gg: ASbGncv8+TkKddli8BynP8nB+j7x8qozAeNruyKuf52i3IO4TZKv+Aiit9LQLc4R7B2 BZup0J5SreKB78pTLUtHORAgwfh8Atjb7sZyLPPzVd6CY7q9cCAuUr3pGsIw4NzXIvN9BdpDWEF ulq9cMYYT0d1n2/h5XKsEjzW+MtO70k3u67D5NBKdihsstmIsAgNH6KmTq3E04G2ZlKXxIwFfIO oVy0ne3IwTcRCytfoSS7QsAiTTtlaJ2e0vE17+4jC7XSbaY X-Google-Smtp-Source: AGHT+IHQdKqTwbYiK/nAlWC/6KumIvaC+qTQc/SilPBS3OQGqUFXiS/0kAwbi+fQRJYCJkv76bVryg== X-Received: by 2002:a05:6a20:72a1:b0:1e0:ae58:2945 with SMTP id adf61e73a8af0-1e88d0afc33mr28533903637.31.1736615456851; Sat, 11 Jan 2025 09:10:56 -0800 (PST) Received: from dw-tp ([171.76.81.42]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72d4056bc88sm3302165b3a.67.2025.01.11.09.10.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Jan 2025 09:10:56 -0800 (PST) From: Ritesh Harjani (IBM) To: Christophe Leroy , Michael Ellerman , Nicholas Piggin , Naveen N Rao , Madhavan Srinivasan Cc: Christophe Leroy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, kernel test robot Subject: Re: [PATCH] powerpc/64s: Rewrite __real_pte() as a static inline In-Reply-To: <06750dbc7bf961e3ea7ef7a89d5c220972465ea5.1736331264.git.christophe.leroy@csgroup.eu> Date: Sat, 11 Jan 2025 22:33:04 +0530 Message-ID: <87o70duvuf.fsf@gmail.com> References: <06750dbc7bf961e3ea7ef7a89d5c220972465ea5.1736331264.git.christophe.leroy@csgroup.eu> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Christophe Leroy writes: > Rewrite __real_pte() as a static inline in order to avoid > following warning/error when building with 4k page size: > > CC arch/powerpc/mm/book3s64/hash_tlb.o > arch/powerpc/mm/book3s64/hash_tlb.c: In function 'hpte_need_flush': > arch/powerpc/mm/book3s64/hash_tlb.c:49:16: error: variable 'offset' set but not used [-Werror=unused-but-set-variable] > 49 | int i, offset; > | ^~~~~~ > cc1: all warnings being treated as errors > > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202501081741.AYFwybsq-lkp@intel.com/ Great. Why not fix the other warning as well which is reported in above link, which is... -- arch/powerpc/mm/book3s64/hash_native.c: In function 'native_flush_hash_range': >> arch/powerpc/mm/book3s64/hash_native.c:786:29: warning: variable 'index' set but not used [-Wunused-but-set-variable] 786 | unsigned long hash, index, hidx, shift, slot; -- ...similar to how we fixed this warning by making the macro as static inline? That means something like this (not tested)? -#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT) +static inline unsigned long __rpte_to_hidx(real_pte_t r, unsigned long index) +{ + return pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT; +} -ritesh > Fixes: ff31e105464d ("powerpc/mm/hash64: Store the slot information at the right offset for hugetlb") > Signed-off-by: Christophe Leroy > --- > arch/powerpc/include/asm/book3s/64/hash-4k.h | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h > index c3efacab4b94..a7a68ba9c71b 100644 > --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h > +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h > @@ -77,7 +77,10 @@ > /* > * With 4K page size the real_pte machinery is all nops. > */ > -#define __real_pte(e, p, o) ((real_pte_t){(e)}) > +static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset) > +{ > + return (real_pte_t){pte}; > +} > #define __rpte_to_pte(r) ((r).pte) > #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT) > > -- > 2.47.0