From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vzGPD2MGlzDqJ2 for ; Thu, 6 Apr 2017 18:40:16 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v368YoH2098787 for ; Thu, 6 Apr 2017 04:40:01 -0400 Received: from e35.co.us.ibm.com (e35.co.us.ibm.com [32.97.110.153]) by mx0b-001b2d01.pphosted.com with ESMTP id 29ndvr4tnm-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 06 Apr 2017 04:40:01 -0400 Received: from localhost by e35.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 6 Apr 2017 02:40:00 -0600 From: Stewart Smith To: Madhavan Srinivasan , mpe@ellerman.id.au Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, ego@linux.vnet.ibm.com, bsingharora@gmail.com, benh@kernel.crashing.org, paulus@samba.org, anton@samba.org, sukadev@linux.vnet.ibm.com, mikey@neuling.org, dja@axtens.net, eranian@google.com, Hemant Kumar , Anju T Sudhakar , Madhavan Srinivasan Subject: Re: [PATCH v6 01/11] powerpc/powernv: Data structure and macros definitions In-Reply-To: <1491231308-15282-2-git-send-email-maddy@linux.vnet.ibm.com> References: <1491231308-15282-1-git-send-email-maddy@linux.vnet.ibm.com> <1491231308-15282-2-git-send-email-maddy@linux.vnet.ibm.com> Date: Thu, 06 Apr 2017 18:39:48 +1000 MIME-Version: 1.0 Content-Type: text/plain Message-Id: <87o9wahquj.fsf@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Madhavan Srinivasan writes: > +#define IMC_MAX_CHIPS 32 > +#define IMC_MAX_PMUS 32 The max chips and PMUs we'd be able to work out from the device tre though, right? We could just allocate the correct amount of memory on boot. We may hot plug/unplug CPUs, but we're not doing that from a hardware level, what CPUs you get in the DT on PowerNV on boot is all you're getting. -- Stewart Smith OPAL Architect, IBM.