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Mon, 7 Mar 2022 23:19:55 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F69AC6061; Mon, 7 Mar 2022 23:19:55 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B7724C6057; Mon, 7 Mar 2022 23:19:54 +0000 (GMT) Received: from localhost (unknown [9.211.158.32]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTPS; Mon, 7 Mar 2022 23:19:54 +0000 (GMT) From: Fabiano Rosas To: Nicholas Piggin , linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH 2/6] KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry In-Reply-To: <20220303053315.1056880-3-npiggin@gmail.com> References: <20220303053315.1056880-1-npiggin@gmail.com> <20220303053315.1056880-3-npiggin@gmail.com> Date: Mon, 07 Mar 2022 20:19:52 -0300 Message-ID: <87pmmx9wpz.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Y4TfQ3b3H_-ZI3kC_GK0TNqUGMSSKcjV X-Proofpoint-GUID: c_WZQ9T3Us9N4ywe7ZcHLJWouKk9OOW0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-07_12,2022-03-04_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 mlxscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 phishscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203070118 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?Q?C=C3=A9dric?= Le Goater , Nicholas Piggin Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Nicholas Piggin writes: > If there is a pending xive interrupt, inject it at guest entry (if > MSR[EE] is enabled) rather than take another interrupt when the guest > is entered. If xive is enabled then LPCR[LPES] is set so this behaviour > should be expected. > > Signed-off-by: Nicholas Piggin > --- > arch/powerpc/kvm/book3s_hv.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > index f8c0f1f52a1e..5df359053147 100644 > --- a/arch/powerpc/kvm/book3s_hv.c > +++ b/arch/powerpc/kvm/book3s_hv.c > @@ -4524,9 +4524,14 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, > > if (!nested) { > kvmppc_core_prepare_to_enter(vcpu); > - if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, > - &vcpu->arch.pending_exceptions)) > + if (vcpu->arch.shregs.msr & MSR_EE) { > + if (xive_interrupt_pending(vcpu)) > + kvmppc_inject_interrupt_hv(vcpu, > + BOOK3S_INTERRUPT_EXTERNAL, 0); > + } else if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, > + &vcpu->arch.pending_exceptions)) { > lpcr |= LPCR_MER; > + } > } else if (vcpu->arch.pending_exceptions || > vcpu->arch.doorbell_request || > xive_interrupt_pending(vcpu)) { Reviewed-by: Fabiano Rosas