linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: Guenter Roeck <linux@roeck-us.net>
Cc: npiggin@gmail.com, linux-mm@kvack.org, kaleshsingh@google.com,
	joel@joelfernandes.org, akpm@linux-foundation.org,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument
Date: Mon, 17 May 2021 19:25:46 +0530	[thread overview]
Message-ID: <87pmxpqxb1.fsf@linux.ibm.com> (raw)
In-Reply-To: <d830fce9-c00a-e879-4115-94a2346a806f@roeck-us.net>

Guenter Roeck <linux@roeck-us.net> writes:

> On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote:
>> On 5/15/21 10:05 PM, Guenter Roeck wrote:
>>> On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote:

...

>>>   extern void radix__local_flush_all_mm(struct mm_struct *mm);
>>>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>> index 215973b4cb26..f9f8a3a264f7 100644
>>>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h
>>>> @@ -45,13 +45,30 @@ static inline void tlbiel_all_lpid(bool radix)
>>>>           hash__tlbiel_all(TLB_INVAL_SCOPE_LPID);
>>>>   }
>>>> +static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *vma,
>>>                   ^^^^
>>>> +                       unsigned long start,
>>>> +                       unsigned long end,
>>>> +                       bool flush_pwc)
>>>> +{
>>>> +    if (radix_enabled())
>>>> +        return radix__flush_pmd_tlb_range(vma, start, end, flush_pwc);
>>>> +    return hash__flush_tlb_range(vma, start, end);
>>>          ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>>>
>>>> +}
>> 
>> In this specific case we won't have  build errors because,
>> 
>> static inline void hash__flush_tlb_range(struct vm_area_struct *vma,
>>                       unsigned long start, unsigned long end)
>> {
>> 
>
> Sorry, you completely lost me.
>
> Building parisc:allnoconfig ... failed
> --------------
> Error log:
> In file included from arch/parisc/include/asm/cacheflush.h:7,
>                   from include/linux/highmem.h:12,
>                   from include/linux/pagemap.h:11,
>                   from include/linux/ksm.h:13,
>                   from mm/mremap.c:14:
> mm/mremap.c: In function 'flush_pte_tlb_pwc_range':
> arch/parisc/include/asm/tlbflush.h:20:2: error: 'return' with a value, in function returning void

As replied here
https://lore.kernel.org/mm-commits/8eedb441-a612-1ec8-8bf7-b40184de9f6f@linux.ibm.com/

That was the generic header change in the patch. I was commenting about the
ppc64 specific change causing build failures.

-aneesh


  reply	other threads:[~2021-05-17 13:56 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-22  5:43 [PATCH v5 0/9] Speedup mremap on ppc64 Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 1/9] selftest/mremap_test: Update the test to handle pagesize other than 4K Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 2/9] selftest/mremap_test: Avoid crash with static build Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 3/9] mm/mremap: Use pmd/pud_poplulate to update page table entries Aneesh Kumar K.V
2021-05-18 20:04   ` Nathan Chancellor
2021-05-19  4:46     ` Aneesh Kumar K.V
2021-05-19 18:02       ` Nathan Chancellor
2021-05-20  2:18       ` Peter Xu
2021-05-20  8:26         ` Aneesh Kumar K.V
2021-05-20 12:46           ` Peter Xu
2021-05-20 13:23             ` Aneesh Kumar K.V
2021-05-20 13:37               ` Aneesh Kumar K.V
2021-05-20 14:57                 ` Peter Xu
2021-05-20 19:06                   ` Zi Yan
2021-05-20 20:01                     ` Peter Xu
2021-05-20 20:25                       ` Kalesh Singh
2021-04-22  5:43 ` [PATCH v5 4/9] powerpc/mm/book3s64: Fix possible build error Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument Aneesh Kumar K.V
2021-05-15 16:35   ` Guenter Roeck
2021-05-15 20:41     ` Andrew Morton
2021-05-15 23:05       ` Guenter Roeck
2021-05-17  8:40     ` Aneesh Kumar K.V
2021-05-17 13:38       ` Guenter Roeck
2021-05-17 13:55         ` Aneesh Kumar K.V [this message]
2021-05-17 14:18           ` Guenter Roeck
2021-05-19  0:26             ` Michael Ellerman
2021-05-19  0:45               ` Segher Boessenkool
2021-05-19 12:03                 ` Segher Boessenkool
2021-05-19 13:37                   ` Guenter Roeck
2021-05-19 14:20                     ` Segher Boessenkool
2021-05-19 15:28                       ` Guenter Roeck
2021-05-20  7:37                   ` Michael Ellerman
2021-05-20 12:17                     ` Segher Boessenkool
2021-05-19  1:08               ` Guenter Roeck
2021-05-20 11:38                 ` Michael Ellerman
2021-05-20 11:56                   ` Guenter Roeck
2021-04-22  5:43 ` [PATCH v5 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 7/9] mm/mremap: Move TLB flush outside page table lock Aneesh Kumar K.V
2021-05-20 15:26   ` Aneesh Kumar K.V
2021-05-20 16:57     ` Aneesh Kumar K.V
2021-05-21  2:40       ` Linus Torvalds
2021-05-21  3:03         ` Aneesh Kumar K.V
2021-05-21  3:28           ` Aneesh Kumar K.V
2021-05-21  6:13           ` Linus Torvalds
2021-05-21 12:50             ` Aneesh Kumar K.V
2021-05-21 13:03               ` Aneesh Kumar K.V
2021-05-21 16:03                 ` Linus Torvalds
2021-05-21 16:29                   ` Aneesh Kumar K.V
2021-05-24 14:24                   ` Aneesh Kumar K.V
2021-05-21 15:24               ` Liam Howlett
2021-05-21 16:02                 ` Aneesh Kumar K.V
2021-05-21 16:05                 ` Linus Torvalds
2021-04-22  5:43 ` [PATCH v5 8/9] mm/mremap: Allow arch runtime override Aneesh Kumar K.V
2021-04-22  5:43 ` [PATCH v5 9/9] powerpc/mm: Enable move pmd/pud Aneesh Kumar K.V
2021-05-11 22:19   ` Andrew Morton

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87pmxpqxb1.fsf@linux.ibm.com \
    --to=aneesh.kumar@linux.ibm.com \
    --cc=akpm@linux-foundation.org \
    --cc=joel@joelfernandes.org \
    --cc=kaleshsingh@google.com \
    --cc=linux-mm@kvack.org \
    --cc=linux@roeck-us.net \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=npiggin@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).