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Tue, 17 Aug 2021 14:22:00 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB701AE05C; Tue, 17 Aug 2021 14:21:59 +0000 (GMT) Received: from localhost (unknown [9.211.107.102]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTPS; Tue, 17 Aug 2021 14:21:59 +0000 (GMT) From: Fabiano Rosas To: Michael Ellerman , linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH] powerpc/mm: Fix set_memory_*() against concurrent accesses In-Reply-To: <20210817132552.3375738-1-mpe@ellerman.id.au> References: <20210817132552.3375738-1-mpe@ellerman.id.au> Date: Tue, 17 Aug 2021 11:21:56 -0300 Message-ID: <87sfz8tam3.fsf@linux.ibm.com> Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BGmtHnpAHNW6iz2jE7TYUH7syzT6jU3v X-Proofpoint-ORIG-GUID: IIR09Qr-vNCTcFtiMJxCTq23FBgLY1s_ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-17_04:2021-08-17, 2021-08-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 malwarescore=0 spamscore=0 priorityscore=1501 mlxlogscore=999 phishscore=0 clxscore=1015 adultscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108170086 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, jniethe5@gmail.com, npiggin@gmail.com, aneesh.kumar@linux.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Michael Ellerman writes: Hi, I already mentioned these things in private, but I'll post here so everyone can see: > Because pte_update() takes the set of PTE bits to set and clear we can't > use our existing helpers, eg. pte_wrprotect() etc. and instead have to > open code the set of flags. We will clean that up somehow in a future > commit. I tested the following on P9 and it seems to work fine. Not sure if it works for CONFIG_PPC_8xx, though. static int change_page_attr(pte_t *ptep, unsigned long addr, void *data) { long action = (long)data; pte_t pte; spin_lock(&init_mm.page_table_lock); - - /* invalidate the PTE so it's safe to modify */ - pte = ptep_get_and_clear(&init_mm, addr, ptep); - flush_tlb_kernel_range(addr, addr + PAGE_SIZE); + pte = *ptep; /* modify the PTE bits as desired, then apply */ switch (action) { @@ -59,11 +42,9 @@ static int change_page_attr(pte_t *ptep, unsigned long addr, void *data) break; } - set_pte_at(&init_mm, addr, ptep, pte); + pte_update(&init_mm, addr, ptep, ~0UL, pte_val(pte), 0); + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); - /* See ptesync comment in radix__set_pte_at() */ - if (radix_enabled()) - asm volatile("ptesync": : :"memory"); spin_unlock(&init_mm.page_table_lock); return 0; --- For reference, the full patch is here: https://github.com/farosas/linux/commit/923c95c84d7081d7be9503bf5b276dd93bd17036.patch > > [1]: https://lore.kernel.org/linuxppc-dev/87y318wp9r.fsf@linux.ibm.com/ > > Fixes: 1f9ad21c3b38 ("powerpc/mm: Implement set_memory() routines") > Reported-by: Laurent Vivier > Signed-off-by: Michael Ellerman > --- ... > - set_pte_at(&init_mm, addr, ptep, pte); > + pte_update(&init_mm, addr, ptep, clear, set, 0); > > /* See ptesync comment in radix__set_pte_at() */ > if (radix_enabled()) > asm volatile("ptesync": : :"memory"); > + > + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); I think there's an optimization possible here, when relaxing access, to skip the TLB flush. Would still need the ptesync though. Similar to what Nick did in e5f7cb58c2b7 ("powerpc/64s/radix: do not flush TLB when relaxing access"). It is out of scope for this patch but maybe worth thinking about. > + > spin_unlock(&init_mm.page_table_lock); > > return 0; > > base-commit: cbc06f051c524dcfe52ef0d1f30647828e226d30