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 for <linuxppc-dev@lists.ozlabs.org> from <vaibhav@linux.vnet.ibm.com>;
 Mon, 19 Feb 2018 14:36:03 -0000
From: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
To: Christophe Lombard <clombard@linux.vnet.ibm.com>,
 linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com,
 andrew.donnellan@au1.ibm.com
Subject: Re: [PATCH V5] cxl: Fix timebase synchronization status on P9
In-Reply-To: <1519050491-15326-1-git-send-email-clombard@linux.vnet.ibm.com>
References: <1519050491-15326-1-git-send-email-clombard@linux.vnet.ibm.com>
Date: Mon, 19 Feb 2018 20:05:56 +0530
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Christophe Lombard <clombard@linux.vnet.ibm.com> writes:

> The PSL Timebase register is updated by the PSL to maintain the
> timebase.
> On P9, the Timebase value is only provided by the CAPP as received
> the last time a timebase request was performed.
> The timebase requests are initiated through the adapter configuration or
> application registers.
> The specific sysfs entry "/sys/class/cxl/cardxx/psl_timebase_synced" is
> now dynamically updated according the content of the PSL Timebase
> register.
>
> Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
>
> ---
> This patch applies on top of this patch:
>  http://patchwork.ozlabs.org/patch/873663/

LGTM. Thanks for updating the patch Christophe.

Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>