From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Michael Neuling <mikey@neuling.org>,
greg@kroah.com, arnd@arndb.de, mpe@ellerman.id.au,
benh@kernel.crashing.org
Cc: cbe-oss-dev@lists.ozlabs.org, mikey@neuling.org,
linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
jk@ozlabs.org, imunsie@au1.ibm.com, anton@samba.org
Subject: Re: [PATCH v4 09/16] powerpc/mm: Add new hash_page_mm()
Date: Thu, 09 Oct 2014 20:58:32 +0530 [thread overview]
Message-ID: <87tx3d1cv3.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <1412758505-23495-10-git-send-email-mikey@neuling.org>
Michael Neuling <mikey@neuling.org> writes:
> From: Ian Munsie <imunsie@au1.ibm.com>
>
> This adds a new function hash_page_mm() based on the existing hash_page().
> This version allows any struct mm to be passed in, rather than assuming
> current. This is useful for servicing co-processor faults which are not in the
> context of the current running process.
>
> We need to be careful here as the current hash_page() assumes current in a few
> places.
if you move cxl_slbia patch before this, then we could add additonal
information here.
1) We use this to insert hpte entries on-behalf of co-processor.
2) we don't need to flush cpu slb entries when adding new hpte entries
3) We do flush the co-processor slb cache, if adding hpte entry result
in a segement demotion or have mmu_ci_restrictions enabled.
4) We do update the slice array to indicate the new base page size
5) w.r.t co-processor on segment miss we look at slice array and add new slb entry
using newly added copro_calculate_slb "powerpc/cell: Move data segment faulting code out of cell platform"
>
> Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> Signed-off-by: Michael Neuling <mikey@neuling.org>
> ---
> arch/powerpc/include/asm/mmu-hash64.h | 1 +
> arch/powerpc/mm/hash_utils_64.c | 24 +++++++++++++++++-------
> 2 files changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
> index aeabd02..764e141 100644
> --- a/arch/powerpc/include/asm/mmu-hash64.h
> +++ b/arch/powerpc/include/asm/mmu-hash64.h
> @@ -324,6 +324,7 @@ extern int __hash_page_64K(unsigned long ea, unsigned long access,
> unsigned int local, int ssize);
> struct mm_struct;
> unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap);
> +extern int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap);
> extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap);
> int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
> pte_t *ptep, unsigned long trap, int local, int ssize,
> diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
> index bbdb054..698834d 100644
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -904,7 +904,7 @@ void demote_segment_4k(struct mm_struct *mm, unsigned long addr)
> return;
> slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K);
> copro_flush_all_slbs(mm);
> - if (get_paca_psize(addr) != MMU_PAGE_4K) {
> + if ((get_paca_psize(addr) != MMU_PAGE_4K) && (current->mm == mm)) {
> get_paca()->context = mm->context;
> slb_flush_and_rebolt();
> }
> @@ -989,12 +989,11 @@ static void check_paca_psize(unsigned long ea, struct mm_struct *mm,
> * -1 - critical hash insertion error
> * -2 - access not permitted by subpage protection mechanism
> */
> -int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> +int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap)
> {
> enum ctx_state prev_state = exception_enter();
> pgd_t *pgdir;
> unsigned long vsid;
> - struct mm_struct *mm;
> pte_t *ptep;
> unsigned hugeshift;
> const struct cpumask *tmp;
> @@ -1008,7 +1007,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> switch (REGION_ID(ea)) {
> case USER_REGION_ID:
> user_region = 1;
> - mm = current->mm;
> if (! mm) {
> DBG_LOW(" user region with no mm !\n");
> rc = 1;
> @@ -1019,7 +1017,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> vsid = get_vsid(mm->context.id, ea, ssize);
> break;
> case VMALLOC_REGION_ID:
> - mm = &init_mm;
> vsid = get_kernel_vsid(ea, mmu_kernel_ssize);
> if (ea < VMALLOC_END)
> psize = mmu_vmalloc_psize;
> @@ -1104,7 +1101,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> WARN_ON(1);
> }
> #endif
> - check_paca_psize(ea, mm, psize, user_region);
> + if (current->mm == mm)
> + check_paca_psize(ea, mm, psize, user_region);
>
> goto bail;
> }
> @@ -1145,7 +1143,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> }
> }
>
> - check_paca_psize(ea, mm, psize, user_region);
> + if (current->mm == mm)
> + check_paca_psize(ea, mm, psize, user_region);
> #endif /* CONFIG_PPC_64K_PAGES */
>
> #ifdef CONFIG_PPC_HAS_HASH_64K
> @@ -1180,6 +1179,17 @@ bail:
> exception_exit(prev_state);
> return rc;
> }
> +EXPORT_SYMBOL_GPL(hash_page_mm);
> +
> +int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
> +{
> + struct mm_struct *mm = current->mm;
> +
> + if (REGION_ID(ea) == VMALLOC_REGION_ID)
> + mm = &init_mm;
> +
> + return hash_page_mm(mm, ea, access, trap);
> +}
> EXPORT_SYMBOL_GPL(hash_page);
>
> void hash_preload(struct mm_struct *mm, unsigned long ea,
> --
> 1.9.1
>
> --
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> Please read the FAQ at http://www.tux.org/lkml/
next prev parent reply other threads:[~2014-10-09 15:28 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-08 8:54 [PATCH v4 0/16] POWER8 Coherent Accelerator device driver Michael Neuling
2014-10-08 8:54 ` [PATCH v4 01/16] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-10-09 15:01 ` Aneesh Kumar K.V
2014-10-08 8:54 ` [PATCH v4 02/16] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-10-09 15:04 ` Aneesh Kumar K.V
2014-10-08 8:54 ` [PATCH v4 03/16] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-10-09 15:04 ` Aneesh Kumar K.V
2014-10-08 8:54 ` [PATCH v4 04/16] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-10-08 8:54 ` [PATCH v4 05/16] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-10-09 15:05 ` Aneesh Kumar K.V
2014-10-08 8:54 ` [PATCH v4 06/16] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-10-08 8:54 ` [PATCH v4 07/16] cxl: Add new header for call backs and structs Michael Neuling
2014-10-08 8:54 ` [PATCH v4 08/16] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-10-08 8:54 ` [PATCH v4 09/16] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-10-09 15:28 ` Aneesh Kumar K.V [this message]
2014-10-08 8:54 ` [PATCH v4 10/16] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-10-08 8:55 ` [PATCH v4 11/16] powerpc/mm: Add hooks for cxl Michael Neuling
2014-10-09 15:20 ` Aneesh Kumar K.V
2014-10-08 8:55 ` [PATCH v4 12/16] cxl: Add base builtin support Michael Neuling
2014-10-08 8:55 ` [PATCH v4 13/16] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-10-08 10:28 ` Ian Munsie
2014-10-08 10:41 ` [PATCH] CXL: Fix afu_read() not doing finish_wait() on signal or non-blocking Ian Munsie
2014-10-09 0:17 ` Ian Munsie
2014-10-08 8:55 ` [PATCH v4 14/16] cxl: Add userspace header file Michael Neuling
2014-10-08 8:55 ` [PATCH v4 15/16] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-10-08 8:55 ` [PATCH v4 16/16] cxl: Add documentation for userspace APIs Michael Neuling
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